/// @file include-private/xed3-phash-vv2.h

// This file was automatically generated.
// Do not edit this file.

#if !defined(INCLUDE_PRIVATE_XED3_PHASH_VV2_H)
# define INCLUDE_PRIVATE_XED3_PHASH_VV2_H
/*BEGIN_LEGAL

Copyright (c) 2018 Intel Corporation

  Licensed under the Apache License, Version 2.0 (the "License");
  you may not use this file except in compliance with the License.
  You may obtain a copy of the License at

      http://www.apache.org/licenses/LICENSE-2.0

  Unless required by applicable law or agreed to in writing, software
  distributed under the License is distributed on an "AS IS" BASIS,
  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  See the License for the specific language governing permissions and
  limitations under the License.
  
END_LEGAL */
#include "xed-internal-header.h"
#include "xed3-operand-lu.h"
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_2_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_4_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_6_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_15_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_18_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_22_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_26_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_29_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_32_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_35_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_45_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_47_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_49_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_52_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_54_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_56_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_61_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_65_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_72_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_74_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_75_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_76_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_77_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_78_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_79_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_82_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_3_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_4_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_14_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_17_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_22_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_29_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_37_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_43_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_45_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_50_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_51_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_53_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_54_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_55_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_56_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_57_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_62_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_65_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_67_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_74_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_75_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_76_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_77_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_78_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_79_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_82_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_84_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_87_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_91_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_96_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_97_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_104_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_121_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_124_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_128_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_133_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_138_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_145_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_148_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_150_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_2_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_4_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_6_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_14_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_18_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_26_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_32_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_35_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_45_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_47_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_49_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_50_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_52_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_56_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_57_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_61_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_62_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_64_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x13_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x14_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x15_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x16_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x17_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x28_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x29_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_1_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_3_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_6_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_15_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_18_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_26_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_35_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_43_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_50_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_51_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_53_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_54_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_56_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_62_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_64_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_65_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_67_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_72_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_74_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_76_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_77_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_79_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_82_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_89_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_90_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_94_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_98_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_104_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_114_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_118_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_123_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_128_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_140_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_145_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_148_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_155_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_160_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_171_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_172_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_177_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_184_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_189_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_191_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_192_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_194_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_196_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_199_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_201_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_206_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_211_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_212_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x54_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x55_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x56_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x57_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x58_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x59_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_1_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_3_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_6_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_15_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_18_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_26_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_35_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_43_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_50_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_51_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_53_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_54_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_56_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_62_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_64_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_65_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_67_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_72_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_74_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_76_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_77_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_79_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_82_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_89_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_90_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_94_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_98_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_104_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_114_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_118_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_123_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_128_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_140_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_145_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_148_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_155_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_160_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_171_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_172_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_177_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_184_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_189_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_191_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_192_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_194_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_196_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_199_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_201_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_206_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_211_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_212_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x60_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x61_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x62_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x63_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x64_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x65_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x66_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x67_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x68_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x69_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x70_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x71_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x72_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x73_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x74_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x75_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x76_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_3_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_14_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_17_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_22_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_29_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_32_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_47_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_49_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_51_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_52_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_54_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_55_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_61_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_64_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_67_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_74_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_75_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_78_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_80_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_84_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_87_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_90_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_91_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_104_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_124_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_131_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_138_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_150_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_154_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_156_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_171_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_174_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_185_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_189_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_191_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_194_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_196_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_203_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_206_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_210_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_224_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_225_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_234_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_236_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_237_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_239_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_241_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_244_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_249_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_250_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_253_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_256_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_257_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_258_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_261_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_263_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_265_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_266_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_269_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_271_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_272_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_273_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_279_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_286_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_289_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_291_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_293_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_295_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_297_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_300_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_303_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_304_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_305_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_307_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_308_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_309_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_310_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_311_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_312_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_314_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_317_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_319_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_320_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_322_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_323_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_324_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_325_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_327_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_329_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_330_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_332_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_336_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_337_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_339_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_340_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_341_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_342_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_344_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_346_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_347_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_348_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_349_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_351_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_352_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_353_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_354_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_355_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_356_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_358_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_359_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_361_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_363_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_364_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_366_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_368_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_369_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_370_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_371_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_372_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_373_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_374_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_375_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_376_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_378_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_380_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_383_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_386_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_387_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_388_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_390_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_391_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_392_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_393_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_394_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_395_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_397_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_398_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_400_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_402_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_405_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_406_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_407_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_408_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_409_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_410_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_412_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_413_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_414_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_415_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_417_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_419_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_420_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_422_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_423_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_424_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_425_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_427_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_430_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_431_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_432_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_434_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_437_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_438_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_439_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_441_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_442_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_444_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_447_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_451_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_452_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_453_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_454_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_456_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_458_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_459_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_461_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_462_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_463_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_464_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_466_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_469_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_470_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_471_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_473_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_474_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_475_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_476_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_477_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_478_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_480_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_481_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_483_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_485_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_486_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_488_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_489_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_490_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_492_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_493_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_495_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_496_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_497_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_498_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_500_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_502_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_503_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_505_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_506_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_507_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_510_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_512_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_513_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_514_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_515_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_517_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_518_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_519_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_520_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_521_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_522_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_524_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_525_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_527_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_528_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_529_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_532_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_534_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_535_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_536_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_539_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_541_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_542_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_544_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_545_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_546_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_547_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_549_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_551_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_552_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_553_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_554_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_556_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_557_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_558_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_559_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_560_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_561_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_564_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_566_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_568_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_569_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_571_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_572_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_573_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_574_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_575_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_576_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_578_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_579_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_580_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_581_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_583_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_585_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_586_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_588_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_590_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_591_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_592_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_593_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_595_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_596_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_597_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_600_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_602_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_603_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_604_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_605_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_607_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_608_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_610_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_611_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_612_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_613_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_614_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_615_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_617_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_619_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_620_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_621_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_622_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_625_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_627_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_628_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_629_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_630_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_631_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_632_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_634_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_635_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_636_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_637_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_639_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_640_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_642_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_643_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_646_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_649_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_650_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_651_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_652_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_654_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_655_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_656_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_657_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_658_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_659_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_660_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_661_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_668_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_669_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_671_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_672_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_673_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_674_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_675_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_676_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_678_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_679_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_680_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_681_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_683_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_685_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_686_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_688_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_691_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_692_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_693_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_695_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_696_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_697_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_698_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_700_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_702_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_703_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_704_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_705_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_707_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_708_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_709_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_710_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_711_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_712_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_713_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_714_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_715_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_717_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_719_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_720_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_722_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_724_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_726_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_727_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_729_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_730_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_732_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_733_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_734_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_735_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_737_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_738_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_739_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_741_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_742_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_743_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_744_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_746_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_747_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_749_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_750_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_752_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_753_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_754_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_755_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_756_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_758_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_759_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_761_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_762_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_763_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_764_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_766_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_768_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_769_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_770_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_771_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_773_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_775_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_776_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_777_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_778_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_781_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_783_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_784_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_785_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_786_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_788_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_790_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_791_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_792_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_793_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_794_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_795_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_796_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_798_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_800_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_801_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_802_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_803_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_805_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_806_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_807_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_808_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_809_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_810_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_812_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_813_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_814_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_815_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_817_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_818_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_820_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_822_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_824_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_825_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_827_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_829_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_830_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_832_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_833_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_834_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_835_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_836_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_837_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_838_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_841_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_844_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_845_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_846_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_847_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_848_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_849_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_851_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_852_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_853_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_854_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_856_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_857_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_859_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_863_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_866_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_867_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_868_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_869_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_870_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_871_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_873_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_874_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_875_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_876_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_877_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_878_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_879_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_880_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_883_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_884_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_885_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_886_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_888_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_889_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_890_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_891_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_892_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_893_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_895_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_896_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_897_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_898_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_899_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_900_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_902_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_903_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_905_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_908_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_909_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_910_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_912_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_913_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_914_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_915_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_917_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_918_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_919_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_920_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_922_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_924_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_925_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_927_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_929_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_930_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_931_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_932_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_934_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_935_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_936_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_937_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_939_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_940_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_941_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_942_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_944_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_946_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_947_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_949_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_951_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_952_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_953_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_956_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_957_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_958_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_959_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_960_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_961_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_963_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_964_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_966_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_967_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_968_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_969_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_971_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_972_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_974_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_975_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_976_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_978_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_980_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_981_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_982_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_983_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_985_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_986_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_988_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_990_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_991_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_992_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_993_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_999_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1000_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1002_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1003_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1004_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1005_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1007_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1008_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1009_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1010_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1012_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1013_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1015_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1017_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1018_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1019_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1020_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1022_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1024_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1025_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1027_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1029_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1030_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1031_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1032_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1033_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1035_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1036_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1039_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1041_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1042_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1043_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1044_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1046_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1047_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1049_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1050_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1051_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1052_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1053_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1054_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1058_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1061_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1063_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1064_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1065_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1066_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1068_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1069_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1071_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1073_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1074_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1075_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1078_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1080_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1081_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1082_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1083_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1085_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1086_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1087_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1088_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1090_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1091_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1093_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1095_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1097_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1114_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1133_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1136_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1154_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1156_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1162_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1168_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1172_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1185_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1186_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1199_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1201_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1210_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1216_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1218_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1219_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1223_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1224_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1225_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1231_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1232_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1234_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1236_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1237_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1239_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1241_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1244_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1248_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1249_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1252_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1255_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1256_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1257_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1261_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1263_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1266_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1267_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1269_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1271_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1279_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1291_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1292_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1295_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1296_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1297_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1299_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1300_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1302_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1303_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1305_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1306_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1307_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1308_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1310_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1312_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1313_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1314_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1315_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1317_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1318_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1320_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1322_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1324_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1325_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1327_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1329_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1330_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1331_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1332_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1334_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1335_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1337_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1338_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1339_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1341_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1342_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1344_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1345_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1347_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1350_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1351_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1352_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1354_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1357_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1358_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1359_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1361_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1363_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1364_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1366_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1368_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1371_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1373_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1374_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1375_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1376_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1378_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1379_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1380_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1381_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1382_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1383_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1386_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1390_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1393_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1395_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1396_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1397_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1398_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1400_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1401_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1402_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1403_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1405_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1407_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1410_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1412_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1413_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1414_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1415_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1417_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1418_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1419_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1421_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1422_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1424_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1425_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1427_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1428_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1429_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1430_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1432_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1433_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1434_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1435_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1437_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1439_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1441_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1442_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1444_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1445_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1446_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1447_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1449_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1451_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1453_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1454_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1456_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1457_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1458_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1459_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1461_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1462_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1463_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1464_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1465_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1466_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1468_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1469_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1471_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1472_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1473_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1474_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1476_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1478_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1479_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1480_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1481_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1483_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1484_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1485_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1486_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_3_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_9_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_14_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_17_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_22_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_29_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_32_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_47_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_49_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_51_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_52_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_54_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_55_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_61_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_64_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_67_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_74_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_75_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_78_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_80_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_84_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_87_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_90_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_91_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_104_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_124_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_131_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_138_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_150_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_154_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_156_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_171_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_174_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_185_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_189_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_191_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_194_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_196_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_203_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_206_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_210_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_224_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_225_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_234_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_236_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_237_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_239_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_241_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_244_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_249_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_250_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_253_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_256_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_257_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_258_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_261_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_263_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_265_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_266_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_269_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_271_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_272_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_273_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_279_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_286_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_289_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_291_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_293_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_295_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_297_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_300_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_303_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_304_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_305_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_307_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_308_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_309_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_310_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_311_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_312_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_314_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_317_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_319_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_320_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_322_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_323_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_324_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_325_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_327_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_329_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_330_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_332_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_336_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_337_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_339_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_340_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_341_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_342_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_344_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_346_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_347_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_348_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_349_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_351_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_352_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_353_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_354_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_355_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_356_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_358_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_359_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_361_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_363_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_364_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_366_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_368_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_369_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_370_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_371_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_372_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_373_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_374_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_375_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_376_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_378_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_380_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_383_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_386_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_387_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_388_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_390_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_391_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_392_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_393_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_394_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_395_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_397_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_398_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_400_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_402_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_405_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_406_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_407_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_408_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_409_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_410_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_412_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_413_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_414_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_415_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_417_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_419_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_420_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_422_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_423_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_424_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_425_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_427_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_430_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_431_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_432_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_434_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_437_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_438_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_439_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_441_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_442_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_444_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_447_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_451_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_452_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_453_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_454_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_456_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_458_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_459_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_461_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_462_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_463_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_464_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_466_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_469_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_470_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_471_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_473_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_474_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_475_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_476_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_477_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_478_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_480_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_481_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_483_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_485_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_486_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_488_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_489_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_490_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_492_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_493_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_495_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_496_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_497_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_498_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_500_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_502_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_503_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_505_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_506_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_507_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_510_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_512_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_513_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_514_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_515_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_517_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_518_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_519_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_520_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_521_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_522_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_524_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_525_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_527_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_528_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_529_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_532_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_534_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_535_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_536_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_539_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_541_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_542_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_544_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_545_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_546_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_547_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_549_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_551_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_552_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_553_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_554_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_556_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_557_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_558_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_559_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_560_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_561_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_564_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_566_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_568_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_569_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_571_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_572_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_573_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_574_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_575_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_576_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_578_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_579_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_580_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_581_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_583_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_585_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_586_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_588_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_590_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_591_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_592_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_593_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_595_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_596_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_597_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_600_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_602_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_603_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_604_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_605_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_607_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_608_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_610_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_611_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_612_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_613_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_614_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_615_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_617_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_619_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_620_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_621_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_622_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_625_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_627_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_628_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_629_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_630_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_631_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_632_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_634_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_635_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_636_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_637_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_639_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_640_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_642_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_643_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_646_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_649_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_650_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_651_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_652_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_654_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_655_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_656_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_657_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_658_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_659_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_660_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_661_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_668_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_669_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_671_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_672_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_673_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_674_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_675_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_676_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_678_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_679_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_680_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_681_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_683_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_685_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_686_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_688_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_691_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_692_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_693_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_695_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_696_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_697_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_698_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_700_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_702_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_703_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_704_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_705_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_707_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_708_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_709_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_710_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_711_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_712_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_713_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_714_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_715_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_717_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_719_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_720_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_722_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_724_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_726_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_727_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_729_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_730_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_732_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_733_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_734_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_735_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_737_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_738_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_739_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_741_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_742_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_743_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_744_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_746_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_747_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_749_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_750_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_752_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_753_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_754_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_755_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_756_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_758_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_759_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_761_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_762_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_763_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_764_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_766_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_768_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_769_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_770_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_771_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_773_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_775_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_776_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_777_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_778_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_781_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_783_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_784_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_785_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_786_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_788_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_790_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_791_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_792_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_793_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_794_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_795_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_796_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_798_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_800_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_801_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_802_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_803_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_805_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_806_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_807_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_808_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_809_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_810_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_812_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_813_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_814_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_815_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_817_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_818_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_820_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_822_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_824_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_825_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_827_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_829_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_830_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_832_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_833_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_834_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_835_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_836_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_837_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_838_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_841_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_844_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_845_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_846_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_847_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_848_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_849_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_851_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_852_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_853_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_854_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_856_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_857_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_859_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_863_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_866_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_867_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_868_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_869_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_870_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_871_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_873_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_874_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_875_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_876_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_877_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_878_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_879_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_880_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_883_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_884_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_885_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_886_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_888_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_889_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_890_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_891_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_892_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_893_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_895_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_896_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_897_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_898_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_899_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_900_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_902_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_903_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_905_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_908_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_909_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_910_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_912_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_913_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_914_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_915_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_917_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_918_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_919_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_920_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_922_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_924_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_925_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_927_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_929_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_930_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_931_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_932_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_934_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_935_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_936_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_937_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_939_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_940_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_941_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_942_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_944_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_946_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_947_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_949_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_951_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_952_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_953_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_956_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_957_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_958_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_959_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_960_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_961_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_963_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_964_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_966_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_967_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_968_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_969_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_971_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_972_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_974_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_975_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_976_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_978_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_980_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_981_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_982_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_983_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_985_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_986_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_988_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_990_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_991_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_992_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_993_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_999_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1000_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1002_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1003_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1004_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1005_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1007_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1008_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1009_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1010_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1012_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1013_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1015_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1017_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1018_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1019_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1020_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1022_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1024_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1025_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1027_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1029_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1030_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1031_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1032_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1033_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1035_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1036_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1039_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1041_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1042_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1043_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1044_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1046_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1047_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1049_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1050_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1051_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1052_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1053_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1054_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1058_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1061_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1063_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1064_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1065_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1066_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1068_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1069_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1071_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1073_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1074_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1075_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1078_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1080_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1081_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1082_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1083_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1085_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1086_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1087_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1088_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1090_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1091_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1093_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1095_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1097_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1114_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1133_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1136_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1154_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1156_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1162_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1168_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1172_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1185_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1186_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1199_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1201_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1210_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1216_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1218_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1219_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1223_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1224_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1225_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1231_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1232_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1234_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1236_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1237_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1239_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1241_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1244_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1248_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1249_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1252_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1255_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1256_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1257_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1261_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1263_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1266_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1267_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1269_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1271_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1279_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1291_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1292_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1295_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1296_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1297_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1299_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1300_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1302_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1303_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1305_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1306_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1307_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1308_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1310_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1312_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1313_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1314_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1315_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1317_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1318_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1320_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1322_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1324_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1325_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1327_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1329_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1330_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1331_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1332_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1334_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1335_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1337_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1338_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1339_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1341_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1342_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1344_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1345_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1347_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1350_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1351_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1352_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1354_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1357_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1358_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1359_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1361_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1363_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1364_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1366_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1368_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1371_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1373_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1374_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1375_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1376_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1378_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1379_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1380_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1381_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1382_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1383_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1386_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1390_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1393_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1395_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1396_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1397_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1398_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1400_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1401_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1402_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1403_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1405_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1407_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1410_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1412_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1413_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1414_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1415_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1417_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1418_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1419_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1421_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1422_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1424_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1425_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1427_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1428_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1429_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1430_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1432_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1433_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1434_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1435_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1437_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1439_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1441_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1442_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1444_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1445_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1446_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1447_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1449_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1451_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1453_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1454_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1456_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1457_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1458_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1459_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1461_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1462_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1463_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1464_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1465_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1466_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1468_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1469_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1471_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1472_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1473_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1474_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1476_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1478_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1479_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1480_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1481_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1483_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1484_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1485_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1486_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_2_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_4_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_6_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_14_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_15_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_17_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_22_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_26_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_29_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_32_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_37_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_41_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_45_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_49_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_50_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_51_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_52_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_53_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_55_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_56_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_57_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_61_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_62_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_65_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_77_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_78_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_79_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_82_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_84_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_85_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_87_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_89_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_90_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_91_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_97_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_98_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_107_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_114_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_118_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_121_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_123_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_128_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_131_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_145_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_148_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_150_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_154_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_156_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_160_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_162_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_168_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_172_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_174_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_184_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_186_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_192_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_194_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_196_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_203_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_206_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_210_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_212_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_214_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_218_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_219_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_223_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_226_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_228_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_231_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_232_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_234_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_236_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_237_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_238_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_239_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_244_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_248_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_250_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_251_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_252_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_253_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_255_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_256_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_257_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_260_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_263_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_265_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_267_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_271_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_272_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_273_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_279_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_284_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_287_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_289_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_291_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_292_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_293_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_295_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_296_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_297_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_299_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_301_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_303_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_304_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_305_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_307_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_309_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_312_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_313_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_315_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_316_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_317_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_319_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_320_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_321_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_323_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_324_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_325_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_327_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_329_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_330_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_332_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_333_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_335_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_337_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_339_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_341_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_343_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_344_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_346_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_347_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_348_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_349_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_351_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_352_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_353_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_355_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_357_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_358_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_359_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_360_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_362_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_363_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_364_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_367_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_368_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_369_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_370_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_371_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_372_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_374_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_375_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_376_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_377_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_378_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_379_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_380_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_382_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_383_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_385_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_386_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_387_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_388_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_390_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_391_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_392_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_393_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_394_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_396_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_398_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_400_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_402_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_403_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_404_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_405_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_406_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_408_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_409_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_410_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_412_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_414_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_415_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_416_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_418_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_419_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_420_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_422_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_424_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_425_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_426_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_428_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_430_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_431_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_432_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_434_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_436_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_438_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_440_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_442_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_443_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_444_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_445_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_446_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_448_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_449_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_450_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_451_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_452_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_453_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_454_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_455_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_456_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_457_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_458_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_459_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_461_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_462_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_464_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_465_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_466_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_469_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_470_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_471_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_473_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_474_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_475_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_477_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_478_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_481_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_482_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_485_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_487_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_488_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_489_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_490_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_493_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_494_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_497_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_498_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_501_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_503_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_504_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_505_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_509_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_510_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_511_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_513_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_514_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_515_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_517_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_518_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_519_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_520_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_521_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_522_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_523_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_525_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_526_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_527_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_528_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_529_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_530_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_531_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_533_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_535_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_537_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_538_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_539_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_541_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_543_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_544_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_545_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_546_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_547_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_549_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_550_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_551_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_553_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_554_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_555_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_557_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_558_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_559_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_560_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_561_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_562_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_563_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_566_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_567_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_569_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_571_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_573_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_575_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_576_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_577_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_578_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_580_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_581_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_582_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_583_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_584_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_585_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_586_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_588_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_589_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_592_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_593_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_594_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_595_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_596_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_597_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_598_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_599_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_600_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_602_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_604_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_605_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_606_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_608_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_610_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_612_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_614_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_615_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_616_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_618_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_620_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_621_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_622_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_624_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_626_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_628_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_630_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_632_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_634_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_638_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_640_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_642_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_645_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_646_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_648_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_650_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_652_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_654_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_655_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_658_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_659_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_660_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_661_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_662_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_663_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_664_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_665_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_666_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_667_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_668_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_669_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_670_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_671_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_672_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_674_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_676_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_677_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_678_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_679_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_680_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_682_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_685_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_687_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_688_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_689_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_691_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_693_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_695_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_696_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_699_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_700_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_701_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_703_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_704_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_705_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_706_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_707_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_708_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_710_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_711_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_712_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_715_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_716_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_717_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_718_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_719_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_721_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_723_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_725_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_726_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_727_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_729_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_731_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_733_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_734_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_735_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_736_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_737_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_739_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_740_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_741_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_743_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_744_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_745_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_746_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_747_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_748_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_749_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_750_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_751_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_752_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_753_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_755_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_756_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_757_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_759_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_761_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_763_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_764_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_765_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_766_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_767_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_769_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_772_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_773_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_775_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_776_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_777_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_779_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_781_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_783_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_784_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_785_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_787_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_788_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_789_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_791_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_794_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_795_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_796_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_800_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_802_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_803_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_804_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_805_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_807_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_808_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_810_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_811_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_812_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_814_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_815_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_816_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_817_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_818_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_819_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_820_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_822_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_823_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_826_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_827_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_828_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_830_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_832_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_834_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_835_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_836_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_838_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_840_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_842_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_844_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_845_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_846_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_848_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_850_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_851_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_852_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_854_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_856_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_858_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_860_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_862_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_864_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_866_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_868_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_869_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_870_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_872_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_874_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_875_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_876_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_877_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_878_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_880_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_883_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_884_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_885_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_886_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_887_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_888_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_890_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_891_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_893_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_894_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_896_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_897_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_898_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_901_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_902_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_903_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_905_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_906_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_907_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_908_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_909_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_910_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_913_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_914_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_917_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_918_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_921_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_922_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_923_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_925_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_928_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_929_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_930_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_931_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_933_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_936_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_937_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_939_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_940_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_941_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_943_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_945_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_948_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_949_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_950_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_951_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_953_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_954_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_955_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_956_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_957_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_958_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_959_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_961_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_962_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_963_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_965_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_967_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_968_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_969_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_970_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_971_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_973_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_975_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_977_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_979_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_980_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_981_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_982_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_983_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_985_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_986_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_987_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_989_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_990_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_991_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_993_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_994_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_995_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_996_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_997_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_998_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_999_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1001_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1002_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1003_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1005_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1006_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1007_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1008_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1009_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1010_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1011_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1012_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1013_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1014_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1016_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1017_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1018_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1020_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1021_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1024_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1025_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1026_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1028_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1029_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1030_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1032_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1036_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1037_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1038_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1041_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1042_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1044_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1045_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1046_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1048_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1050_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1052_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1053_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1054_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1056_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1058_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1059_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1060_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1062_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1064_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1065_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1066_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1068_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1070_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1071_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1072_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1074_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1078_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1080_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1081_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1082_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1084_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1086_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1087_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1090_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1091_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1092_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1093_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1094_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1095_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1097_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1098_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1099_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1104_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1109_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1111_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1114_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1118_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1121_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1123_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1128_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1131_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1136_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1138_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1140_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1148_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1152_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1155_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1168_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1171_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1176_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1177_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1181_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1184_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1185_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1189_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1191_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1192_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1196_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1199_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1201_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1204_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1209_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1211_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1216_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1219_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1221_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1223_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1224_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1228_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1231_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1232_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1234_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1238_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1239_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1243_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1244_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1248_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1249_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1250_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1251_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1252_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1254_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1255_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1258_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1260_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1261_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1262_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1266_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1270_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1272_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1277_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1282_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1284_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1286_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1287_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1292_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1294_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1296_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1300_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1302_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc2_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc5_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd1_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd2_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd3_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd5_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd9_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xda_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdc_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdd_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xde_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe0_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe1_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe2_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe3_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe5_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe7_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe9_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xea_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xeb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xec_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xed_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xee_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xef_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf1_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf2_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf3_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf5_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf9_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfa_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfc_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfd_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfe_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x0_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xd_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x10_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x11_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x12_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x13_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x14_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x15_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x16_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x18_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x19_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x20_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x21_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x22_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x23_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x24_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x25_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x26_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x27_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_1_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_2_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_4_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_6_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_11_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_14_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_15_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_16_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_18_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_19_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_22_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_24_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_26_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_27_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_32_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_34_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_35_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_36_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_37_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_39_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_43_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_45_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_46_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_47_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_49_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_50_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_52_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_53_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_55_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_57_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_59_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_64_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_66_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_67_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_69_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_71_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_72_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_75_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_76_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_77_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_79_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_80_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_82_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_83_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_84_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_85_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_89_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_96_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_97_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_98_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_99_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_101_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_102_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_108_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_115_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_116_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_118_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_119_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_121_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_126_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_129_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_131_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_133_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_134_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_136_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_139_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_140_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_141_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_142_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_144_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_145_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_146_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_147_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_149_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_150_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_151_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_154_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_155_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_159_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_160_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_161_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_164_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_166_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_168_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_169_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_172_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_174_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_177_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_179_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_180_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_184_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_187_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_189_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_191_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_194_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_199_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_201_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_203_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_204_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_206_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_207_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_209_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_211_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_212_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_213_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_216_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_218_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_223_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_226_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_228_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_231_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_232_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_233_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_236_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_237_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_238_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_241_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_243_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_245_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_246_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_248_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_249_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_250_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_251_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_252_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_255_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_256_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_259_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_260_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_261_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_262_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_264_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_265_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_266_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_267_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_269_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_270_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_271_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_272_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_273_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_274_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_276_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_279_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_281_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_282_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_284_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_289_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_291_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_292_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_293_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x29_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x30_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x31_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x32_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x33_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x34_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x35_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x36_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x37_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x38_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_512_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_0_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_515_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_5_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_518_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_7_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_8_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_10_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_12_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_525_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_15_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_530_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_3_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_532_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_21_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_23_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_25_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_538_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_28_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_542_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_31_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_33_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_35_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_548_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_549_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_38_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_552_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_42_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_555_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_44_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_557_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_558_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_560_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_520_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_562_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_563_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_565_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_55_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_58_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_60_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_522_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_62_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_63_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_65_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_578_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_580_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_70_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_72_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_73_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_75_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_76_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_78_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_13_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_80_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_81_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_85_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_86_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_88_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_90_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_527_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_92_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_93_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_95_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_98_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_100_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_103_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_105_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_106_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_110_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_112_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_113_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_117_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_118_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_120_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_20_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_122_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_125_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_127_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_128_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_130_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_132_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_133_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_135_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_136_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_137_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_138_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_535_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_533_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_143_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_145_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_150_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_537_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_153_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_157_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_158_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_160_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_163_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_165_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_167_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_168_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_540_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_170_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_517_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_173_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_175_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_177_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_178_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_30_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_182_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_183_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_185_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_188_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_190_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_193_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_195_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_197_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_198_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_545_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_200_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_202_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_203_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_205_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_208_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_210_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_547_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_215_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_217_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_218_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_220_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_222_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_223_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_225_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_227_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_228_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_550_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_230_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_519_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_233_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_235_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_238_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_240_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_40_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_242_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_243_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_247_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_248_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_250_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_253_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_255_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_257_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_258_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_260_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_262_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_265_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_267_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_268_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_270_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_45_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_272_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_273_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_275_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_278_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_280_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_282_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_283_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_285_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_287_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_288_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_48_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_290_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_292_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_293_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_295_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_296_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_297_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_298_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_300_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_303_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_305_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_307_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_308_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_310_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_312_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_313_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_315_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_318_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_53_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_320_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_322_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_325_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_327_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_328_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_140_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_330_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_567_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_332_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_333_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_335_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_337_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_338_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_340_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_343_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_345_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_347_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_348_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_570_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_350_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_352_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_353_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_355_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_357_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_358_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_360_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_572_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_362_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_363_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_365_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_367_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_232_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_370_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_372_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_374_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_375_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_377_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_575_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_380_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_382_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_383_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_385_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_387_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_388_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_390_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_577_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_392_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_393_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_1_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_395_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_397_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_400_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_402_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_403_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_405_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_406_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_408_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_68_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_410_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_412_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_413_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_415_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_417_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_418_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_420_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_422_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_423_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_425_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_427_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_428_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_430_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_432_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_433_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_435_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_437_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_329_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_440_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_442_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_443_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_445_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_447_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_448_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_450_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_452_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_453_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_455_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_457_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_458_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_460_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_462_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_465_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_467_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_468_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_470_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_472_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_473_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_475_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_477_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_480_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_482_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_485_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_487_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_488_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_490_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_492_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_493_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_495_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_497_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_498_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_500_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_502_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_505_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_507_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_508_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_510_l1(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x40_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x42_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x43_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x44_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x45_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x46_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x47_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x50_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x51_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x52_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x53_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x54_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x55_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x58_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x59_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x5a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x5b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x62_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x63_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x64_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x65_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x66_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x70_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x71_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x72_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x73_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x75_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x76_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x77_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x78_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x79_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x83_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x88_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x89_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x90_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x91_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x92_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x93_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x96_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x97_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x98_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x99_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9c_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa0_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa1_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa2_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa3_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa7_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa9_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xaa_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xab_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xac_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xad_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xae_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xaf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb5_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb7_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb9_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xba_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbc_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbd_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbe_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc6_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc7_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xca_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcc_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcd_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xdc_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xdd_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xde_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xdf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x0_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x4_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x5_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x8_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x9_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xa_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xb_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x14_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x15_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x16_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x17_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x18_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x19_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1d_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x20_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x21_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x22_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x23_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x25_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x26_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x27_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x38_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x39_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3a_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3b_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3e_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3f_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x42_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x43_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x44_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x50_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x51_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x54_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x55_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x56_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x57_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x66_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x67_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x70_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x71_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x72_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x73_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xce_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xcf_vv2(const xed_decoded_inst_t* d);

static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(466)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 466;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_2_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(390)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {390, 3761},
/*h(678)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {678, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((6*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_4_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(746)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {746, 3791},
/*h(280)=1 EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {280, 5217}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26)=0 EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {26, 5212},
/*h(458)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {458, 3791},
/*h(924)=2 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ESIZE_64_BITS() NELEM_SCALAR()*/ {924, 3759}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_6_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(958)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {958, 3761},
/*h(348)=1 EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 5256},
/*h(670)=2 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {670, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(94)=0 EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5251}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 94;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(450)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {450, 3791},
/*h(738)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {738, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((6*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(950)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {950, 3761},
/*h(662)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {662, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(984)=0 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ESIZE_32_BITS() NELEM_SCALAR()*/ {3789}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 984;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(730)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {730, 3791},
/*h(1018)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1018, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((6*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_15_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(942)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(654)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_18_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1010)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1010, 3791},
/*h(722)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {722, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(934)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {934, 3761},
/*h(646)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {646, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_22_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1002)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1002, 3791},
/*h(536)=1 EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {536, 5209}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(714)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {714, 3791},
/*h(282)=1 EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {282, 5216}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(604)=0 EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {5248}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 604;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(926)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 926;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_26_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(350)=0 EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5255}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 350;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(994)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {994, 3791},
/*h(706)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {706, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_29_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(918)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 918;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_32_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(986)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 986;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(156)=0 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ESIZE_64_BITS() NELEM_SCALAR()*/ {156, 3759},
/*h(910)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {910, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_35_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(190)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(978)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 978;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(902)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(182)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 182;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(216)=0 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ESIZE_32_BITS() NELEM_SCALAR()*/ {216, 3789},
/*h(970)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {970, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(250)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {250, 3791},
/*h(538)=1 EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {538, 5208}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((6*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(606)=0 EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5247}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_45_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(174)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(962)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_47_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(242)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_49_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(166)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 166;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_52_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(234)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {234, 3791},
/*h(412)=1 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ESIZE_64_BITS() NELEM_SCALAR()*/ {412, 3759}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_54_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(158)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {158, 3761},
/*h(446)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {446, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_56_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(226)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 226;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(438)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 438;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(150)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {150, 3761},
/*h(472)=1 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 3789}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(506)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_61_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(218)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 218;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(430)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {430, 3761},
/*h(142)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {142, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_65_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(498)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 498;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(210)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(134)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {134, 3761},
/*h(422)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {422, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24)=0 EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {5213}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 24;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(490)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {490, 3791},
/*h(202)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {202, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(668)=0 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ESIZE_64_BITS() NELEM_SCALAR()*/ {3759}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 668;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_72_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(92)=0 EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 5252},
/*h(702)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {702, 3761},
/*h(414)=2 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {414, 3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_74_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(482)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 482;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_75_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(194)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 194;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_76_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(694)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 694;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_77_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(406)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 406;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_78_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(728)=0 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ESIZE_32_BITS() NELEM_SCALAR()*/ {3789}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 728;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_79_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(474)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {474, 3791},
/*h(762)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {762, 3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(686)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_82_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(398)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 398;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(754)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3791}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 754;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x10_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[84] = {
/*h(466)=0 */ {466, xed3_phash_find_map0x0F_opcode0x10_vv2_0_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(390)=2 */ {390, xed3_phash_find_map0x0F_opcode0x10_vv2_2_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(746)=4 */ {746, xed3_phash_find_map0x0F_opcode0x10_vv2_4_l1},
/*h(924)=5 */ {924, xed3_phash_find_map0x0F_opcode0x10_vv2_5_l1},
/*h(348)=6 */ {348, xed3_phash_find_map0x0F_opcode0x10_vv2_6_l1},
/*h(94)=7 */ {94, xed3_phash_find_map0x0F_opcode0x10_vv2_7_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(450)=9 */ {450, xed3_phash_find_map0x0F_opcode0x10_vv2_9_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(950)=11 */ {950, xed3_phash_find_map0x0F_opcode0x10_vv2_11_l1},
/*h(984)=12 */ {984, xed3_phash_find_map0x0F_opcode0x10_vv2_12_l1},
/*h(1018)=13 */ {1018, xed3_phash_find_map0x0F_opcode0x10_vv2_13_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(942)=15 */ {942, xed3_phash_find_map0x0F_opcode0x10_vv2_15_l1},
/*h(654)=16 */ {654, xed3_phash_find_map0x0F_opcode0x10_vv2_16_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(722)=18 */ {722, xed3_phash_find_map0x0F_opcode0x10_vv2_18_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(646)=20 */ {646, xed3_phash_find_map0x0F_opcode0x10_vv2_20_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1002)=22 */ {1002, xed3_phash_find_map0x0F_opcode0x10_vv2_22_l1},
/*h(714)=23 */ {714, xed3_phash_find_map0x0F_opcode0x10_vv2_23_l1},
/*h(604)=24 */ {604, xed3_phash_find_map0x0F_opcode0x10_vv2_24_l1},
/*h(926)=25 */ {926, xed3_phash_find_map0x0F_opcode0x10_vv2_25_l1},
/*h(350)=26 */ {350, xed3_phash_find_map0x0F_opcode0x10_vv2_26_l1},
/*h(994)=27 */ {994, xed3_phash_find_map0x0F_opcode0x10_vv2_27_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(918)=29 */ {918, xed3_phash_find_map0x0F_opcode0x10_vv2_29_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(986)=32 */ {986, xed3_phash_find_map0x0F_opcode0x10_vv2_32_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(156)=34 */ {156, xed3_phash_find_map0x0F_opcode0x10_vv2_34_l1},
/*h(190)=35 */ {190, xed3_phash_find_map0x0F_opcode0x10_vv2_35_l1},
/*h(978)=36 */ {978, xed3_phash_find_map0x0F_opcode0x10_vv2_36_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(902)=39 */ {902, xed3_phash_find_map0x0F_opcode0x10_vv2_39_l1},
/*h(182)=40 */ {182, xed3_phash_find_map0x0F_opcode0x10_vv2_40_l1},
/*h(216)=41 */ {216, xed3_phash_find_map0x0F_opcode0x10_vv2_41_l1},
/*h(250)=42 */ {250, xed3_phash_find_map0x0F_opcode0x10_vv2_42_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(606)=44 */ {606, xed3_phash_find_map0x0F_opcode0x10_vv2_44_l1},
/*h(174)=45 */ {174, xed3_phash_find_map0x0F_opcode0x10_vv2_45_l1},
/*h(962)=46 */ {962, xed3_phash_find_map0x0F_opcode0x10_vv2_46_l1},
/*h(242)=47 */ {242, xed3_phash_find_map0x0F_opcode0x10_vv2_47_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(166)=49 */ {166, xed3_phash_find_map0x0F_opcode0x10_vv2_49_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(234)=52 */ {234, xed3_phash_find_map0x0F_opcode0x10_vv2_52_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(446)=54 */ {446, xed3_phash_find_map0x0F_opcode0x10_vv2_54_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(226)=56 */ {226, xed3_phash_find_map0x0F_opcode0x10_vv2_56_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(438)=58 */ {438, xed3_phash_find_map0x0F_opcode0x10_vv2_58_l1},
/*h(472)=59 */ {472, xed3_phash_find_map0x0F_opcode0x10_vv2_59_l1},
/*h(506)=60 */ {506, xed3_phash_find_map0x0F_opcode0x10_vv2_60_l1},
/*h(218)=61 */ {218, xed3_phash_find_map0x0F_opcode0x10_vv2_61_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(142)=63 */ {142, xed3_phash_find_map0x0F_opcode0x10_vv2_63_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(498)=65 */ {498, xed3_phash_find_map0x0F_opcode0x10_vv2_65_l1},
/*h(210)=66 */ {210, xed3_phash_find_map0x0F_opcode0x10_vv2_66_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(422)=68 */ {422, xed3_phash_find_map0x0F_opcode0x10_vv2_68_l1},
/*h(24)=69 */ {24, xed3_phash_find_map0x0F_opcode0x10_vv2_69_l1},
/*h(202)=70 */ {202, xed3_phash_find_map0x0F_opcode0x10_vv2_70_l1},
/*h(668)=71 */ {668, xed3_phash_find_map0x0F_opcode0x10_vv2_71_l1},
/*h(702)=72 */ {702, xed3_phash_find_map0x0F_opcode0x10_vv2_72_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(482)=74 */ {482, xed3_phash_find_map0x0F_opcode0x10_vv2_74_l1},
/*h(194)=75 */ {194, xed3_phash_find_map0x0F_opcode0x10_vv2_75_l1},
/*h(694)=76 */ {694, xed3_phash_find_map0x0F_opcode0x10_vv2_76_l1},
/*h(406)=77 */ {406, xed3_phash_find_map0x0F_opcode0x10_vv2_77_l1},
/*h(728)=78 */ {728, xed3_phash_find_map0x0F_opcode0x10_vv2_78_l1},
/*h(762)=79 */ {762, xed3_phash_find_map0x0F_opcode0x10_vv2_79_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(686)=81 */ {686, xed3_phash_find_map0x0F_opcode0x10_vv2_81_l1},
/*h(398)=82 */ {398, xed3_phash_find_map0x0F_opcode0x10_vv2_82_l1},
/*h(754)=83 */ {754, xed3_phash_find_map0x0F_opcode0x10_vv2_83_l1},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 84ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1686)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1686, 3762},
/*h(466)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {466, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_3_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2042)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2042;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_4_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(678)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {678, 3762},
/*h(1754)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1754, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(390)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 390;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(280)=0 EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {5219}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 280;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(746)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {746, 3792},
/*h(1966)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1966, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(924)=0 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {924, 3760},
/*h(1678)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1678, 3762},
/*h(458)=2 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {458, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {5214}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(348)=0 EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 5258},
/*h(958)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {958, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2034)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {2034, 3792},
/*h(670)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {670, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1746)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_14_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(94)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5253}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 94;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(738)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_17_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(450)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {450, 3792},
/*h(1958)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1958, 3762},
/*h(1670)=2 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1670, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(950)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 950;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(662)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {662, 3762},
/*h(2026)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {2026, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_22_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(984)=0 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_SCALAR()*/ {984, 3790},
/*h(1738)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1738, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1306)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5218}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1306;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1018)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1018;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1950)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1950, 3762},
/*h(730)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {730, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1374)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5257}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1374;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(942)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_29_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(654)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {654, 3762},
/*h(2018)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {2018, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1730)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1010)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1010, 3792},
/*h(722)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {722, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1942)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_37_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(934)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 934;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2010)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {2010, 3792},
/*h(646)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {646, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(536)=0 EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {5211}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 536;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1002)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1002;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(714)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {714, 3792},
/*h(1934)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1934, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_43_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(282)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5218}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 282;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_45_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1214)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1214, 3762},
/*h(604)=1 EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 5250}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(926)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {926, 3762},
/*h(2002)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {2002, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(350)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5257}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 350;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_50_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(994)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 994;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_51_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(706)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {706, 3792},
/*h(1926)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1926, 3762},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_53_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1206)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1206;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_54_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(918)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 918;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_55_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1994)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1994;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_56_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1562)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {5210}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_57_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1274)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(986)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 986;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1630)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5249}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1630;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_62_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1198)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1198;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(156)=0 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {156, 3760},
/*h(1986)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1986, 3792},
/*h(910)=2 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {910, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_65_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(190)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1266)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1266;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_67_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(978)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 978;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1190)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(902)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_74_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(182)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {182, 3762},
/*h(1258)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1258, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_75_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(970)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_76_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(216)=0 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_SCALAR()*/ {3790}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 216;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_77_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(538)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {5210}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_78_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1470)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1470, 3762},
/*h(250)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {250, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_79_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1182)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1182;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(606)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5249}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_82_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(174)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1250)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1250;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_84_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(962)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(242)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_87_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1462)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1462;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1174)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_91_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1530)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1530, 3792},
/*h(166)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {166, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1242)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(234)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {234, 3792},
/*h(1454)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1454, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_96_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1166)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1166;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_97_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(412)=0 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {3760}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 412;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(446)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {446, 3762},
/*h(1522)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1522, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(158)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {158, 3762},
/*h(1234)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1234, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_104_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1446)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1446, 3762},
/*h(226)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {226, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1158)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1158;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_107_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(438)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 438;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_108_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(150)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {150, 3762},
/*h(1514)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1514, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_109_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1226)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1226, 3792},
/*h(472)=1 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 3790}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_111_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(506)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {506, 3792},
/*h(1726)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1726, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(218)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {218, 3792},
/*h(1438)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1438, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_116_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1506)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1506, 3792},
/*h(430)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {430, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_117_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1218)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1218, 3792},
/*h(142)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {142, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_120_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(498)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {498, 3792},
/*h(1718)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1718, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_121_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(210)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {210, 3792},
/*h(1430)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1430, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_124_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(422)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {422, 3762},
/*h(1786)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1786, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(134)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {134, 3762},
/*h(1498)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1498, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_128_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24)=0 EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {24, 5215},
/*h(490)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {490, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1710)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1710, 3762},
/*h(202)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {202, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1422)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1422, 3762},
/*h(668)=1 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {668, 3760}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(702)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {702, 3762},
/*h(92)=1 EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 5254}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_133_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(414)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {414, 3762},
/*h(1778)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1778, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1490)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1490;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(482)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {482, 3792},
/*h(1702)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1702, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_138_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(194)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {194, 3792},
/*h(1414)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1414, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(406)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {406, 3762},
/*h(694)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {694, 3762},
/*h(1770)=2 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1770, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_142_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1482)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1482;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(728)=0 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_SCALAR()*/ {3790}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 728;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1050)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {5214}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1050;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_145_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(762)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {762, 3792},
/*h(1982)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1982, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(474)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {474, 3792},
/*h(1694)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1694, 3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_148_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1118)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5253}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1118;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(686)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {3762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_150_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(398)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {398, 3762},
/*h(1762)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1762, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_151_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1474)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1474;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1974)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {1974, 3762},
/*h(754)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {754, 3792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x11_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[154] = {
/*h(1686)=0 */ {1686, xed3_phash_find_map0x0F_opcode0x11_vv2_0_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2042)=3 */ {2042, xed3_phash_find_map0x0F_opcode0x11_vv2_3_l1},
/*h(1754)=4 */ {1754, xed3_phash_find_map0x0F_opcode0x11_vv2_4_l1},
/*h(390)=5 */ {390, xed3_phash_find_map0x0F_opcode0x11_vv2_5_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(280)=7 */ {280, xed3_phash_find_map0x0F_opcode0x11_vv2_7_l1},
/*h(746)=8 */ {746, xed3_phash_find_map0x0F_opcode0x11_vv2_8_l1},
/*h(458)=9 */ {458, xed3_phash_find_map0x0F_opcode0x11_vv2_9_l1},
/*h(26)=10 */ {26, xed3_phash_find_map0x0F_opcode0x11_vv2_10_l1},
/*h(958)=11 */ {958, xed3_phash_find_map0x0F_opcode0x11_vv2_11_l1},
/*h(2034)=12 */ {2034, xed3_phash_find_map0x0F_opcode0x11_vv2_12_l1},
/*h(1746)=13 */ {1746, xed3_phash_find_map0x0F_opcode0x11_vv2_13_l1},
/*h(94)=14 */ {94, xed3_phash_find_map0x0F_opcode0x11_vv2_14_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(738)=16 */ {738, xed3_phash_find_map0x0F_opcode0x11_vv2_16_l1},
/*h(450)=17 */ {450, xed3_phash_find_map0x0F_opcode0x11_vv2_17_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(950)=20 */ {950, xed3_phash_find_map0x0F_opcode0x11_vv2_20_l1},
/*h(2026)=21 */ {2026, xed3_phash_find_map0x0F_opcode0x11_vv2_21_l1},
/*h(984)=22 */ {984, xed3_phash_find_map0x0F_opcode0x11_vv2_22_l1},
/*h(1306)=23 */ {1306, xed3_phash_find_map0x0F_opcode0x11_vv2_23_l1},
/*h(1018)=24 */ {1018, xed3_phash_find_map0x0F_opcode0x11_vv2_24_l1},
/*h(730)=25 */ {730, xed3_phash_find_map0x0F_opcode0x11_vv2_25_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1374)=27 */ {1374, xed3_phash_find_map0x0F_opcode0x11_vv2_27_l1},
/*h(942)=28 */ {942, xed3_phash_find_map0x0F_opcode0x11_vv2_28_l1},
/*h(2018)=29 */ {2018, xed3_phash_find_map0x0F_opcode0x11_vv2_29_l1},
/*h(1730)=30 */ {1730, xed3_phash_find_map0x0F_opcode0x11_vv2_30_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1010)=33 */ {1010, xed3_phash_find_map0x0F_opcode0x11_vv2_33_l1},
/*h(1942)=34 */ {1942, xed3_phash_find_map0x0F_opcode0x11_vv2_34_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(934)=37 */ {934, xed3_phash_find_map0x0F_opcode0x11_vv2_37_l1},
/*h(2010)=38 */ {2010, xed3_phash_find_map0x0F_opcode0x11_vv2_38_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(536)=40 */ {536, xed3_phash_find_map0x0F_opcode0x11_vv2_40_l1},
/*h(1002)=41 */ {1002, xed3_phash_find_map0x0F_opcode0x11_vv2_41_l1},
/*h(1934)=42 */ {1934, xed3_phash_find_map0x0F_opcode0x11_vv2_42_l1},
/*h(282)=43 */ {282, xed3_phash_find_map0x0F_opcode0x11_vv2_43_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1214)=45 */ {1214, xed3_phash_find_map0x0F_opcode0x11_vv2_45_l1},
/*h(926)=46 */ {926, xed3_phash_find_map0x0F_opcode0x11_vv2_46_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(350)=48 */ {350, xed3_phash_find_map0x0F_opcode0x11_vv2_48_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(994)=50 */ {994, xed3_phash_find_map0x0F_opcode0x11_vv2_50_l1},
/*h(1926)=51 */ {1926, xed3_phash_find_map0x0F_opcode0x11_vv2_51_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1206)=53 */ {1206, xed3_phash_find_map0x0F_opcode0x11_vv2_53_l1},
/*h(918)=54 */ {918, xed3_phash_find_map0x0F_opcode0x11_vv2_54_l1},
/*h(1994)=55 */ {1994, xed3_phash_find_map0x0F_opcode0x11_vv2_55_l1},
/*h(1562)=56 */ {1562, xed3_phash_find_map0x0F_opcode0x11_vv2_56_l1},
/*h(1274)=57 */ {1274, xed3_phash_find_map0x0F_opcode0x11_vv2_57_l1},
/*h(986)=58 */ {986, xed3_phash_find_map0x0F_opcode0x11_vv2_58_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1630)=60 */ {1630, xed3_phash_find_map0x0F_opcode0x11_vv2_60_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1198)=62 */ {1198, xed3_phash_find_map0x0F_opcode0x11_vv2_62_l1},
/*h(1986)=63 */ {1986, xed3_phash_find_map0x0F_opcode0x11_vv2_63_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(190)=65 */ {190, xed3_phash_find_map0x0F_opcode0x11_vv2_65_l1},
/*h(1266)=66 */ {1266, xed3_phash_find_map0x0F_opcode0x11_vv2_66_l1},
/*h(978)=67 */ {978, xed3_phash_find_map0x0F_opcode0x11_vv2_67_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1190)=70 */ {1190, xed3_phash_find_map0x0F_opcode0x11_vv2_70_l1},
/*h(902)=71 */ {902, xed3_phash_find_map0x0F_opcode0x11_vv2_71_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1258)=74 */ {1258, xed3_phash_find_map0x0F_opcode0x11_vv2_74_l1},
/*h(970)=75 */ {970, xed3_phash_find_map0x0F_opcode0x11_vv2_75_l1},
/*h(216)=76 */ {216, xed3_phash_find_map0x0F_opcode0x11_vv2_76_l1},
/*h(538)=77 */ {538, xed3_phash_find_map0x0F_opcode0x11_vv2_77_l1},
/*h(250)=78 */ {250, xed3_phash_find_map0x0F_opcode0x11_vv2_78_l1},
/*h(1182)=79 */ {1182, xed3_phash_find_map0x0F_opcode0x11_vv2_79_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(606)=81 */ {606, xed3_phash_find_map0x0F_opcode0x11_vv2_81_l1},
/*h(174)=82 */ {174, xed3_phash_find_map0x0F_opcode0x11_vv2_82_l1},
/*h(1250)=83 */ {1250, xed3_phash_find_map0x0F_opcode0x11_vv2_83_l1},
/*h(962)=84 */ {962, xed3_phash_find_map0x0F_opcode0x11_vv2_84_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(242)=86 */ {242, xed3_phash_find_map0x0F_opcode0x11_vv2_86_l1},
/*h(1462)=87 */ {1462, xed3_phash_find_map0x0F_opcode0x11_vv2_87_l1},
/*h(1174)=88 */ {1174, xed3_phash_find_map0x0F_opcode0x11_vv2_88_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1530)=91 */ {1530, xed3_phash_find_map0x0F_opcode0x11_vv2_91_l1},
/*h(1242)=92 */ {1242, xed3_phash_find_map0x0F_opcode0x11_vv2_92_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(234)=95 */ {234, xed3_phash_find_map0x0F_opcode0x11_vv2_95_l1},
/*h(1166)=96 */ {1166, xed3_phash_find_map0x0F_opcode0x11_vv2_96_l1},
/*h(412)=97 */ {412, xed3_phash_find_map0x0F_opcode0x11_vv2_97_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1522)=99 */ {1522, xed3_phash_find_map0x0F_opcode0x11_vv2_99_l1},
/*h(1234)=100 */ {1234, xed3_phash_find_map0x0F_opcode0x11_vv2_100_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1446)=104 */ {1446, xed3_phash_find_map0x0F_opcode0x11_vv2_104_l1},
/*h(1158)=105 */ {1158, xed3_phash_find_map0x0F_opcode0x11_vv2_105_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(438)=107 */ {438, xed3_phash_find_map0x0F_opcode0x11_vv2_107_l1},
/*h(1514)=108 */ {1514, xed3_phash_find_map0x0F_opcode0x11_vv2_108_l1},
/*h(472)=109 */ {472, xed3_phash_find_map0x0F_opcode0x11_vv2_109_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(506)=111 */ {506, xed3_phash_find_map0x0F_opcode0x11_vv2_111_l1},
/*h(1438)=112 */ {1438, xed3_phash_find_map0x0F_opcode0x11_vv2_112_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1506)=116 */ {1506, xed3_phash_find_map0x0F_opcode0x11_vv2_116_l1},
/*h(142)=117 */ {142, xed3_phash_find_map0x0F_opcode0x11_vv2_117_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1718)=120 */ {1718, xed3_phash_find_map0x0F_opcode0x11_vv2_120_l1},
/*h(210)=121 */ {210, xed3_phash_find_map0x0F_opcode0x11_vv2_121_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1786)=124 */ {1786, xed3_phash_find_map0x0F_opcode0x11_vv2_124_l1},
/*h(1498)=125 */ {1498, xed3_phash_find_map0x0F_opcode0x11_vv2_125_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(490)=128 */ {490, xed3_phash_find_map0x0F_opcode0x11_vv2_128_l1},
/*h(202)=129 */ {202, xed3_phash_find_map0x0F_opcode0x11_vv2_129_l1},
/*h(1422)=130 */ {1422, xed3_phash_find_map0x0F_opcode0x11_vv2_130_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(702)=132 */ {702, xed3_phash_find_map0x0F_opcode0x11_vv2_132_l1},
/*h(1778)=133 */ {1778, xed3_phash_find_map0x0F_opcode0x11_vv2_133_l1},
/*h(1490)=134 */ {1490, xed3_phash_find_map0x0F_opcode0x11_vv2_134_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(482)=137 */ {482, xed3_phash_find_map0x0F_opcode0x11_vv2_137_l1},
/*h(1414)=138 */ {1414, xed3_phash_find_map0x0F_opcode0x11_vv2_138_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1770)=141 */ {1770, xed3_phash_find_map0x0F_opcode0x11_vv2_141_l1},
/*h(1482)=142 */ {1482, xed3_phash_find_map0x0F_opcode0x11_vv2_142_l1},
/*h(728)=143 */ {728, xed3_phash_find_map0x0F_opcode0x11_vv2_143_l1},
/*h(1050)=144 */ {1050, xed3_phash_find_map0x0F_opcode0x11_vv2_144_l1},
/*h(762)=145 */ {762, xed3_phash_find_map0x0F_opcode0x11_vv2_145_l1},
/*h(474)=146 */ {474, xed3_phash_find_map0x0F_opcode0x11_vv2_146_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1118)=148 */ {1118, xed3_phash_find_map0x0F_opcode0x11_vv2_148_l1},
/*h(686)=149 */ {686, xed3_phash_find_map0x0F_opcode0x11_vv2_149_l1},
/*h(398)=150 */ {398, xed3_phash_find_map0x0F_opcode0x11_vv2_150_l1},
/*h(1474)=151 */ {1474, xed3_phash_find_map0x0F_opcode0x11_vv2_151_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(754)=153 */ {754, xed3_phash_find_map0x0F_opcode0x11_vv2_153_l1},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 154ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(34)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {4834}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 34;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_2_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2364)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {2364, 4220},
/*h(102)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {102, 6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_4_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(170)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {170, 4827},
/*h(3508)=1 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3508, 4567},
/*h(314)=2 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {314, 4221}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_6_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1458)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {4568}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1458;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(18)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {4834}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 18;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3390)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3390, 4218},
/*h(950)=1 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {950, 4571}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(86)=0 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 86;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1340)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1340, 4218},
/*h(2992)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2992, 4572}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(154)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 154;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_14_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2484)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4569}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2484;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(434)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {434, 4570},
/*h(2)=1 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {2, 4834},
/*h(2874)=2 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {2874, 4223}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_18_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(824)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {824, 4223},
/*h(70)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {70, 6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2366)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4220}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2366;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(138)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 138;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3510)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3510, 4567},
/*h(316)=1 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {316, 4220}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1460)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4567}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1460;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_26_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(54)=0 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 54;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2994)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2994, 4572},
/*h(1342)=1 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1342, 4218}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3384)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {3384, 4219},
/*h(944)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {944, 4572}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2486)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4569}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2486;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_32_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(114)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {4834}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 114;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2876)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {2876, 4222},
/*h(436)=1 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {436, 4569}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(38)=0 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 38;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_35_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(826)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {4223}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 826;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(250)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 250;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(318)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4220}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 318;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1462)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1462, 4567},
/*h(98)=1 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {98, 4834},
/*h(2360)=2 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {2360, 4221}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 17) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3504)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {3504, 4568},
/*h(22)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {22, 6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(234)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 234;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_45_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2996)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4571}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2996;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_47_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3386)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {3386, 4219},
/*h(946)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {946, 4572}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(82)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {4834}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 82;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_49_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1336)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {4219}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1336;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_50_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2878)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {2878, 4222},
/*h(6)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {6, 6352},
/*h(438)=2 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {438, 4569}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_52_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(828)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {828, 4222},
/*h(2480)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2480, 4570},
/*h(218)=2 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {218, 4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_56_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(66)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {4834}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 66;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_57_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2362)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {4221}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2362;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(312)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {312, 4221},
/*h(3506)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {3506, 4568}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(202)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 202;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_61_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1456)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {4568}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_62_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2998)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4571}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_64_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(948)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {948, 4571},
/*h(3388)=1 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3388, 4218},
/*h(50)=2 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 4834}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1338)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {1338, 4219},
/*h(118)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {118, 6352}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(186)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {4827}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 186;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(830)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {830, 4222},
/*h(2482)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2482, 4570}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(432)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {432, 4570},
/*h(2872)=1 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_MOVDDUP()*/ {2872, 4223}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x12_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[72] = {
/*h(34)=0 */ {34, xed3_phash_find_map0x0F_opcode0x12_vv2_0_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(102)=2 */ {102, xed3_phash_find_map0x0F_opcode0x12_vv2_2_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(314)=4 */ {314, xed3_phash_find_map0x0F_opcode0x12_vv2_4_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1458)=6 */ {1458, xed3_phash_find_map0x0F_opcode0x12_vv2_6_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(18)=8 */ {18, xed3_phash_find_map0x0F_opcode0x12_vv2_8_l1},
/*h(950)=9 */ {950, xed3_phash_find_map0x0F_opcode0x12_vv2_9_l1},
/*h(86)=10 */ {86, xed3_phash_find_map0x0F_opcode0x12_vv2_10_l1},
/*h(1340)=11 */ {1340, xed3_phash_find_map0x0F_opcode0x12_vv2_11_l1},
/*h(154)=12 */ {154, xed3_phash_find_map0x0F_opcode0x12_vv2_12_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2484)=14 */ {2484, xed3_phash_find_map0x0F_opcode0x12_vv2_14_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(434)=16 */ {434, xed3_phash_find_map0x0F_opcode0x12_vv2_16_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(70)=18 */ {70, xed3_phash_find_map0x0F_opcode0x12_vv2_18_l1},
/*h(2366)=19 */ {2366, xed3_phash_find_map0x0F_opcode0x12_vv2_19_l1},
/*h(138)=20 */ {138, xed3_phash_find_map0x0F_opcode0x12_vv2_20_l1},
/*h(3510)=21 */ {3510, xed3_phash_find_map0x0F_opcode0x12_vv2_21_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1460)=23 */ {1460, xed3_phash_find_map0x0F_opcode0x12_vv2_23_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(54)=26 */ {54, xed3_phash_find_map0x0F_opcode0x12_vv2_26_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1342)=28 */ {1342, xed3_phash_find_map0x0F_opcode0x12_vv2_28_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3384)=30 */ {3384, xed3_phash_find_map0x0F_opcode0x12_vv2_30_l1},
/*h(2486)=31 */ {2486, xed3_phash_find_map0x0F_opcode0x12_vv2_31_l1},
/*h(114)=32 */ {114, xed3_phash_find_map0x0F_opcode0x12_vv2_32_l1},
/*h(436)=33 */ {436, xed3_phash_find_map0x0F_opcode0x12_vv2_33_l1},
/*h(38)=34 */ {38, xed3_phash_find_map0x0F_opcode0x12_vv2_34_l1},
/*h(826)=35 */ {826, xed3_phash_find_map0x0F_opcode0x12_vv2_35_l1},
/*h(250)=36 */ {250, xed3_phash_find_map0x0F_opcode0x12_vv2_36_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(318)=38 */ {318, xed3_phash_find_map0x0F_opcode0x12_vv2_38_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(98)=40 */ {98, xed3_phash_find_map0x0F_opcode0x12_vv2_40_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3504)=42 */ {3504, xed3_phash_find_map0x0F_opcode0x12_vv2_42_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(234)=44 */ {234, xed3_phash_find_map0x0F_opcode0x12_vv2_44_l1},
/*h(2996)=45 */ {2996, xed3_phash_find_map0x0F_opcode0x12_vv2_45_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3386)=47 */ {3386, xed3_phash_find_map0x0F_opcode0x12_vv2_47_l1},
/*h(82)=48 */ {82, xed3_phash_find_map0x0F_opcode0x12_vv2_48_l1},
/*h(1336)=49 */ {1336, xed3_phash_find_map0x0F_opcode0x12_vv2_49_l1},
/*h(438)=50 */ {438, xed3_phash_find_map0x0F_opcode0x12_vv2_50_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2480)=52 */ {2480, xed3_phash_find_map0x0F_opcode0x12_vv2_52_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(66)=56 */ {66, xed3_phash_find_map0x0F_opcode0x12_vv2_56_l1},
/*h(2362)=57 */ {2362, xed3_phash_find_map0x0F_opcode0x12_vv2_57_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3506)=59 */ {3506, xed3_phash_find_map0x0F_opcode0x12_vv2_59_l1},
/*h(202)=60 */ {202, xed3_phash_find_map0x0F_opcode0x12_vv2_60_l1},
/*h(1456)=61 */ {1456, xed3_phash_find_map0x0F_opcode0x12_vv2_61_l1},
/*h(2998)=62 */ {2998, xed3_phash_find_map0x0F_opcode0x12_vv2_62_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(50)=64 */ {50, xed3_phash_find_map0x0F_opcode0x12_vv2_64_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1338)=66 */ {1338, xed3_phash_find_map0x0F_opcode0x12_vv2_66_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(186)=68 */ {186, xed3_phash_find_map0x0F_opcode0x12_vv2_68_l1},
/*h(830)=69 */ {830, xed3_phash_find_map0x0F_opcode0x12_vv2_69_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2872)=71 */ {2872, xed3_phash_find_map0x0F_opcode0x12_vv2_71_l1},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 72ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x13_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(186)=0 EVV 0x13 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 4828},
/*h(50)=1 EVV 0x13 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 4835}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x14_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 6472},
/*h(14)=1 EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6492},
/*h(66)=2 EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 6469},
/*h(77)=3 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6491},
/*h(32)=4 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 6474},
/*h(46)=5 EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6494},
/*h(1)=6 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 6472},
/*h(12)=7 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6493},
/*h(64)=8 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 6470},
/*h(78)=9 EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6490},
/*h(33)=10 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 6474},
/*h(44)=11 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6495},
/*h(2)=12 EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 6471},
/*h(13)=13 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6493},
/*h(65)=14 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 6470},
/*h(76)=15 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6491},
/*h(34)=16 EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 6473},
/*h(45)=17 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6495}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x15_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 5101},
/*h(14)=1 EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4477},
/*h(66)=2 EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 5098},
/*h(77)=3 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4476},
/*h(32)=4 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 5103},
/*h(46)=5 EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4479},
/*h(1)=6 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 5101},
/*h(12)=7 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4478},
/*h(64)=8 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 5099},
/*h(78)=9 EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4475},
/*h(33)=10 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 5103},
/*h(44)=11 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4480},
/*h(2)=12 EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 5100},
/*h(13)=13 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4478},
/*h(65)=14 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 5099},
/*h(76)=15 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4476},
/*h(34)=16 EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 5102},
/*h(45)=17 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4480}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x16_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[96] = {
/*empty slot1 */ {0,0},
/*h(2992)=1 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2992, 4036},
/*h(3504)=2 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {3504, 4032},
/*h(250)=3 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {250, 5464},
/*h(154)=4 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {154, 5464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2486)=7 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {2486, 4033},
/*h(2998)=8 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {2998, 4035},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(34)=15 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {34, 5480},
/*empty slot1 */ {0,0},
/*h(1456)=17 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {1456, 4032},
/*empty slot1 */ {0,0},
/*h(2480)=19 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2480, 4034},
/*empty slot1 */ {0,0},
/*h(66)=21 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {66, 5480},
/*h(438)=22 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {438, 4033},
/*h(950)=23 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {950, 4035},
/*h(1462)=24 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1462, 4031},
/*empty slot1 */ {0,0},
/*h(54)=26 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {54, 4833},
/*h(98)=27 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {98, 5480},
/*h(2)=28 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {2, 5480},
/*h(2994)=29 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2994, 4036},
/*h(3506)=30 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {3506, 4032},
/*empty slot1 */ {0,0},
/*h(86)=32 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {86, 4833},
/*empty slot1 */ {0,0},
/*h(432)=34 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {432, 4034},
/*h(944)=35 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {944, 4036},
/*h(170)=36 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {170, 5464},
/*empty slot1 */ {0,0},
/*h(118)=38 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {118, 4833},
/*h(22)=39 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {22, 4833},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(202)=42 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {202, 5464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1458)=45 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {1458, 4032},
/*empty slot1 */ {0,0},
/*h(2482)=47 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {2482, 4034},
/*h(234)=48 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {234, 5464},
/*h(138)=49 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {138, 5464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2996)=57 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {2996, 4035},
/*h(3508)=58 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3508, 4031},
/*h(114)=59 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {114, 5480},
/*h(18)=60 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {18, 5480},
/*empty slot1 */ {0,0},
/*h(434)=62 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {434, 4034},
/*h(946)=63 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {946, 4036},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(50)=66 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 5480},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(38)=71 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {38, 4833},
/*h(82)=72 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {82, 5480},
/*h(1460)=73 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1460, 4031},
/*empty slot1 */ {0,0},
/*h(2484)=75 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {2484, 4033},
/*empty slot1 */ {0,0},
/*h(70)=77 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {70, 4833},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(102)=83 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {102, 4833},
/*h(6)=84 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0*/ {6, 4833},
/*empty slot1 */ {0,0},
/*h(3510)=86 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3510, 4031},
/*h(186)=87 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 5464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(436)=90 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {436, 4033},
/*h(948)=91 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {948, 4035},
/*empty slot1 */ {0,0},
/*h(218)=93 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {218, 5464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((14*key % 269) % 96);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x17_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(186)=0 EVV 0x17 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 5465},
/*h(50)=1 EVV 0x17 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 5481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x28_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(606)=0 EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5919},
/*h(24)=1 EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {24, 4300},
/*h(280)=2 EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {280, 4304},
/*h(536)=3 EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {536, 4296},
/*h(92)=4 EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 5924},
/*h(348)=5 EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 5928},
/*h(604)=6 EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 5920},
/*h(26)=7 EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {26, 4299},
/*h(282)=8 EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {282, 4303},
/*h(538)=9 EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {538, 4295},
/*h(94)=10 EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5923},
/*h(350)=11 EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5927}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 59) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x29_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[36] = {
/*h(94)=0 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5925},
/*h(26)=1 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {26, 4301},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=8 EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 5922},
/*h(536)=9 EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {536, 4298},
/*empty slot1 */ {0,0},
/*h(1630)=11 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1630, 5921},
/*h(1562)=12 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1562, 4297},
/*empty slot1 */ {0,0},
/*h(606)=14 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5921},
/*h(538)=15 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {538, 4297},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(348)=19 EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 5930},
/*h(280)=20 EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {280, 4306},
/*empty slot1 */ {0,0},
/*h(1374)=22 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1374, 5929},
/*h(1306)=23 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1306, 4305},
/*empty slot1 */ {0,0},
/*h(350)=25 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5929},
/*h(282)=26 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {282, 4305},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=30 EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 5926},
/*h(24)=31 EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {24, 4302},
/*empty slot1 */ {0,0},
/*h(1118)=33 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1118, 5925},
/*h(1050)=34 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1050, 4301},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 41) % 36);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[62] = {
/*h(134)=0 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {134, 6303},
/*h(234)=1 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {234, 6250},
/*h(142)=2 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {142, 6303},
/*empty slot1 */ {0,0},
/*h(226)=4 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {226, 6250},
/*h(210)=5 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {210, 6251},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(202)=8 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {202, 6250},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(194)=11 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {194, 6250},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(178)=17 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {178, 6309},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(170)=20 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {170, 6305},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(162)=23 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {162, 6305},
/*empty slot1 */ {0,0},
/*h(246)=25 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {246, 6252},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(238)=28 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {238, 6246},
/*h(146)=29 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {146, 6306},
/*empty slot1 */ {0,0},
/*h(230)=31 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {230, 6246},
/*h(138)=32 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {138, 6305},
/*h(247)=33 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {247, 6253},
/*empty slot1 */ {0,0},
/*h(130)=35 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {130, 6305},
/*h(239)=36 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {239, 6248},
/*h(214)=37 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {214, 6247},
/*empty slot1 */ {0,0},
/*h(231)=39 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {231, 6248},
/*h(206)=40 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {206, 6246},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(198)=43 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {198, 6246},
/*empty slot1 */ {0,0},
/*h(215)=45 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {215, 6249},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(207)=48 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {207, 6248},
/*h(182)=49 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {182, 6307},
/*empty slot1 */ {0,0},
/*h(199)=51 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {199, 6248},
/*h(174)=52 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {174, 6303},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(166)=55 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {166, 6303},
/*empty slot1 */ {0,0},
/*h(183)=57 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {183, 6308},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(242)=60 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {242, 6254},
/*h(150)=61 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {150, 6304}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_ZEROING(d);
hidx = ((8*key % 67) % 62);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(562)=0 EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {562, 6483},
/*h(698)=1 EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {698, 6452},
/*h(1074)=2 EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {1074, 6481},
/*h(50)=3 EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {50, 6482},
/*h(1210)=4 EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {1210, 6450},
/*h(186)=5 EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {186, 6451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[120] = {
/*empty slot1 */ {0,0},
/*h(2455)=1 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2455, 6720},
/*h(3502)=2 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3502, 4852},
/*empty slot1 */ {0,0},
/*h(2510)=4 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2510, 6717},
/*h(2514)=5 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2514, 6725},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2447)=12 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2447, 6719},
/*h(3494)=13 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3494, 4852},
/*h(3498)=14 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3498, 4856},
/*h(2502)=15 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2502, 6717},
/*h(2506)=16 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2506, 6721},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2519)=20 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2519, 6724},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2439)=23 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2439, 6719},
/*empty slot1 */ {0,0},
/*h(3490)=25 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3490, 4856},
/*empty slot1 */ {0,0},
/*h(2498)=27 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2498, 6721},
/*empty slot1 */ {0,0},
/*h(3503)=29 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3503, 4854},
/*empty slot1 */ {0,0},
/*h(2511)=31 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2511, 6719},
/*empty slot1 */ {0,0},
/*h(3562)=33 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3562, 4856},
/*h(3566)=34 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3566, 4852},
/*h(3478)=35 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3478, 4853},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3495)=40 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3495, 4854},
/*empty slot1 */ {0,0},
/*h(2503)=42 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2503, 6719},
/*empty slot1 */ {0,0},
/*h(3554)=44 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3554, 4856},
/*h(3558)=45 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3558, 4852},
/*h(3470)=46 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3470, 4852},
/*h(3474)=47 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3474, 4857},
/*h(2478)=48 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2478, 6717},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3462)=57 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3462, 4852},
/*h(3466)=58 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3466, 4856},
/*h(2470)=59 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2470, 6717},
/*h(2474)=60 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2474, 6721},
/*h(3567)=61 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3567, 4854},
/*h(3479)=62 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3479, 4855},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3538)=66 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3538, 4860},
/*h(3542)=67 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3542, 4858},
/*empty slot1 */ {0,0},
/*h(3458)=69 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3458, 4856},
/*empty slot1 */ {0,0},
/*h(2466)=71 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2466, 6721},
/*h(3559)=72 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3559, 4854},
/*h(3471)=73 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3471, 4854},
/*empty slot1 */ {0,0},
/*h(2479)=75 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2479, 6719},
/*empty slot1 */ {0,0},
/*h(3530)=77 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3530, 4856},
/*h(3534)=78 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3534, 4852},
/*h(2538)=79 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2538, 6721},
/*h(2542)=80 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2542, 6717},
/*h(2454)=81 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2454, 6718},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3463)=84 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3463, 4854},
/*empty slot1 */ {0,0},
/*h(2471)=86 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2471, 6719},
/*empty slot1 */ {0,0},
/*h(3522)=88 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3522, 4856},
/*h(3526)=89 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3526, 4852},
/*h(2530)=90 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2530, 6721},
/*h(2534)=91 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2534, 6717},
/*h(2446)=92 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2446, 6717},
/*h(2450)=93 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2450, 6722},
/*h(3543)=94 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3543, 4859},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2438)=103 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2438, 6717},
/*h(2442)=104 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2442, 6721},
/*h(3535)=105 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3535, 4854},
/*empty slot1 */ {0,0},
/*h(2543)=107 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2543, 6719},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2518)=113 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2518, 6723},
/*empty slot1 */ {0,0},
/*h(2434)=115 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2434, 6721},
/*h(3527)=116 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3527, 4854},
/*empty slot1 */ {0,0},
/*h(2535)=118 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2535, 6719},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
hidx = ((27*key % 227) % 120);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[120] = {
/*empty slot1 */ {0,0},
/*h(2455)=1 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {2455, 6320},
/*h(3502)=2 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3502, 5338},
/*empty slot1 */ {0,0},
/*h(2510)=4 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2510, 6317},
/*h(2514)=5 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2514, 6325},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2447)=12 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2447, 6319},
/*h(3494)=13 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3494, 5338},
/*h(3498)=14 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3498, 5342},
/*h(2502)=15 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2502, 6317},
/*h(2506)=16 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2506, 6321},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2519)=20 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2519, 6324},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2439)=23 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2439, 6319},
/*empty slot1 */ {0,0},
/*h(3490)=25 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3490, 5342},
/*empty slot1 */ {0,0},
/*h(2498)=27 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2498, 6321},
/*empty slot1 */ {0,0},
/*h(3503)=29 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3503, 5340},
/*empty slot1 */ {0,0},
/*h(2511)=31 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2511, 6319},
/*empty slot1 */ {0,0},
/*h(3562)=33 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3562, 5342},
/*h(3566)=34 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3566, 5338},
/*h(3478)=35 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3478, 5339},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3495)=40 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3495, 5340},
/*empty slot1 */ {0,0},
/*h(2503)=42 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2503, 6319},
/*empty slot1 */ {0,0},
/*h(3554)=44 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3554, 5342},
/*h(3558)=45 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3558, 5338},
/*h(3470)=46 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3470, 5338},
/*h(3474)=47 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3474, 5343},
/*h(2478)=48 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2478, 6317},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3462)=57 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3462, 5338},
/*h(3466)=58 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3466, 5342},
/*h(2470)=59 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2470, 6317},
/*h(2474)=60 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2474, 6321},
/*h(3567)=61 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3567, 5340},
/*h(3479)=62 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3479, 5341},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3538)=66 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3538, 5346},
/*h(3542)=67 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3542, 5344},
/*empty slot1 */ {0,0},
/*h(3458)=69 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3458, 5342},
/*empty slot1 */ {0,0},
/*h(2466)=71 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2466, 6321},
/*h(3559)=72 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3559, 5340},
/*h(3471)=73 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3471, 5340},
/*empty slot1 */ {0,0},
/*h(2479)=75 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2479, 6319},
/*empty slot1 */ {0,0},
/*h(3530)=77 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3530, 5342},
/*h(3534)=78 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3534, 5338},
/*h(2538)=79 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2538, 6321},
/*h(2542)=80 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2542, 6317},
/*h(2454)=81 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {2454, 6318},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3463)=84 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3463, 5340},
/*empty slot1 */ {0,0},
/*h(2471)=86 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2471, 6319},
/*empty slot1 */ {0,0},
/*h(3522)=88 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3522, 5342},
/*h(3526)=89 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3526, 5338},
/*h(2530)=90 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2530, 6321},
/*h(2534)=91 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2534, 6317},
/*h(2446)=92 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2446, 6317},
/*h(2450)=93 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2450, 6322},
/*h(3543)=94 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3543, 5345},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2438)=103 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2438, 6317},
/*h(2442)=104 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2442, 6321},
/*h(3535)=105 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3535, 5340},
/*empty slot1 */ {0,0},
/*h(2543)=107 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2543, 6319},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2518)=113 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2518, 6323},
/*empty slot1 */ {0,0},
/*h(2434)=115 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2434, 6321},
/*h(3527)=116 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3527, 5340},
/*empty slot1 */ {0,0},
/*h(2535)=118 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2535, 6319},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
hidx = ((27*key % 227) % 120);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(191)=0 EVV 0x2E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1  NOEVSR  ZEROING=0 MASK=0*/ {191, 5752},
/*h(190)=1 EVV 0x2E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1  NOEVSR  ZEROING=0 MASK=0*/ {190, 5751},
/*h(50)=2 EVV 0x2E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_SCALAR()*/ {50, 5707},
/*h(55)=3 EVV 0x2E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0  NOEVSR  ZEROING=0 MASK=0*/ {55, 5706},
/*h(54)=4 EVV 0x2E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0  NOEVSR  ZEROING=0 MASK=0*/ {54, 5705},
/*h(186)=5 EVV 0x2E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 5753}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
hidx = ((28*key % 29) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x2f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(191)=0 EVV 0x2F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1  NOEVSR  ZEROING=0 MASK=0*/ {191, 4497},
/*h(190)=1 EVV 0x2F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1  NOEVSR  ZEROING=0 MASK=0*/ {190, 4496},
/*h(50)=2 EVV 0x2F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_SCALAR()*/ {50, 4501},
/*h(55)=3 EVV 0x2F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0  NOEVSR  ZEROING=0 MASK=0*/ {55, 4500},
/*h(54)=4 EVV 0x2F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0  NOEVSR  ZEROING=0 MASK=0*/ {54, 4499},
/*h(186)=5 EVV 0x2F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 4498}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
hidx = ((28*key % 29) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(466)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 466;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_1_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(932)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 932;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_3_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(644)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 644;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(678)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 678;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_6_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(911)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(390)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {390, 4451},
/*h(1000)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {1000, 4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(712)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(191)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 191;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(280)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4699}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 280;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(746)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(458)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {458, 4472},
/*h(979)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {979, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(924)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 924;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_15_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4696}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 26;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(348)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4737},
/*h(958)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {958, 4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_18_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(670)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {670, 4451},
/*h(903)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {903, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(992)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 992;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(704)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {704, 4474},
/*h(94)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 4734}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(183)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 183;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(738)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(971)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 971;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(450)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {450, 4472},
/*h(916)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {916, 4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_26_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(539)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4694}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 539;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(251)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 251;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(950)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 950;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(662)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(984)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {984, 4474},
/*h(607)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {607, 4732}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(175)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 175;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1018)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1018;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_35_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(730)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(963)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 963;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(908)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 908;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(243)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 243;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(942)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(188)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 188;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(654)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_43_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(976)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 976;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1010)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1010, 4472},
/*h(167)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {167, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(722)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_50_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(900)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 900;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_51_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(235)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 235;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_53_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(180)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {180, 4453},
/*h(934)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {934, 4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_54_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(646)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 646;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_56_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(968)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {968, 4474},
/*h(447)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {447, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(536)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {536, 4695},
/*h(1002)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1002, 4472},
/*h(159)=2 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {159, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(248)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 248;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(714)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 714;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_62_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(282)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4698}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 282;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(604)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4733}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 604;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_64_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(227)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 227;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_65_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(926)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {926, 4451},
/*h(172)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {172, 4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_67_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(350)=0 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4736}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 350;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(960)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 960;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(439)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 439;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(151)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 151;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(240)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {240, 4474},
/*h(994)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {994, 4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_72_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(706)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 706;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(795)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4694}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 795;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_74_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(507)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 507;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_76_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(219)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 219;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_77_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(918)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {918, 4451},
/*h(164)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {164, 4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_79_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(863)=0 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4732}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 863;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(431)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 431;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_82_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(143)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 143;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(986)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {986, 4472},
/*h(232)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {232, 4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(499)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 499;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(444)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {444, 4453},
/*h(211)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {211, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_89_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(910)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 910;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_90_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(156)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 156;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(190)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(423)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 423;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_94_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(135)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 135;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(978)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {978, 4472},
/*h(224)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {224, 4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_98_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4697}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 25;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(491)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 491;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(436)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {436, 4453},
/*h(203)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {203, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_101_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(902)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(148)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 148;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_104_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(93)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 4735},
/*h(703)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {703, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(182)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {182, 4451},
/*h(415)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {415, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(504)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 504;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_107_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(216)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {216, 4474},
/*h(970)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {970, 4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_109_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(538)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4693}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_110_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(250)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 250;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_111_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(483)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 483;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(195)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 195;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(428)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 428;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_114_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(140)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 140;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_115_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(606)=0 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4731}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_116_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(695)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 695;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_117_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(174)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {174, 4451},
/*h(407)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {407, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_118_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(496)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 496;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_119_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(962)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_120_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(208)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 208;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(763)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 763;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_123_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(242)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {242, 4472},
/*h(475)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {475, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(420)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 420;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_126_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(132)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 132;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_128_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(687)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(166)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {166, 4451},
/*h(399)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {399, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(488)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 488;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(200)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 200;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(755)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 755;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_135_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(234)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {234, 4472},
/*h(700)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {700, 4453},
/*h(467)=2 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {467, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(412)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 412;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_140_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(446)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {446, 4451},
/*h(679)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {679, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(158)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {158, 4451},
/*h(391)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {391, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(480)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 480;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(192)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 192;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_145_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(281)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4699}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 281;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(747)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 747;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_147_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(226)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {226, 4472},
/*h(459)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {459, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_148_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(692)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 692;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(404)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {404, 4453},
/*h(27)=1 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {27, 4694}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_151_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(959)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {959, 4452},
/*h(349)=1 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4737}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_152_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(438)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {438, 4451},
/*h(671)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {671, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(150)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {150, 4451},
/*h(760)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {760, 4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_155_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(472)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 4474},
/*h(95)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {95, 4732}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_158_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(506)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {506, 4472},
/*h(739)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {739, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_159_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(218)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {218, 4472},
/*h(451)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {451, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_160_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(684)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 684;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_161_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(396)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 396;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(951)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 951;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_164_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(430)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {430, 4451},
/*h(663)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {663, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(142)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 142;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_166_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(752)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 752;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(464)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 464;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_169_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1019)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1019;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_170_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(498)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {498, 4472},
/*h(731)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {731, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_171_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(210)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_172_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(676)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 676;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(388)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 388;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_175_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(943)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 943;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_176_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(422)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 422;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_177_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(655)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 655;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(744)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {744, 4474},
/*h(134)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {134, 4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_179_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(456)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_181_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24, 4697},
/*h(1011)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {1011, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(490)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {490, 4472},
/*h(723)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {723, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(956)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {956, 4453},
/*h(202)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {202, 4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_184_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(668)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 668;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_187_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(935)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {935, 4452},
/*h(92)=1 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 4735},
/*h(702)=2 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {702, 4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(414)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 414;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_189_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(647)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 647;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(736)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 736;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_191_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(448)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 448;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_192_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(537)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4695}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 537;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_193_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1003)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_194_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(482)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {482, 4472},
/*h(715)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {715, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(948)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {948, 4453},
/*h(194)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {194, 4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_196_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(660)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {660, 4453},
/*h(283)=1 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {283, 4694}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(605)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4733}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 605;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_199_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(694)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 694;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_200_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(406)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {406, 4451},
/*h(927)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {927, 4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_201_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1016)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1016;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(728)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {728, 4474},
/*h(351)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {351, 4732}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_205_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(762)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {762, 4472},
/*h(995)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {995, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_206_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(474)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4472}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 474;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_207_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(940)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {940, 4453},
/*h(707)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {707, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(652)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {4453}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 652;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_211_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(686)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_212_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(919)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {4452}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 919;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_213_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1008)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {1008, 4474},
/*h(398)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {398, 4451}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_214_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(720)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4474}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 720;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2_217_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(754)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {754, 4472},
/*h(987)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {987, 4473}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x51_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[218] = {
/*h(466)=0 */ {466, xed3_phash_find_map0x0F_opcode0x51_vv2_0_l1},
/*h(932)=1 */ {932, xed3_phash_find_map0x0F_opcode0x51_vv2_1_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(644)=3 */ {644, xed3_phash_find_map0x0F_opcode0x51_vv2_3_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(678)=5 */ {678, xed3_phash_find_map0x0F_opcode0x51_vv2_5_l1},
/*h(911)=6 */ {911, xed3_phash_find_map0x0F_opcode0x51_vv2_6_l1},
/*h(390)=7 */ {390, xed3_phash_find_map0x0F_opcode0x51_vv2_7_l1},
/*h(712)=8 */ {712, xed3_phash_find_map0x0F_opcode0x51_vv2_8_l1},
/*h(191)=9 */ {191, xed3_phash_find_map0x0F_opcode0x51_vv2_9_l1},
/*h(280)=10 */ {280, xed3_phash_find_map0x0F_opcode0x51_vv2_10_l1},
/*h(746)=11 */ {746, xed3_phash_find_map0x0F_opcode0x51_vv2_11_l1},
/*h(979)=12 */ {979, xed3_phash_find_map0x0F_opcode0x51_vv2_12_l1},
/*h(924)=13 */ {924, xed3_phash_find_map0x0F_opcode0x51_vv2_13_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26)=15 */ {26, xed3_phash_find_map0x0F_opcode0x51_vv2_15_l1},
/*h(958)=16 */ {958, xed3_phash_find_map0x0F_opcode0x51_vv2_16_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(903)=18 */ {903, xed3_phash_find_map0x0F_opcode0x51_vv2_18_l1},
/*h(992)=19 */ {992, xed3_phash_find_map0x0F_opcode0x51_vv2_19_l1},
/*h(704)=20 */ {704, xed3_phash_find_map0x0F_opcode0x51_vv2_20_l1},
/*h(183)=21 */ {183, xed3_phash_find_map0x0F_opcode0x51_vv2_21_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(738)=23 */ {738, xed3_phash_find_map0x0F_opcode0x51_vv2_23_l1},
/*h(971)=24 */ {971, xed3_phash_find_map0x0F_opcode0x51_vv2_24_l1},
/*h(916)=25 */ {916, xed3_phash_find_map0x0F_opcode0x51_vv2_25_l1},
/*h(539)=26 */ {539, xed3_phash_find_map0x0F_opcode0x51_vv2_26_l1},
/*h(251)=27 */ {251, xed3_phash_find_map0x0F_opcode0x51_vv2_27_l1},
/*h(950)=28 */ {950, xed3_phash_find_map0x0F_opcode0x51_vv2_28_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(662)=30 */ {662, xed3_phash_find_map0x0F_opcode0x51_vv2_30_l1},
/*h(984)=31 */ {984, xed3_phash_find_map0x0F_opcode0x51_vv2_31_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(175)=33 */ {175, xed3_phash_find_map0x0F_opcode0x51_vv2_33_l1},
/*h(1018)=34 */ {1018, xed3_phash_find_map0x0F_opcode0x51_vv2_34_l1},
/*h(730)=35 */ {730, xed3_phash_find_map0x0F_opcode0x51_vv2_35_l1},
/*h(963)=36 */ {963, xed3_phash_find_map0x0F_opcode0x51_vv2_36_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(908)=38 */ {908, xed3_phash_find_map0x0F_opcode0x51_vv2_38_l1},
/*h(243)=39 */ {243, xed3_phash_find_map0x0F_opcode0x51_vv2_39_l1},
/*h(942)=40 */ {942, xed3_phash_find_map0x0F_opcode0x51_vv2_40_l1},
/*h(188)=41 */ {188, xed3_phash_find_map0x0F_opcode0x51_vv2_41_l1},
/*h(654)=42 */ {654, xed3_phash_find_map0x0F_opcode0x51_vv2_42_l1},
/*h(976)=43 */ {976, xed3_phash_find_map0x0F_opcode0x51_vv2_43_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1010)=46 */ {1010, xed3_phash_find_map0x0F_opcode0x51_vv2_46_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(722)=48 */ {722, xed3_phash_find_map0x0F_opcode0x51_vv2_48_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(900)=50 */ {900, xed3_phash_find_map0x0F_opcode0x51_vv2_50_l1},
/*h(235)=51 */ {235, xed3_phash_find_map0x0F_opcode0x51_vv2_51_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(934)=53 */ {934, xed3_phash_find_map0x0F_opcode0x51_vv2_53_l1},
/*h(646)=54 */ {646, xed3_phash_find_map0x0F_opcode0x51_vv2_54_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(447)=56 */ {447, xed3_phash_find_map0x0F_opcode0x51_vv2_56_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1002)=58 */ {1002, xed3_phash_find_map0x0F_opcode0x51_vv2_58_l1},
/*h(248)=59 */ {248, xed3_phash_find_map0x0F_opcode0x51_vv2_59_l1},
/*h(714)=60 */ {714, xed3_phash_find_map0x0F_opcode0x51_vv2_60_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(282)=62 */ {282, xed3_phash_find_map0x0F_opcode0x51_vv2_62_l1},
/*h(604)=63 */ {604, xed3_phash_find_map0x0F_opcode0x51_vv2_63_l1},
/*h(227)=64 */ {227, xed3_phash_find_map0x0F_opcode0x51_vv2_64_l1},
/*h(926)=65 */ {926, xed3_phash_find_map0x0F_opcode0x51_vv2_65_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(350)=67 */ {350, xed3_phash_find_map0x0F_opcode0x51_vv2_67_l1},
/*h(960)=68 */ {960, xed3_phash_find_map0x0F_opcode0x51_vv2_68_l1},
/*h(439)=69 */ {439, xed3_phash_find_map0x0F_opcode0x51_vv2_69_l1},
/*h(151)=70 */ {151, xed3_phash_find_map0x0F_opcode0x51_vv2_70_l1},
/*h(994)=71 */ {994, xed3_phash_find_map0x0F_opcode0x51_vv2_71_l1},
/*h(706)=72 */ {706, xed3_phash_find_map0x0F_opcode0x51_vv2_72_l1},
/*h(795)=73 */ {795, xed3_phash_find_map0x0F_opcode0x51_vv2_73_l1},
/*h(507)=74 */ {507, xed3_phash_find_map0x0F_opcode0x51_vv2_74_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(219)=76 */ {219, xed3_phash_find_map0x0F_opcode0x51_vv2_76_l1},
/*h(918)=77 */ {918, xed3_phash_find_map0x0F_opcode0x51_vv2_77_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(863)=79 */ {863, xed3_phash_find_map0x0F_opcode0x51_vv2_79_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(431)=81 */ {431, xed3_phash_find_map0x0F_opcode0x51_vv2_81_l1},
/*h(143)=82 */ {143, xed3_phash_find_map0x0F_opcode0x51_vv2_82_l1},
/*h(986)=83 */ {986, xed3_phash_find_map0x0F_opcode0x51_vv2_83_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(499)=86 */ {499, xed3_phash_find_map0x0F_opcode0x51_vv2_86_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(211)=88 */ {211, xed3_phash_find_map0x0F_opcode0x51_vv2_88_l1},
/*h(910)=89 */ {910, xed3_phash_find_map0x0F_opcode0x51_vv2_89_l1},
/*h(156)=90 */ {156, xed3_phash_find_map0x0F_opcode0x51_vv2_90_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(190)=92 */ {190, xed3_phash_find_map0x0F_opcode0x51_vv2_92_l1},
/*h(423)=93 */ {423, xed3_phash_find_map0x0F_opcode0x51_vv2_93_l1},
/*h(135)=94 */ {135, xed3_phash_find_map0x0F_opcode0x51_vv2_94_l1},
/*h(978)=95 */ {978, xed3_phash_find_map0x0F_opcode0x51_vv2_95_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25)=98 */ {25, xed3_phash_find_map0x0F_opcode0x51_vv2_98_l1},
/*h(491)=99 */ {491, xed3_phash_find_map0x0F_opcode0x51_vv2_99_l1},
/*h(436)=100 */ {436, xed3_phash_find_map0x0F_opcode0x51_vv2_100_l1},
/*h(902)=101 */ {902, xed3_phash_find_map0x0F_opcode0x51_vv2_101_l1},
/*h(148)=102 */ {148, xed3_phash_find_map0x0F_opcode0x51_vv2_102_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(703)=104 */ {703, xed3_phash_find_map0x0F_opcode0x51_vv2_104_l1},
/*h(415)=105 */ {415, xed3_phash_find_map0x0F_opcode0x51_vv2_105_l1},
/*h(504)=106 */ {504, xed3_phash_find_map0x0F_opcode0x51_vv2_106_l1},
/*h(970)=107 */ {970, xed3_phash_find_map0x0F_opcode0x51_vv2_107_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(538)=109 */ {538, xed3_phash_find_map0x0F_opcode0x51_vv2_109_l1},
/*h(250)=110 */ {250, xed3_phash_find_map0x0F_opcode0x51_vv2_110_l1},
/*h(483)=111 */ {483, xed3_phash_find_map0x0F_opcode0x51_vv2_111_l1},
/*h(195)=112 */ {195, xed3_phash_find_map0x0F_opcode0x51_vv2_112_l1},
/*h(428)=113 */ {428, xed3_phash_find_map0x0F_opcode0x51_vv2_113_l1},
/*h(140)=114 */ {140, xed3_phash_find_map0x0F_opcode0x51_vv2_114_l1},
/*h(606)=115 */ {606, xed3_phash_find_map0x0F_opcode0x51_vv2_115_l1},
/*h(695)=116 */ {695, xed3_phash_find_map0x0F_opcode0x51_vv2_116_l1},
/*h(407)=117 */ {407, xed3_phash_find_map0x0F_opcode0x51_vv2_117_l1},
/*h(496)=118 */ {496, xed3_phash_find_map0x0F_opcode0x51_vv2_118_l1},
/*h(962)=119 */ {962, xed3_phash_find_map0x0F_opcode0x51_vv2_119_l1},
/*h(208)=120 */ {208, xed3_phash_find_map0x0F_opcode0x51_vv2_120_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(763)=122 */ {763, xed3_phash_find_map0x0F_opcode0x51_vv2_122_l1},
/*h(475)=123 */ {475, xed3_phash_find_map0x0F_opcode0x51_vv2_123_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(420)=125 */ {420, xed3_phash_find_map0x0F_opcode0x51_vv2_125_l1},
/*h(132)=126 */ {132, xed3_phash_find_map0x0F_opcode0x51_vv2_126_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(687)=128 */ {687, xed3_phash_find_map0x0F_opcode0x51_vv2_128_l1},
/*h(399)=129 */ {399, xed3_phash_find_map0x0F_opcode0x51_vv2_129_l1},
/*h(488)=130 */ {488, xed3_phash_find_map0x0F_opcode0x51_vv2_130_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(200)=132 */ {200, xed3_phash_find_map0x0F_opcode0x51_vv2_132_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(755)=134 */ {755, xed3_phash_find_map0x0F_opcode0x51_vv2_134_l1},
/*h(467)=135 */ {467, xed3_phash_find_map0x0F_opcode0x51_vv2_135_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(412)=137 */ {412, xed3_phash_find_map0x0F_opcode0x51_vv2_137_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(679)=140 */ {679, xed3_phash_find_map0x0F_opcode0x51_vv2_140_l1},
/*h(158)=141 */ {158, xed3_phash_find_map0x0F_opcode0x51_vv2_141_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(480)=143 */ {480, xed3_phash_find_map0x0F_opcode0x51_vv2_143_l1},
/*h(192)=144 */ {192, xed3_phash_find_map0x0F_opcode0x51_vv2_144_l1},
/*h(281)=145 */ {281, xed3_phash_find_map0x0F_opcode0x51_vv2_145_l1},
/*h(747)=146 */ {747, xed3_phash_find_map0x0F_opcode0x51_vv2_146_l1},
/*h(459)=147 */ {459, xed3_phash_find_map0x0F_opcode0x51_vv2_147_l1},
/*h(692)=148 */ {692, xed3_phash_find_map0x0F_opcode0x51_vv2_148_l1},
/*h(404)=149 */ {404, xed3_phash_find_map0x0F_opcode0x51_vv2_149_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(349)=151 */ {349, xed3_phash_find_map0x0F_opcode0x51_vv2_151_l1},
/*h(671)=152 */ {671, xed3_phash_find_map0x0F_opcode0x51_vv2_152_l1},
/*h(760)=153 */ {760, xed3_phash_find_map0x0F_opcode0x51_vv2_153_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(472)=155 */ {472, xed3_phash_find_map0x0F_opcode0x51_vv2_155_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(506)=158 */ {506, xed3_phash_find_map0x0F_opcode0x51_vv2_158_l1},
/*h(451)=159 */ {451, xed3_phash_find_map0x0F_opcode0x51_vv2_159_l1},
/*h(684)=160 */ {684, xed3_phash_find_map0x0F_opcode0x51_vv2_160_l1},
/*h(396)=161 */ {396, xed3_phash_find_map0x0F_opcode0x51_vv2_161_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(951)=163 */ {951, xed3_phash_find_map0x0F_opcode0x51_vv2_163_l1},
/*h(430)=164 */ {430, xed3_phash_find_map0x0F_opcode0x51_vv2_164_l1},
/*h(142)=165 */ {142, xed3_phash_find_map0x0F_opcode0x51_vv2_165_l1},
/*h(752)=166 */ {752, xed3_phash_find_map0x0F_opcode0x51_vv2_166_l1},
/*h(464)=167 */ {464, xed3_phash_find_map0x0F_opcode0x51_vv2_167_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1019)=169 */ {1019, xed3_phash_find_map0x0F_opcode0x51_vv2_169_l1},
/*h(498)=170 */ {498, xed3_phash_find_map0x0F_opcode0x51_vv2_170_l1},
/*h(210)=171 */ {210, xed3_phash_find_map0x0F_opcode0x51_vv2_171_l1},
/*h(676)=172 */ {676, xed3_phash_find_map0x0F_opcode0x51_vv2_172_l1},
/*h(388)=173 */ {388, xed3_phash_find_map0x0F_opcode0x51_vv2_173_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(943)=175 */ {943, xed3_phash_find_map0x0F_opcode0x51_vv2_175_l1},
/*h(422)=176 */ {422, xed3_phash_find_map0x0F_opcode0x51_vv2_176_l1},
/*h(655)=177 */ {655, xed3_phash_find_map0x0F_opcode0x51_vv2_177_l1},
/*h(134)=178 */ {134, xed3_phash_find_map0x0F_opcode0x51_vv2_178_l1},
/*h(456)=179 */ {456, xed3_phash_find_map0x0F_opcode0x51_vv2_179_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1011)=181 */ {1011, xed3_phash_find_map0x0F_opcode0x51_vv2_181_l1},
/*h(490)=182 */ {490, xed3_phash_find_map0x0F_opcode0x51_vv2_182_l1},
/*h(956)=183 */ {956, xed3_phash_find_map0x0F_opcode0x51_vv2_183_l1},
/*h(668)=184 */ {668, xed3_phash_find_map0x0F_opcode0x51_vv2_184_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(935)=187 */ {935, xed3_phash_find_map0x0F_opcode0x51_vv2_187_l1},
/*h(414)=188 */ {414, xed3_phash_find_map0x0F_opcode0x51_vv2_188_l1},
/*h(647)=189 */ {647, xed3_phash_find_map0x0F_opcode0x51_vv2_189_l1},
/*h(736)=190 */ {736, xed3_phash_find_map0x0F_opcode0x51_vv2_190_l1},
/*h(448)=191 */ {448, xed3_phash_find_map0x0F_opcode0x51_vv2_191_l1},
/*h(537)=192 */ {537, xed3_phash_find_map0x0F_opcode0x51_vv2_192_l1},
/*h(1003)=193 */ {1003, xed3_phash_find_map0x0F_opcode0x51_vv2_193_l1},
/*h(715)=194 */ {715, xed3_phash_find_map0x0F_opcode0x51_vv2_194_l1},
/*h(948)=195 */ {948, xed3_phash_find_map0x0F_opcode0x51_vv2_195_l1},
/*h(283)=196 */ {283, xed3_phash_find_map0x0F_opcode0x51_vv2_196_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(605)=198 */ {605, xed3_phash_find_map0x0F_opcode0x51_vv2_198_l1},
/*h(694)=199 */ {694, xed3_phash_find_map0x0F_opcode0x51_vv2_199_l1},
/*h(406)=200 */ {406, xed3_phash_find_map0x0F_opcode0x51_vv2_200_l1},
/*h(1016)=201 */ {1016, xed3_phash_find_map0x0F_opcode0x51_vv2_201_l1},
/*h(728)=202 */ {728, xed3_phash_find_map0x0F_opcode0x51_vv2_202_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(762)=205 */ {762, xed3_phash_find_map0x0F_opcode0x51_vv2_205_l1},
/*h(474)=206 */ {474, xed3_phash_find_map0x0F_opcode0x51_vv2_206_l1},
/*h(940)=207 */ {940, xed3_phash_find_map0x0F_opcode0x51_vv2_207_l1},
/*h(652)=208 */ {652, xed3_phash_find_map0x0F_opcode0x51_vv2_208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(686)=211 */ {686, xed3_phash_find_map0x0F_opcode0x51_vv2_211_l1},
/*h(919)=212 */ {919, xed3_phash_find_map0x0F_opcode0x51_vv2_212_l1},
/*h(1008)=213 */ {1008, xed3_phash_find_map0x0F_opcode0x51_vv2_213_l1},
/*h(720)=214 */ {720, xed3_phash_find_map0x0F_opcode0x51_vv2_214_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(987)=217 */ {987, xed3_phash_find_map0x0F_opcode0x51_vv2_217_l1},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 218ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x54_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 4267},
/*h(14)=1 EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4212},
/*h(66)=2 EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 4270},
/*h(77)=3 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4217},
/*h(32)=4 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 4269},
/*h(46)=5 EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4214},
/*h(1)=6 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 4267},
/*h(12)=7 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4213},
/*h(64)=8 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 4271},
/*h(78)=9 EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4216},
/*h(33)=10 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 4269},
/*h(44)=11 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4215},
/*h(2)=12 EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 4266},
/*h(13)=13 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4213},
/*h(65)=14 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 4271},
/*h(76)=15 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4217},
/*h(34)=16 EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 4268},
/*h(45)=17 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4215}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x55_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 5203},
/*h(14)=1 EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5331},
/*h(66)=2 EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 5206},
/*h(77)=3 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5336},
/*h(32)=4 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 5205},
/*h(46)=5 EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5333},
/*h(1)=6 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 5203},
/*h(12)=7 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5332},
/*h(64)=8 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 5207},
/*h(78)=9 EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5335},
/*h(33)=10 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 5205},
/*h(44)=11 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5334},
/*h(2)=12 EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 5202},
/*h(13)=13 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5332},
/*h(65)=14 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 5207},
/*h(76)=15 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5336},
/*h(34)=16 EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 5204},
/*h(45)=17 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5334}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x56_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 4455},
/*h(14)=1 EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4339},
/*h(66)=2 EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 4458},
/*h(77)=3 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4344},
/*h(32)=4 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 4457},
/*h(46)=5 EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4341},
/*h(1)=6 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 4455},
/*h(12)=7 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4340},
/*h(64)=8 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 4459},
/*h(78)=9 EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4343},
/*h(33)=10 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 4457},
/*h(44)=11 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4342},
/*h(2)=12 EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 4454},
/*h(13)=13 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4340},
/*h(65)=14 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 4459},
/*h(76)=15 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4344},
/*h(34)=16 EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 4456},
/*h(45)=17 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4342}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x57_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 5191},
/*h(14)=1 EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5151},
/*h(66)=2 EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 5194},
/*h(77)=3 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5156},
/*h(32)=4 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 5193},
/*h(46)=5 EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5153},
/*h(1)=6 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 5191},
/*h(12)=7 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5152},
/*h(64)=8 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 5195},
/*h(78)=9 EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5155},
/*h(33)=10 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 5193},
/*h(44)=11 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5154},
/*h(2)=12 EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 5190},
/*h(13)=13 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5152},
/*h(65)=14 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 5195},
/*h(76)=15 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5156},
/*h(34)=16 EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 5192},
/*h(45)=17 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5154}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x58_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 5668},
/*h(46)=1 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5650},
/*h(54)=2 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {54, 6748},
/*h(24)=3 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 6766},
/*h(32)=4 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 5670},
/*h(78)=5 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5645},
/*h(86)=6 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {86, 6748},
/*h(56)=7 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 6766},
/*h(64)=8 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 5666},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {118, 6748},
/*h(88)=11 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 6766},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5646},
/*h(23)=14 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {23, 6749},
/*h(120)=15 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 6766},
/*h(1)=16 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 5668},
/*h(47)=17 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5646},
/*h(55)=18 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {55, 6749},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 5670},
/*h(79)=21 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5646},
/*h(87)=22 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {87, 6749},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 5666},
/*h(111)=25 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5646},
/*h(119)=26 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {119, 6749},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 5667},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {26, 6764},
/*h(34)=36 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 5669},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {58, 6764},
/*h(66)=40 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 5664},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {90, 6764},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {122, 6764},
/*h(3)=48 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {3, 5665},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {27, 6765},
/*h(35)=52 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {35, 5665},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {59, 6765},
/*h(67)=56 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {67, 5665},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {91, 6765},
/*h(99)=60 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {99, 5665},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {123, 6765},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5649},
/*h(20)=66 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 6750},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5651},
/*h(52)=70 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 6750},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5647},
/*h(84)=74 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 6750},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 6750},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5649},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5651},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5647},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5648},
/*h(22)=98 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {22, 6748},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x59_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 4283},
/*h(46)=1 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4896},
/*h(54)=2 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {54, 4272},
/*h(24)=3 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4211},
/*h(32)=4 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 4285},
/*h(78)=5 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4891},
/*h(86)=6 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {86, 4272},
/*h(56)=7 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4211},
/*h(64)=8 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 4281},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {118, 4272},
/*h(88)=11 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4211},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 4892},
/*h(23)=14 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {23, 4273},
/*h(120)=15 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4211},
/*h(1)=16 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 4283},
/*h(47)=17 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 4892},
/*h(55)=18 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {55, 4273},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 4285},
/*h(79)=21 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 4892},
/*h(87)=22 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {87, 4273},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 4281},
/*h(111)=25 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 4892},
/*h(119)=26 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {119, 4273},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 4282},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {26, 4209},
/*h(34)=36 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 4284},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {58, 4209},
/*h(66)=40 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 4279},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {90, 4209},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {122, 4209},
/*h(3)=48 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {3, 4280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {27, 4210},
/*h(35)=52 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {35, 4280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {59, 4210},
/*h(67)=56 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {67, 4280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {91, 4210},
/*h(99)=60 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {99, 4280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {123, 4210},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4895},
/*h(20)=66 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4274},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4897},
/*h(52)=70 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4274},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4893},
/*h(84)=74 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4274},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4274},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4895},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4897},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4893},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4894},
/*h(22)=98 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {22, 4272},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(466)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 466;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_1_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(932)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 932;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_3_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(644)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 644;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(678)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 678;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_6_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(911)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(390)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {390, 6269},
/*h(1000)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {1000, 4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(712)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(191)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 191;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(280)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6779}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 280;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(746)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(458)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {458, 4481},
/*h(979)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {979, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(924)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 924;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_15_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6776}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 26;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(348)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 6741},
/*h(958)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {958, 6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_18_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(670)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {670, 6269},
/*h(903)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {903, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(992)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 992;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(704)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {704, 4483},
/*h(94)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 6738}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(183)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 183;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(738)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(971)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 971;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(450)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {450, 4481},
/*h(916)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {916, 6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_26_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(539)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6774}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 539;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(251)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 251;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(950)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 950;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(662)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(984)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {984, 4483},
/*h(607)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {607, 6736}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(175)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 175;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1018)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1018;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_35_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(730)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(963)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 963;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(908)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 908;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(243)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 243;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(942)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(188)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 188;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(654)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_43_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(976)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 976;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1010)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1010, 4481},
/*h(167)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {167, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(722)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_50_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(900)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 900;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_51_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(235)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 235;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_53_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(180)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {180, 6271},
/*h(934)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {934, 6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_54_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(646)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 646;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_56_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(968)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {968, 4483},
/*h(447)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {447, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(536)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {536, 6775},
/*h(1002)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {1002, 4481},
/*h(159)=2 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {159, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(248)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 248;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(714)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 714;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_62_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(282)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6778}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 282;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(604)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6737}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 604;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_64_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(227)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 227;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_65_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(926)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {926, 6269},
/*h(172)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {172, 6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_67_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(350)=0 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6740}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 350;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(960)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 960;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(439)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 439;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(151)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 151;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(240)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {240, 4483},
/*h(994)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {994, 4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_72_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(706)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 706;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(795)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6774}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 795;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_74_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(507)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 507;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_76_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(219)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 219;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_77_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(918)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {918, 6269},
/*h(164)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {164, 6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_79_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(863)=0 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6736}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 863;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(431)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 431;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_82_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(143)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 143;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(986)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {986, 4481},
/*h(232)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {232, 4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(499)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 499;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(444)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {444, 6271},
/*h(211)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {211, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_89_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(910)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 910;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_90_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(156)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 156;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(190)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(423)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 423;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_94_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(135)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 135;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(978)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {978, 4481},
/*h(224)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {224, 4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_98_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6777}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 25;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(491)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 491;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(436)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {436, 6271},
/*h(203)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {203, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_101_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(902)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(148)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 148;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_104_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(93)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 6739},
/*h(703)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {703, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(182)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {182, 6269},
/*h(415)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {415, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(504)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 504;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_107_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(216)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {216, 4483},
/*h(970)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {970, 4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_109_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(538)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6773}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_110_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(250)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 250;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_111_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(483)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 483;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(195)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 195;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(428)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 428;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_114_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(140)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 140;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_115_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(606)=0 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {6735}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_116_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(695)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 695;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_117_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(174)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {174, 6269},
/*h(407)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {407, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_118_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(496)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 496;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_119_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(962)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_120_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(208)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 208;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(763)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 763;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_123_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(242)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {242, 4481},
/*h(475)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {475, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(420)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 420;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_126_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(132)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 132;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_128_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(687)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(166)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {166, 6269},
/*h(399)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {399, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(488)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 488;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(200)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 200;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(755)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 755;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_135_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(234)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {234, 4481},
/*h(700)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {700, 6271},
/*h(467)=2 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {467, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(412)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 412;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_140_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(446)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {446, 6269},
/*h(679)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {679, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(158)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {158, 6269},
/*h(391)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {391, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(480)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 480;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(192)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 192;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_145_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(281)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6779}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 281;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(747)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 747;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_147_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(226)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {226, 4481},
/*h(459)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {459, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_148_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(692)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 692;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(404)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {404, 6271},
/*h(27)=1 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {27, 6774}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_151_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(959)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {959, 6270},
/*h(349)=1 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 6741}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_152_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(438)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {438, 6269},
/*h(671)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {671, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(150)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {150, 6269},
/*h(760)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {760, 4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_155_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(472)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 4483},
/*h(95)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {95, 6736}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_158_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(506)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {506, 4481},
/*h(739)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {739, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_159_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(218)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {218, 4481},
/*h(451)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {451, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_160_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(684)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 684;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_161_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(396)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 396;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(951)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 951;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_164_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(430)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {430, 6269},
/*h(663)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {663, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(142)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 142;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_166_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(752)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 752;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(464)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 464;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_169_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1019)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1019;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_170_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(498)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {498, 4481},
/*h(731)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {731, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_171_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(210)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_172_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(676)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 676;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(388)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 388;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_175_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(943)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 943;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_176_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(422)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 422;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_177_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(655)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 655;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(744)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {744, 4483},
/*h(134)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {134, 6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_179_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(456)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_181_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {24, 6777},
/*h(1011)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {1011, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(490)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {490, 4481},
/*h(723)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {723, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(956)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {956, 6271},
/*h(202)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {202, 4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_184_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(668)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 668;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_187_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(935)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {935, 6270},
/*h(92)=1 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 6739},
/*h(702)=2 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {702, 6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(414)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 414;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_189_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(647)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 647;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(736)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 736;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_191_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(448)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 448;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_192_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(537)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6775}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 537;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_193_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1003)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_194_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(482)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {482, 4481},
/*h(715)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {715, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(948)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {948, 6271},
/*h(194)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {194, 4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_196_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(660)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {660, 6271},
/*h(283)=1 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {283, 6774}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(605)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6737}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 605;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_199_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(694)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 694;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_200_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(406)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {406, 6269},
/*h(927)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {927, 6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_201_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1016)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 1016;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(728)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {728, 4483},
/*h(351)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {351, 6736}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_205_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(762)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {762, 4481},
/*h(995)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {995, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_206_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(474)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {4481}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 474;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_207_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(940)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {940, 6271},
/*h(707)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {707, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(652)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {6271}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 652;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_211_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(686)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_212_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(919)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {6270}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 919;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_213_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1008)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {1008, 4483},
/*h(398)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {398, 6269}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_214_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(720)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {4483}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = key - 720;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2_217_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(754)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {754, 4481},
/*h(987)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {987, 4482}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5a_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[218] = {
/*h(466)=0 */ {466, xed3_phash_find_map0x0F_opcode0x5a_vv2_0_l1},
/*h(932)=1 */ {932, xed3_phash_find_map0x0F_opcode0x5a_vv2_1_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(644)=3 */ {644, xed3_phash_find_map0x0F_opcode0x5a_vv2_3_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(678)=5 */ {678, xed3_phash_find_map0x0F_opcode0x5a_vv2_5_l1},
/*h(911)=6 */ {911, xed3_phash_find_map0x0F_opcode0x5a_vv2_6_l1},
/*h(390)=7 */ {390, xed3_phash_find_map0x0F_opcode0x5a_vv2_7_l1},
/*h(712)=8 */ {712, xed3_phash_find_map0x0F_opcode0x5a_vv2_8_l1},
/*h(191)=9 */ {191, xed3_phash_find_map0x0F_opcode0x5a_vv2_9_l1},
/*h(280)=10 */ {280, xed3_phash_find_map0x0F_opcode0x5a_vv2_10_l1},
/*h(746)=11 */ {746, xed3_phash_find_map0x0F_opcode0x5a_vv2_11_l1},
/*h(979)=12 */ {979, xed3_phash_find_map0x0F_opcode0x5a_vv2_12_l1},
/*h(924)=13 */ {924, xed3_phash_find_map0x0F_opcode0x5a_vv2_13_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26)=15 */ {26, xed3_phash_find_map0x0F_opcode0x5a_vv2_15_l1},
/*h(958)=16 */ {958, xed3_phash_find_map0x0F_opcode0x5a_vv2_16_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(903)=18 */ {903, xed3_phash_find_map0x0F_opcode0x5a_vv2_18_l1},
/*h(992)=19 */ {992, xed3_phash_find_map0x0F_opcode0x5a_vv2_19_l1},
/*h(704)=20 */ {704, xed3_phash_find_map0x0F_opcode0x5a_vv2_20_l1},
/*h(183)=21 */ {183, xed3_phash_find_map0x0F_opcode0x5a_vv2_21_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(738)=23 */ {738, xed3_phash_find_map0x0F_opcode0x5a_vv2_23_l1},
/*h(971)=24 */ {971, xed3_phash_find_map0x0F_opcode0x5a_vv2_24_l1},
/*h(450)=25 */ {450, xed3_phash_find_map0x0F_opcode0x5a_vv2_25_l1},
/*h(539)=26 */ {539, xed3_phash_find_map0x0F_opcode0x5a_vv2_26_l1},
/*h(251)=27 */ {251, xed3_phash_find_map0x0F_opcode0x5a_vv2_27_l1},
/*h(950)=28 */ {950, xed3_phash_find_map0x0F_opcode0x5a_vv2_28_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(662)=30 */ {662, xed3_phash_find_map0x0F_opcode0x5a_vv2_30_l1},
/*h(984)=31 */ {984, xed3_phash_find_map0x0F_opcode0x5a_vv2_31_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(175)=33 */ {175, xed3_phash_find_map0x0F_opcode0x5a_vv2_33_l1},
/*h(1018)=34 */ {1018, xed3_phash_find_map0x0F_opcode0x5a_vv2_34_l1},
/*h(730)=35 */ {730, xed3_phash_find_map0x0F_opcode0x5a_vv2_35_l1},
/*h(963)=36 */ {963, xed3_phash_find_map0x0F_opcode0x5a_vv2_36_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(908)=38 */ {908, xed3_phash_find_map0x0F_opcode0x5a_vv2_38_l1},
/*h(243)=39 */ {243, xed3_phash_find_map0x0F_opcode0x5a_vv2_39_l1},
/*h(942)=40 */ {942, xed3_phash_find_map0x0F_opcode0x5a_vv2_40_l1},
/*h(188)=41 */ {188, xed3_phash_find_map0x0F_opcode0x5a_vv2_41_l1},
/*h(654)=42 */ {654, xed3_phash_find_map0x0F_opcode0x5a_vv2_42_l1},
/*h(976)=43 */ {976, xed3_phash_find_map0x0F_opcode0x5a_vv2_43_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1010)=46 */ {1010, xed3_phash_find_map0x0F_opcode0x5a_vv2_46_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(722)=48 */ {722, xed3_phash_find_map0x0F_opcode0x5a_vv2_48_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(900)=50 */ {900, xed3_phash_find_map0x0F_opcode0x5a_vv2_50_l1},
/*h(235)=51 */ {235, xed3_phash_find_map0x0F_opcode0x5a_vv2_51_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(934)=53 */ {934, xed3_phash_find_map0x0F_opcode0x5a_vv2_53_l1},
/*h(646)=54 */ {646, xed3_phash_find_map0x0F_opcode0x5a_vv2_54_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(447)=56 */ {447, xed3_phash_find_map0x0F_opcode0x5a_vv2_56_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1002)=58 */ {1002, xed3_phash_find_map0x0F_opcode0x5a_vv2_58_l1},
/*h(248)=59 */ {248, xed3_phash_find_map0x0F_opcode0x5a_vv2_59_l1},
/*h(714)=60 */ {714, xed3_phash_find_map0x0F_opcode0x5a_vv2_60_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(282)=62 */ {282, xed3_phash_find_map0x0F_opcode0x5a_vv2_62_l1},
/*h(604)=63 */ {604, xed3_phash_find_map0x0F_opcode0x5a_vv2_63_l1},
/*h(227)=64 */ {227, xed3_phash_find_map0x0F_opcode0x5a_vv2_64_l1},
/*h(926)=65 */ {926, xed3_phash_find_map0x0F_opcode0x5a_vv2_65_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(350)=67 */ {350, xed3_phash_find_map0x0F_opcode0x5a_vv2_67_l1},
/*h(960)=68 */ {960, xed3_phash_find_map0x0F_opcode0x5a_vv2_68_l1},
/*h(439)=69 */ {439, xed3_phash_find_map0x0F_opcode0x5a_vv2_69_l1},
/*h(151)=70 */ {151, xed3_phash_find_map0x0F_opcode0x5a_vv2_70_l1},
/*h(994)=71 */ {994, xed3_phash_find_map0x0F_opcode0x5a_vv2_71_l1},
/*h(706)=72 */ {706, xed3_phash_find_map0x0F_opcode0x5a_vv2_72_l1},
/*h(795)=73 */ {795, xed3_phash_find_map0x0F_opcode0x5a_vv2_73_l1},
/*h(507)=74 */ {507, xed3_phash_find_map0x0F_opcode0x5a_vv2_74_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(219)=76 */ {219, xed3_phash_find_map0x0F_opcode0x5a_vv2_76_l1},
/*h(918)=77 */ {918, xed3_phash_find_map0x0F_opcode0x5a_vv2_77_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(863)=79 */ {863, xed3_phash_find_map0x0F_opcode0x5a_vv2_79_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(431)=81 */ {431, xed3_phash_find_map0x0F_opcode0x5a_vv2_81_l1},
/*h(143)=82 */ {143, xed3_phash_find_map0x0F_opcode0x5a_vv2_82_l1},
/*h(986)=83 */ {986, xed3_phash_find_map0x0F_opcode0x5a_vv2_83_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(499)=86 */ {499, xed3_phash_find_map0x0F_opcode0x5a_vv2_86_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(211)=88 */ {211, xed3_phash_find_map0x0F_opcode0x5a_vv2_88_l1},
/*h(910)=89 */ {910, xed3_phash_find_map0x0F_opcode0x5a_vv2_89_l1},
/*h(156)=90 */ {156, xed3_phash_find_map0x0F_opcode0x5a_vv2_90_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(190)=92 */ {190, xed3_phash_find_map0x0F_opcode0x5a_vv2_92_l1},
/*h(423)=93 */ {423, xed3_phash_find_map0x0F_opcode0x5a_vv2_93_l1},
/*h(135)=94 */ {135, xed3_phash_find_map0x0F_opcode0x5a_vv2_94_l1},
/*h(978)=95 */ {978, xed3_phash_find_map0x0F_opcode0x5a_vv2_95_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25)=98 */ {25, xed3_phash_find_map0x0F_opcode0x5a_vv2_98_l1},
/*h(491)=99 */ {491, xed3_phash_find_map0x0F_opcode0x5a_vv2_99_l1},
/*h(436)=100 */ {436, xed3_phash_find_map0x0F_opcode0x5a_vv2_100_l1},
/*h(902)=101 */ {902, xed3_phash_find_map0x0F_opcode0x5a_vv2_101_l1},
/*h(148)=102 */ {148, xed3_phash_find_map0x0F_opcode0x5a_vv2_102_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(703)=104 */ {703, xed3_phash_find_map0x0F_opcode0x5a_vv2_104_l1},
/*h(415)=105 */ {415, xed3_phash_find_map0x0F_opcode0x5a_vv2_105_l1},
/*h(504)=106 */ {504, xed3_phash_find_map0x0F_opcode0x5a_vv2_106_l1},
/*h(970)=107 */ {970, xed3_phash_find_map0x0F_opcode0x5a_vv2_107_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(538)=109 */ {538, xed3_phash_find_map0x0F_opcode0x5a_vv2_109_l1},
/*h(250)=110 */ {250, xed3_phash_find_map0x0F_opcode0x5a_vv2_110_l1},
/*h(483)=111 */ {483, xed3_phash_find_map0x0F_opcode0x5a_vv2_111_l1},
/*h(195)=112 */ {195, xed3_phash_find_map0x0F_opcode0x5a_vv2_112_l1},
/*h(428)=113 */ {428, xed3_phash_find_map0x0F_opcode0x5a_vv2_113_l1},
/*h(140)=114 */ {140, xed3_phash_find_map0x0F_opcode0x5a_vv2_114_l1},
/*h(606)=115 */ {606, xed3_phash_find_map0x0F_opcode0x5a_vv2_115_l1},
/*h(695)=116 */ {695, xed3_phash_find_map0x0F_opcode0x5a_vv2_116_l1},
/*h(407)=117 */ {407, xed3_phash_find_map0x0F_opcode0x5a_vv2_117_l1},
/*h(496)=118 */ {496, xed3_phash_find_map0x0F_opcode0x5a_vv2_118_l1},
/*h(962)=119 */ {962, xed3_phash_find_map0x0F_opcode0x5a_vv2_119_l1},
/*h(208)=120 */ {208, xed3_phash_find_map0x0F_opcode0x5a_vv2_120_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(763)=122 */ {763, xed3_phash_find_map0x0F_opcode0x5a_vv2_122_l1},
/*h(475)=123 */ {475, xed3_phash_find_map0x0F_opcode0x5a_vv2_123_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(420)=125 */ {420, xed3_phash_find_map0x0F_opcode0x5a_vv2_125_l1},
/*h(132)=126 */ {132, xed3_phash_find_map0x0F_opcode0x5a_vv2_126_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(687)=128 */ {687, xed3_phash_find_map0x0F_opcode0x5a_vv2_128_l1},
/*h(399)=129 */ {399, xed3_phash_find_map0x0F_opcode0x5a_vv2_129_l1},
/*h(488)=130 */ {488, xed3_phash_find_map0x0F_opcode0x5a_vv2_130_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(200)=132 */ {200, xed3_phash_find_map0x0F_opcode0x5a_vv2_132_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(755)=134 */ {755, xed3_phash_find_map0x0F_opcode0x5a_vv2_134_l1},
/*h(467)=135 */ {467, xed3_phash_find_map0x0F_opcode0x5a_vv2_135_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(412)=137 */ {412, xed3_phash_find_map0x0F_opcode0x5a_vv2_137_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(679)=140 */ {679, xed3_phash_find_map0x0F_opcode0x5a_vv2_140_l1},
/*h(391)=141 */ {391, xed3_phash_find_map0x0F_opcode0x5a_vv2_141_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(480)=143 */ {480, xed3_phash_find_map0x0F_opcode0x5a_vv2_143_l1},
/*h(192)=144 */ {192, xed3_phash_find_map0x0F_opcode0x5a_vv2_144_l1},
/*h(281)=145 */ {281, xed3_phash_find_map0x0F_opcode0x5a_vv2_145_l1},
/*h(747)=146 */ {747, xed3_phash_find_map0x0F_opcode0x5a_vv2_146_l1},
/*h(459)=147 */ {459, xed3_phash_find_map0x0F_opcode0x5a_vv2_147_l1},
/*h(692)=148 */ {692, xed3_phash_find_map0x0F_opcode0x5a_vv2_148_l1},
/*h(404)=149 */ {404, xed3_phash_find_map0x0F_opcode0x5a_vv2_149_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(349)=151 */ {349, xed3_phash_find_map0x0F_opcode0x5a_vv2_151_l1},
/*h(671)=152 */ {671, xed3_phash_find_map0x0F_opcode0x5a_vv2_152_l1},
/*h(150)=153 */ {150, xed3_phash_find_map0x0F_opcode0x5a_vv2_153_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(472)=155 */ {472, xed3_phash_find_map0x0F_opcode0x5a_vv2_155_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(506)=158 */ {506, xed3_phash_find_map0x0F_opcode0x5a_vv2_158_l1},
/*h(451)=159 */ {451, xed3_phash_find_map0x0F_opcode0x5a_vv2_159_l1},
/*h(684)=160 */ {684, xed3_phash_find_map0x0F_opcode0x5a_vv2_160_l1},
/*h(396)=161 */ {396, xed3_phash_find_map0x0F_opcode0x5a_vv2_161_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(951)=163 */ {951, xed3_phash_find_map0x0F_opcode0x5a_vv2_163_l1},
/*h(430)=164 */ {430, xed3_phash_find_map0x0F_opcode0x5a_vv2_164_l1},
/*h(142)=165 */ {142, xed3_phash_find_map0x0F_opcode0x5a_vv2_165_l1},
/*h(752)=166 */ {752, xed3_phash_find_map0x0F_opcode0x5a_vv2_166_l1},
/*h(464)=167 */ {464, xed3_phash_find_map0x0F_opcode0x5a_vv2_167_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1019)=169 */ {1019, xed3_phash_find_map0x0F_opcode0x5a_vv2_169_l1},
/*h(498)=170 */ {498, xed3_phash_find_map0x0F_opcode0x5a_vv2_170_l1},
/*h(210)=171 */ {210, xed3_phash_find_map0x0F_opcode0x5a_vv2_171_l1},
/*h(676)=172 */ {676, xed3_phash_find_map0x0F_opcode0x5a_vv2_172_l1},
/*h(388)=173 */ {388, xed3_phash_find_map0x0F_opcode0x5a_vv2_173_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(943)=175 */ {943, xed3_phash_find_map0x0F_opcode0x5a_vv2_175_l1},
/*h(422)=176 */ {422, xed3_phash_find_map0x0F_opcode0x5a_vv2_176_l1},
/*h(655)=177 */ {655, xed3_phash_find_map0x0F_opcode0x5a_vv2_177_l1},
/*h(134)=178 */ {134, xed3_phash_find_map0x0F_opcode0x5a_vv2_178_l1},
/*h(456)=179 */ {456, xed3_phash_find_map0x0F_opcode0x5a_vv2_179_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1011)=181 */ {1011, xed3_phash_find_map0x0F_opcode0x5a_vv2_181_l1},
/*h(490)=182 */ {490, xed3_phash_find_map0x0F_opcode0x5a_vv2_182_l1},
/*h(956)=183 */ {956, xed3_phash_find_map0x0F_opcode0x5a_vv2_183_l1},
/*h(668)=184 */ {668, xed3_phash_find_map0x0F_opcode0x5a_vv2_184_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(935)=187 */ {935, xed3_phash_find_map0x0F_opcode0x5a_vv2_187_l1},
/*h(414)=188 */ {414, xed3_phash_find_map0x0F_opcode0x5a_vv2_188_l1},
/*h(647)=189 */ {647, xed3_phash_find_map0x0F_opcode0x5a_vv2_189_l1},
/*h(736)=190 */ {736, xed3_phash_find_map0x0F_opcode0x5a_vv2_190_l1},
/*h(448)=191 */ {448, xed3_phash_find_map0x0F_opcode0x5a_vv2_191_l1},
/*h(537)=192 */ {537, xed3_phash_find_map0x0F_opcode0x5a_vv2_192_l1},
/*h(1003)=193 */ {1003, xed3_phash_find_map0x0F_opcode0x5a_vv2_193_l1},
/*h(715)=194 */ {715, xed3_phash_find_map0x0F_opcode0x5a_vv2_194_l1},
/*h(948)=195 */ {948, xed3_phash_find_map0x0F_opcode0x5a_vv2_195_l1},
/*h(283)=196 */ {283, xed3_phash_find_map0x0F_opcode0x5a_vv2_196_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(605)=198 */ {605, xed3_phash_find_map0x0F_opcode0x5a_vv2_198_l1},
/*h(694)=199 */ {694, xed3_phash_find_map0x0F_opcode0x5a_vv2_199_l1},
/*h(927)=200 */ {927, xed3_phash_find_map0x0F_opcode0x5a_vv2_200_l1},
/*h(1016)=201 */ {1016, xed3_phash_find_map0x0F_opcode0x5a_vv2_201_l1},
/*h(351)=202 */ {351, xed3_phash_find_map0x0F_opcode0x5a_vv2_202_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(762)=205 */ {762, xed3_phash_find_map0x0F_opcode0x5a_vv2_205_l1},
/*h(474)=206 */ {474, xed3_phash_find_map0x0F_opcode0x5a_vv2_206_l1},
/*h(940)=207 */ {940, xed3_phash_find_map0x0F_opcode0x5a_vv2_207_l1},
/*h(652)=208 */ {652, xed3_phash_find_map0x0F_opcode0x5a_vv2_208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(686)=211 */ {686, xed3_phash_find_map0x0F_opcode0x5a_vv2_211_l1},
/*h(919)=212 */ {919, xed3_phash_find_map0x0F_opcode0x5a_vv2_212_l1},
/*h(1008)=213 */ {1008, xed3_phash_find_map0x0F_opcode0x5a_vv2_213_l1},
/*h(720)=214 */ {720, xed3_phash_find_map0x0F_opcode0x5a_vv2_214_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(987)=217 */ {987, xed3_phash_find_map0x0F_opcode0x5a_vv2_217_l1},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 218ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[104] = {
/*empty slot1 */ {0,0},
/*h(29)=1 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {29, 4877},
/*h(602)=2 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4706},
/*h(30)=3 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {30, 4876},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(537)=6 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {537, 6048},
/*h(89)=7 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4710},
/*h(538)=8 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {538, 6046},
/*h(90)=9 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4709},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(473)=12 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {473, 5271},
/*h(25)=13 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {25, 6050},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(284)=16 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {284, 4879},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(543)=19 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {543, 4881},
/*h(219)=20 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {219, 5266},
/*empty slot1 */ {0,0},
/*h(344)=22 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4712},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(603)=25 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {603, 4707},
/*h(31)=26 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {31, 4881},
/*h(728)=27 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {728, 5267},
/*h(280)=28 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {280, 6052},
/*empty slot1 */ {0,0},
/*h(987)=30 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {987, 5266},
/*h(539)=31 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {539, 6047},
/*h(91)=32 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {91, 4707},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(474)=35 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 5270},
/*h(26)=36 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {26, 6049},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(285)=39 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {285, 4879},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(345)=45 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4712},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(729)=50 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {729, 5267},
/*h(281)=51 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {281, 6052},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(540)=54 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {540, 4882},
/*h(216)=55 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {216, 5269},
/*empty slot1 */ {0,0},
/*h(799)=57 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {799, 4881},
/*h(475)=58 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {475, 5266},
/*h(27)=59 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {27, 6047},
/*h(600)=60 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4708},
/*empty slot1 */ {0,0},
/*h(286)=62 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {286, 4878},
/*h(859)=63 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {859, 4707},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(346)=68 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4711},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(730)=73 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 5265},
/*h(282)=74 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {282, 6051},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(541)=77 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {541, 4882},
/*h(217)=78 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {217, 5269},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(28)=82 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {28, 4877},
/*h(601)=83 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4708},
/*empty slot1 */ {0,0},
/*h(287)=85 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {287, 4881},
/*empty slot1 */ {0,0},
/*h(536)=87 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {536, 6048},
/*h(88)=88 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4710},
/*empty slot1 */ {0,0},
/*h(795)=90 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {795, 6047},
/*h(347)=91 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {347, 4707},
/*empty slot1 */ {0,0},
/*h(472)=93 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {472, 5271},
/*h(24)=94 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24, 6050},
/*empty slot1 */ {0,0},
/*h(731)=96 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {731, 5266},
/*h(283)=97 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {283, 6047},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(542)=100 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {542, 4880},
/*h(218)=101 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 5268},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((23*key % 229) % 104);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 5370},
/*h(46)=1 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5323},
/*h(54)=2 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {54, 4690},
/*h(24)=3 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4740},
/*h(32)=4 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 5372},
/*h(78)=5 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5318},
/*h(86)=6 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {86, 4690},
/*h(56)=7 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4740},
/*h(64)=8 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 5368},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {118, 4690},
/*h(88)=11 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4740},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5319},
/*h(23)=14 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {23, 4691},
/*h(120)=15 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4740},
/*h(1)=16 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 5370},
/*h(47)=17 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5319},
/*h(55)=18 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {55, 4691},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 5372},
/*h(79)=21 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5319},
/*h(87)=22 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {87, 4691},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 5368},
/*h(111)=25 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5319},
/*h(119)=26 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {119, 4691},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 5369},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {26, 4738},
/*h(34)=36 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 5371},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {58, 4738},
/*h(66)=40 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 5366},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {90, 4738},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {122, 4738},
/*h(3)=48 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {3, 5367},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {27, 4739},
/*h(35)=52 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {35, 5367},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {59, 4739},
/*h(67)=56 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {67, 5367},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {91, 4739},
/*h(99)=60 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {99, 5367},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {123, 4739},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5322},
/*h(20)=66 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4692},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5324},
/*h(52)=70 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4692},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5320},
/*h(84)=74 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4692},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4692},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5322},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5324},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5320},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5321},
/*h(22)=98 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {22, 4690},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 6109},
/*h(46)=1 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6044},
/*h(54)=2 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {54, 5384},
/*h(24)=3 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 5349},
/*h(32)=4 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 6111},
/*h(78)=5 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6039},
/*h(86)=6 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {86, 5384},
/*h(56)=7 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 5349},
/*h(64)=8 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 6107},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {118, 5384},
/*h(88)=11 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 5349},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {15, 6040},
/*h(23)=14 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {23, 5385},
/*h(120)=15 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 5349},
/*h(1)=16 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 6109},
/*h(47)=17 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {47, 6040},
/*h(55)=18 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {55, 5385},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 6111},
/*h(79)=21 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {79, 6040},
/*h(87)=22 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {87, 5385},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 6107},
/*h(111)=25 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {111, 6040},
/*h(119)=26 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {119, 5385},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 6108},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {26, 5347},
/*h(34)=36 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 6110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {58, 5347},
/*h(66)=40 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 6105},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {90, 5347},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {122, 5347},
/*h(3)=48 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {3, 6106},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {27, 5348},
/*h(35)=52 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {35, 6106},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {59, 5348},
/*h(67)=56 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {67, 6106},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {91, 5348},
/*h(99)=60 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {99, 6106},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {123, 5348},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6043},
/*h(20)=66 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 5386},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6045},
/*h(52)=70 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 5386},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6041},
/*h(84)=74 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 5386},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 5386},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6043},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6045},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6041},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6042},
/*h(22)=98 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {22, 5384},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 4601},
/*h(46)=1 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5892},
/*h(54)=2 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {54, 5278},
/*h(24)=3 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 5274},
/*h(32)=4 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 4603},
/*h(78)=5 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5887},
/*h(86)=6 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {86, 5278},
/*h(56)=7 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 5274},
/*h(64)=8 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 4599},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {118, 5278},
/*h(88)=11 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 5274},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5888},
/*h(23)=14 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {23, 5279},
/*h(120)=15 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 5274},
/*h(1)=16 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 4601},
/*h(47)=17 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5888},
/*h(55)=18 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {55, 5279},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 4603},
/*h(79)=21 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5888},
/*h(87)=22 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {87, 5279},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 4599},
/*h(111)=25 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5888},
/*h(119)=26 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {119, 5279},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 4600},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {26, 5272},
/*h(34)=36 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 4602},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {58, 5272},
/*h(66)=40 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 4597},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {90, 5272},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {122, 5272},
/*h(3)=48 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {3, 4598},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {27, 5273},
/*h(35)=52 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {35, 4598},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {59, 5273},
/*h(67)=56 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {67, 4598},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {91, 5273},
/*h(99)=60 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {99, 4598},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {123, 5273},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5891},
/*h(20)=66 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 5280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5893},
/*h(52)=70 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 5280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5889},
/*h(84)=74 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 5280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 5280},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5891},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5893},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5889},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5890},
/*h(22)=98 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {22, 5278},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x5f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {0, 5014},
/*h(46)=1 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5002},
/*h(54)=2 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {54, 4357},
/*h(24)=3 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4100},
/*h(32)=4 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {32, 5016},
/*h(78)=5 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4997},
/*h(86)=6 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {86, 4357},
/*h(56)=7 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4100},
/*h(64)=8 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 5012},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {118, 4357},
/*h(88)=11 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4100},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {15, 4998},
/*h(23)=14 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {23, 4358},
/*h(120)=15 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4100},
/*h(1)=16 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1, 5014},
/*h(47)=17 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {47, 4998},
/*h(55)=18 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {55, 4358},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {33, 5016},
/*h(79)=21 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {79, 4998},
/*h(87)=22 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {87, 4358},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 5012},
/*h(111)=25 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1*/ {111, 4998},
/*h(119)=26 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {119, 4358},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2, 5013},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {26, 4098},
/*h(34)=36 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {34, 5015},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {58, 4098},
/*h(66)=40 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {66, 5010},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {90, 4098},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {122, 4098},
/*h(3)=48 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {3, 5011},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {27, 4099},
/*h(35)=52 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {35, 5011},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {59, 4099},
/*h(67)=56 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {67, 5011},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {91, 4099},
/*h(99)=60 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0*/ {99, 5011},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {123, 4099},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5001},
/*h(20)=66 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4359},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5003},
/*h(52)=70 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4359},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4999},
/*h(84)=74 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4359},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4359},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5001},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5003},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4999},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5000},
/*h(22)=98 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {22, 4357},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x60_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 3965},
/*h(4)=1 EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 3964},
/*h(38)=2 EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 3967},
/*h(20)=3 EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 3966},
/*h(6)=4 EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 3963},
/*h(36)=5 EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 3968}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x61_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5769},
/*h(4)=1 EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5768},
/*h(38)=2 EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5771},
/*h(20)=3 EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5770},
/*h(6)=4 EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5767},
/*h(36)=5 EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5772}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x62_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6082},
/*h(10)=3 EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6083},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6086},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6082},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6084},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6086},
/*h(74)=13 EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6081},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6084},
/*h(42)=17 EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6085}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x63_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6760},
/*h(4)=1 EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6759},
/*h(38)=2 EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6762},
/*h(20)=3 EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6761},
/*h(6)=4 EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6758},
/*h(36)=5 EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6763}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x64_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0*/ {22, 4575},
/*h(4)=1 EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 4574},
/*h(38)=2 EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0*/ {38, 4577},
/*h(20)=3 EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 4576},
/*h(6)=4 EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0*/ {6, 4573},
/*h(36)=5 EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 4578}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x65_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0*/ {22, 6623},
/*h(4)=1 EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6622},
/*h(38)=2 EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0*/ {38, 6625},
/*h(20)=3 EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6624},
/*h(6)=4 EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0*/ {6, 6621},
/*h(36)=5 EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6626}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x66_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {73, 6585},
/*h(10)=3 EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {10, 6586},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {41, 6589},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {72, 6585},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {9, 6587},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {40, 6589},
/*h(74)=13 EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {74, 6584},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {8, 6587},
/*h(42)=17 EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {42, 6588}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x67_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5006},
/*h(4)=1 EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5005},
/*h(38)=2 EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5008},
/*h(20)=3 EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5007},
/*h(6)=4 EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5004},
/*h(36)=5 EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5009}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x68_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6553},
/*h(4)=1 EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6552},
/*h(38)=2 EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6555},
/*h(20)=3 EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6554},
/*h(6)=4 EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6551},
/*h(36)=5 EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6556}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x69_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6667},
/*h(4)=1 EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6666},
/*h(38)=2 EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6669},
/*h(20)=3 EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6668},
/*h(6)=4 EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6665},
/*h(36)=5 EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6670}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4837},
/*h(10)=3 EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4838},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4841},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4837},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4839},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4841},
/*h(74)=13 EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4836},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4839},
/*h(42)=17 EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4840}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4428},
/*h(10)=3 EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4423},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4426},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4428},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4424},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4426},
/*h(74)=13 EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4427},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4424},
/*h(42)=17 EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4425}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5941},
/*h(46)=1 EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5944},
/*h(12)=2 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5943},
/*h(77)=3 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5941},
/*h(13)=4 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5943},
/*h(78)=5 EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5940},
/*h(44)=6 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5945},
/*h(14)=7 EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5942},
/*h(45)=8 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5945}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5018},
/*h(46)=1 EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5021},
/*h(12)=2 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5020},
/*h(77)=3 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5018},
/*h(13)=4 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5020},
/*h(78)=5 EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5017},
/*h(44)=6 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5022},
/*h(14)=7 EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5019},
/*h(45)=8 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[17] = {
/*h(746)=0 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {746, 3914},
/*h(738)=1 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {738, 3914},
/*empty slot1 */ {0,0},
/*h(722)=3 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {722, 3915},
/*h(714)=4 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {714, 3914},
/*h(706)=5 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {706, 3914},
/*empty slot1 */ {0,0},
/*h(758)=7 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  mode64  NOEVSR  ZEROING=0 MASK=0*/ {758, 3904},
/*h(750)=8 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {750, 3912},
/*h(742)=9 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {742, 3912},
/*empty slot1 */ {0,0},
/*h(726)=11 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  mode64 W0  NOEVSR  ZEROING=0 MASK=0*/ {726, 3913},
/*h(718)=12 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {718, 3912},
/*h(710)=13 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {710, 3912},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(754)=16 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  mode64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {754, 3905}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x6f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[59] = {
/*h(472)=0 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {472, 4245},
/*h(728)=1 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {728, 4237},
/*h(158)=2 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {158, 5836},
/*h(414)=3 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {414, 5840},
/*h(670)=4 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {670, 5844},
/*h(218)=5 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4240},
/*h(474)=6 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4244},
/*h(730)=7 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4236},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(220)=11 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {220, 5975},
/*h(476)=12 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {476, 5979},
/*h(732)=13 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {732, 5971},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(222)=17 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {222, 5974},
/*h(478)=18 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {478, 5978},
/*h(734)=19 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {734, 5970},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(88)=28 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {88, 6538},
/*h(344)=29 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {344, 6542},
/*h(600)=30 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {600, 6534},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=34 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6537},
/*h(346)=35 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6541},
/*h(602)=36 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6533},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=40 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 6004},
/*h(348)=41 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 6008},
/*h(604)=42 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 6000},
/*h(152)=43 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {152, 5124},
/*h(408)=44 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {408, 5128},
/*h(664)=45 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {664, 5132},
/*h(94)=46 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 6003},
/*h(350)=47 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 6007},
/*h(606)=48 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5999},
/*h(154)=49 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {154, 5123},
/*h(410)=50 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {410, 5127},
/*h(666)=51 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {666, 5131},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(156)=55 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {156, 5837},
/*h(412)=56 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {412, 5841},
/*h(668)=57 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {668, 5845},
/*h(216)=58 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULLMEM()*/ {216, 4241}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 59);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x70_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[59] = {
/*h(472)=0 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {472, 4320},
/*h(728)=1 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {728, 4322},
/*h(158)=2 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR UIMM8()*/ {158, 4613},
/*h(414)=3 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR UIMM8()*/ {414, 4615},
/*h(670)=4 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR UIMM8()*/ {670, 4617},
/*h(218)=5 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR UIMM8()*/ {218, 4317},
/*h(474)=6 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR UIMM8()*/ {474, 4319},
/*h(730)=7 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR UIMM8()*/ {730, 4321},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(220)=11 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {220, 4318},
/*h(476)=12 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {476, 4320},
/*h(732)=13 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {732, 4322},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(222)=17 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR UIMM8()*/ {222, 4317},
/*h(478)=18 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR UIMM8()*/ {478, 4319},
/*h(734)=19 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR UIMM8()*/ {734, 4321},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(88)=28 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4531},
/*h(344)=29 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4533},
/*h(600)=30 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4529},
/*h(89)=31 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4531},
/*h(345)=32 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4533},
/*h(601)=33 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4529},
/*h(90)=34 EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {90, 4530},
/*h(346)=35 EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 4532},
/*h(602)=36 EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 4528},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(152)=43 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {152, 4614},
/*h(408)=44 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {408, 4616},
/*h(664)=45 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {664, 4618},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(154)=49 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR UIMM8()*/ {154, 4613},
/*h(410)=50 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR UIMM8()*/ {410, 4615},
/*h(666)=51 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR UIMM8()*/ {666, 4617},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(156)=55 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {156, 4614},
/*h(412)=56 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {412, 4616},
/*h(668)=57 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {668, 4618},
/*h(216)=58 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {216, 4318}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 59);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x71_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(306)=0 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL512     UIMM8()*/ {306, 4544},
/*h(184)=1 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM()  VL256     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {184, 4664},
/*h(186)=2 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL256     UIMM8()*/ {186, 4663},
/*h(168)=3 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM()  VL256     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {168, 5902},
/*h(170)=4 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL256     UIMM8()*/ {170, 5901},
/*h(48)=5 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM()  VL128     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {48, 4537},
/*h(304)=6 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM()  VL512     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {304, 4545},
/*h(58)=7 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL128     UIMM8()*/ {58, 4659},
/*h(314)=8 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL512     UIMM8()*/ {314, 4667},
/*h(42)=9 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL128     UIMM8()*/ {42, 5897},
/*h(298)=10 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL512     UIMM8()*/ {298, 5905},
/*h(176)=11 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM()  VL256     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {176, 4541},
/*h(178)=12 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL256     UIMM8()*/ {178, 4540},
/*h(56)=13 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM()  VL128     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {56, 4660},
/*h(312)=14 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM()  VL512     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {312, 4668},
/*h(40)=15 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM()  VL128     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {40, 5898},
/*h(296)=16 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM()  VL512     UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {296, 5906},
/*h(50)=17 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL128     UIMM8()*/ {50, 4536}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REG_VEX_PREFIX_VL(d);
hidx = ((24*key % 101) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x72_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[144] = {
/*h(585)=0 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {585, 5952},
/*h(601)=1 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 6213},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(64)=4 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {64, 5619},
/*h(80)=5 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {80, 4509},
/*h(96)=6 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {96, 5606},
/*h(112)=7 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {112, 5678},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(586)=12 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL512  W0   UIMM8()*/ {586, 5951},
/*h(602)=13 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL512  W0   UIMM8()*/ {602, 6212},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(65)=16 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {65, 5619},
/*h(81)=17 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {81, 4509},
/*h(97)=18 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {97, 5606},
/*h(113)=19 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {113, 5678},
/*h(320)=20 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {320, 5621},
/*h(336)=21 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {336, 4513},
/*h(352)=22 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {352, 5608},
/*h(368)=23 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {368, 5682},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(66)=28 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn]  VL128  W0   UIMM8()*/ {66, 5618},
/*h(82)=29 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL128  W0   UIMM8()*/ {82, 4508},
/*h(98)=30 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn]  VL128  W1   UIMM8()*/ {98, 5605},
/*h(114)=31 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL128  W1   UIMM8()*/ {114, 5677},
/*h(321)=32 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {321, 5621},
/*h(337)=33 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {337, 4513},
/*h(353)=34 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {353, 5608},
/*h(369)=35 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {369, 5682},
/*h(576)=36 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {576, 5617},
/*h(592)=37 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {592, 4505},
/*h(608)=38 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {608, 5604},
/*h(624)=39 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {624, 5674},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(322)=44 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn]  VL256  W0   UIMM8()*/ {322, 5620},
/*h(338)=45 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL256  W0   UIMM8()*/ {338, 4512},
/*h(354)=46 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn]  VL256  W1   UIMM8()*/ {354, 5607},
/*h(370)=47 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL256  W1   UIMM8()*/ {370, 5681},
/*h(577)=48 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {577, 5617},
/*h(593)=49 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {593, 4505},
/*h(609)=50 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {609, 5604},
/*h(625)=51 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {625, 5674},
/*h(68)=52 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {68, 4773},
/*empty slot1 */ {0,0},
/*h(100)=54 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {100, 3864},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(578)=60 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn]  VL512  W0   UIMM8()*/ {578, 5616},
/*h(594)=61 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL512  W0   UIMM8()*/ {594, 4504},
/*h(610)=62 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn]  VL512  W1   UIMM8()*/ {610, 5603},
/*h(626)=63 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn]  VL512  W1   UIMM8()*/ {626, 5673},
/*h(69)=64 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {69, 4773},
/*empty slot1 */ {0,0},
/*h(101)=66 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {101, 3864},
/*empty slot1 */ {0,0},
/*h(324)=68 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {324, 4775},
/*empty slot1 */ {0,0},
/*h(356)=70 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {356, 3866},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(70)=76 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn]  VL128  W0   UIMM8()*/ {70, 4772},
/*empty slot1 */ {0,0},
/*h(102)=78 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn]  VL128  W1   UIMM8()*/ {102, 3863},
/*empty slot1 */ {0,0},
/*h(325)=80 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {325, 4775},
/*empty slot1 */ {0,0},
/*h(357)=82 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {357, 3866},
/*empty slot1 */ {0,0},
/*h(580)=84 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {580, 4771},
/*empty slot1 */ {0,0},
/*h(612)=86 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {612, 3862},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(326)=92 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn]  VL256  W0   UIMM8()*/ {326, 4774},
/*empty slot1 */ {0,0},
/*h(358)=94 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn]  VL256  W1   UIMM8()*/ {358, 3865},
/*empty slot1 */ {0,0},
/*h(581)=96 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {581, 4771},
/*empty slot1 */ {0,0},
/*h(613)=98 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {613, 3862},
/*empty slot1 */ {0,0},
/*h(72)=100 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5956},
/*h(88)=101 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 6217},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(582)=108 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn]  VL512  W0   UIMM8()*/ {582, 4770},
/*empty slot1 */ {0,0},
/*h(614)=110 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn]  VL512  W1   UIMM8()*/ {614, 3861},
/*empty slot1 */ {0,0},
/*h(73)=112 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5956},
/*h(89)=113 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 6217},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(328)=116 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {328, 5960},
/*h(344)=117 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 6221},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(74)=124 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL128  W0   UIMM8()*/ {74, 5955},
/*h(90)=125 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL128  W0   UIMM8()*/ {90, 6216},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(329)=128 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {329, 5960},
/*h(345)=129 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 6221},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(584)=132 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {584, 5952},
/*h(600)=133 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 6213},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(330)=140 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL256  W0   UIMM8()*/ {330, 5959},
/*h(346)=141 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL256  W0   UIMM8()*/ {346, 6220},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REG_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 191) % 144);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x73_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[192] = {
/*h(3281)=0 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3281, 5910},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3282)=3 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3282, 5910},
/*empty slot1 */ {0,0},
/*h(2768)=5 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2768, 5918},
/*h(3283)=6 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3283, 5910},
/*empty slot1 */ {0,0},
/*h(2769)=8 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2769, 5918},
/*h(3284)=9 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL512  W1   UIMM8()*/ {3284, 5909},
/*empty slot1 */ {0,0},
/*h(2770)=11 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2770, 5918},
/*empty slot1 */ {0,0},
/*h(2256)=13 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2256, 5914},
/*h(2771)=14 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2771, 5918},
/*h(3286)=15 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL512  W1   UIMM8()*/ {3286, 5909},
/*h(2257)=16 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2257, 5914},
/*h(2772)=17 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL256  W1   UIMM8()*/ {2772, 5917},
/*empty slot1 */ {0,0},
/*h(2258)=19 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2258, 5914},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2259)=22 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2259, 5914},
/*h(2774)=23 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL256  W1   UIMM8()*/ {2774, 5917},
/*empty slot1 */ {0,0},
/*h(2260)=25 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL128  W1   UIMM8()*/ {2260, 5913},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1232)=29 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1232, 5910},
/*empty slot1 */ {0,0},
/*h(2262)=31 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL128  W1   UIMM8()*/ {2262, 5913},
/*h(1233)=32 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1233, 5910},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1234)=35 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1234, 5910},
/*empty slot1 */ {0,0},
/*h(720)=37 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {720, 5918},
/*h(1235)=38 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1235, 5910},
/*empty slot1 */ {0,0},
/*h(721)=40 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {721, 5918},
/*h(1236)=41 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL512  W1   UIMM8()*/ {1236, 5909},
/*empty slot1 */ {0,0},
/*h(722)=43 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {722, 5918},
/*empty slot1 */ {0,0},
/*h(208)=45 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {208, 5914},
/*h(723)=46 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {723, 5918},
/*h(1238)=47 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL512  W1   UIMM8()*/ {1238, 5909},
/*h(209)=48 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {209, 5914},
/*h(724)=49 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL256  W1   UIMM8()*/ {724, 5917},
/*empty slot1 */ {0,0},
/*h(210)=51 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {210, 5914},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(211)=54 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {211, 5914},
/*h(726)=55 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL256  W1   UIMM8()*/ {726, 5917},
/*empty slot1 */ {0,0},
/*h(212)=57 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL128  W1   UIMM8()*/ {212, 5913},
/*empty slot1 */ {0,0},
/*h(1242)=59 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {1242, 4291},
/*h(1178)=60 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {1178, 4291},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(214)=63 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn]  VL128  W1   UIMM8()*/ {214, 5913},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(730)=67 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {730, 4289},
/*h(666)=68 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {666, 4289},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1246)=71 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn]  VL512      ZEROING=0 MASK=0 UIMM8()*/ {1246, 4290},
/*h(1182)=72 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn]  VL512      ZEROING=0 MASK=0 UIMM8()*/ {1182, 4290},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(218)=75 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {218, 4287},
/*h(154)=76 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {154, 4287},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(734)=79 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn]  VL256      ZEROING=0 MASK=0 UIMM8()*/ {734, 4288},
/*h(670)=80 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn]  VL256      ZEROING=0 MASK=0 UIMM8()*/ {670, 4288},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(222)=87 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {222, 4286},
/*h(158)=88 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {158, 4286},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3312)=93 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3312, 4635},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3313)=96 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3313, 4635},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3314)=99 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3314, 4635},
/*empty slot1 */ {0,0},
/*h(2800)=101 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2800, 4643},
/*h(3315)=102 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3315, 4635},
/*empty slot1 */ {0,0},
/*h(2801)=104 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2801, 4643},
/*h(3316)=105 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL512  W1   UIMM8()*/ {3316, 4634},
/*empty slot1 */ {0,0},
/*h(2802)=107 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2802, 4643},
/*empty slot1 */ {0,0},
/*h(2288)=109 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2288, 4639},
/*h(2803)=110 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2803, 4643},
/*h(3318)=111 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL512  W1   UIMM8()*/ {3318, 4634},
/*h(2289)=112 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2289, 4639},
/*h(2804)=113 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL256  W1   UIMM8()*/ {2804, 4642},
/*empty slot1 */ {0,0},
/*h(2290)=115 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2290, 4639},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2291)=118 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {2291, 4639},
/*h(2806)=119 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL256  W1   UIMM8()*/ {2806, 4642},
/*empty slot1 */ {0,0},
/*h(2292)=121 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL128  W1   UIMM8()*/ {2292, 4638},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1264)=125 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1264, 4635},
/*empty slot1 */ {0,0},
/*h(2294)=127 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL128  W1   UIMM8()*/ {2294, 4638},
/*h(1265)=128 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1265, 4635},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1266)=131 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1266, 4635},
/*empty slot1 */ {0,0},
/*h(752)=133 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {752, 4643},
/*h(1267)=134 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {1267, 4635},
/*empty slot1 */ {0,0},
/*h(753)=136 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {753, 4643},
/*h(1268)=137 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL512  W1   UIMM8()*/ {1268, 4634},
/*empty slot1 */ {0,0},
/*h(754)=139 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {754, 4643},
/*empty slot1 */ {0,0},
/*h(240)=141 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {240, 4639},
/*h(755)=142 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {755, 4643},
/*h(1270)=143 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL512  W1   UIMM8()*/ {1270, 4634},
/*h(241)=144 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {241, 4639},
/*h(756)=145 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL256  W1   UIMM8()*/ {756, 4642},
/*empty slot1 */ {0,0},
/*h(242)=147 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {242, 4639},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(243)=150 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {243, 4639},
/*h(758)=151 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL256  W1   UIMM8()*/ {758, 4642},
/*empty slot1 */ {0,0},
/*h(244)=153 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL128  W1   UIMM8()*/ {244, 4638},
/*empty slot1 */ {0,0},
/*h(1274)=155 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {1274, 3878},
/*h(1210)=156 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {1210, 3878},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(246)=159 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn]  VL128  W1   UIMM8()*/ {246, 4638},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(762)=163 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {762, 3876},
/*h(698)=164 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {698, 3876},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1278)=167 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn]  VL512      ZEROING=0 MASK=0 UIMM8()*/ {1278, 3877},
/*h(1214)=168 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn]  VL512      ZEROING=0 MASK=0 UIMM8()*/ {1214, 3877},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(250)=171 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {250, 3874},
/*h(186)=172 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {186, 3874},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(766)=175 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn]  VL256      ZEROING=0 MASK=0 UIMM8()*/ {766, 3875},
/*h(702)=176 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn]  VL256      ZEROING=0 MASK=0 UIMM8()*/ {702, 3875},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(254)=183 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {254, 3873},
/*h(190)=184 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {190, 3873},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3280)=190 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {3280, 5910},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REG_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 193) % 192);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x74_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0*/ {22, 4141},
/*h(4)=1 EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 4140},
/*h(38)=2 EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0*/ {38, 4143},
/*h(20)=3 EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 4142},
/*h(6)=4 EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0*/ {6, 4139},
/*h(36)=5 EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 4144}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x75_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0*/ {22, 6013},
/*h(4)=1 EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6012},
/*h(38)=2 EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0*/ {38, 6015},
/*h(20)=3 EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6014},
/*h(6)=4 EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0*/ {6, 6011},
/*h(36)=5 EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6016}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x76_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {73, 4127},
/*h(10)=3 EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {10, 4128},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {41, 4131},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {72, 4127},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {9, 4129},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {40, 4131},
/*h(74)=13 EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {74, 4126},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {8, 4129},
/*h(42)=17 EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {42, 4130}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21892)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21892, 6022},
/*h(20905)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20905, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_3_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8595)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8595;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(466)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {466, 4314},
/*h(1453)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1453, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17800)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17800;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15826)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15826, 6345},
/*h(16813)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16813, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10658)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {10658, 5579},
/*h(9671)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9671, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8684)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8684, 4310},
/*h(4503)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4503, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26018)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26018, 6026},
/*h(30199)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30199, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25031)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25031;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_14_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17889)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17889;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6566)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6566, 5575},
/*h(11734)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {11734, 6343}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_17_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4592)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4592, 4316},
/*h(5579)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5579, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21926)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21926;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20939)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20939;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_22_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(9616)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9616, 6026},
/*h(13797)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13797, 3982},
/*h(8629)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8629, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2474)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2474;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1487)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1487;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29157)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29157, 4311},
/*h(24976)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24976, 4922},
/*h(500)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {500, 4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17834)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17834, 6021},
/*h(16847)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16847, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_29_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5524)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5524, 6022},
/*h(9705)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9705, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26052)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26052;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_32_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20884)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20884, 4925},
/*h(25065)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25065, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5613)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5613;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21960)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21960, 3980},
/*h(20973)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20973, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9650)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9650, 6026},
/*h(14818)=1 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {14818, 5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4482)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4482, 4926},
/*h(3495)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3495, 6339},
/*h(8663)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8663, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25010)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {25010, 4922},
/*h(1521)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1521, 3978},
/*h(25997)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25997, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17868)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17868;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_47_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16881)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16881;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5558)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5558, 6022},
/*h(10726)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10726, 5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_49_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(390)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 390;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_51_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26086)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26086, 3981},
/*h(21905)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21905, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_52_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15750)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15750, 6337},
/*h(20918)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20918, 4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_54_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8608)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8608, 4922},
/*h(12789)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12789, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_55_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6634)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6634;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21994)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21994, 3980},
/*h(17813)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {17813, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11658)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11658;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10671)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_61_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9684)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9684, 3981},
/*h(4516)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4516, 4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2542)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2542, 5575},
/*h(26031)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {26031, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_64_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25044)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25044;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17902)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_67_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7566)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7566;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1411)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1411;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(424)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 424;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21939)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21939;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16771)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16771;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8642)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8642;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_74_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3474)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3474, 6342},
/*h(7655)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7655, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_75_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30157)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30157;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_78_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17847)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {17847, 6025},
/*h(12679)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12679, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_80_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9718)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9718, 3981},
/*h(5537)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5537, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4550)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25078)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25078, 4310},
/*h(20897)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20897, 4926},
/*h(26065)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26065, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_84_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14742)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5576}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14742;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8587)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8587;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_87_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1445)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1445;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(458)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 458;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_90_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17792)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17792, 6021},
/*h(21973)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {21973, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_91_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15818)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15818, 6341},
/*h(16805)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16805, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14831)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14831;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8676)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8676, 4310},
/*h(4495)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4495, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30191)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30191;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11726)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11726;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5571)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5571, 3980},
/*h(403)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {403, 4924},
/*h(4584)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4584, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26099)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26099;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_103_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20931)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20931;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_104_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9608)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9608;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8621)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8621;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2466)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2466, 5579},
/*h(7634)=1 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7634, 6345}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_107_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1479)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1479;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_108_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(492)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {492, 4313},
/*h(24968)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24968, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_109_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17826)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17826;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16839)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16839, 4311},
/*h(22007)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {22007, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_111_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11671)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6340}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5516)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5516, 6022},
/*h(9697)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9697, 3983},
/*h(4529)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4529, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3542)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6343}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_115_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20876)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20876, 4925},
/*h(25057)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25057, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_119_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1424)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1424, 6021},
/*h(5605)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5605, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_120_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(437)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 437;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20965)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20965, 4311},
/*h(21952)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21952, 3980},
/*h(16784)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16784, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_124_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9642)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9642;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8655)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8655;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_126_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25989)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25989;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_127_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25002)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {25002, 4922},
/*h(1513)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1513, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17860)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17860;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16873)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16873;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_131_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5550)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4563)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4563;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20910)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20910, 4925},
/*h(21897)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21897, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12781)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12781;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_138_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6626)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6626;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_139_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1458)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1458, 6021},
/*h(471)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {471, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21986)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21986, 3980},
/*h(17805)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {17805, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_142_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(11650)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11650, 6341},
/*h(15831)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {15831, 6344},
/*h(16818)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16818, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10663)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10663;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9676)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9676, 3981},
/*h(8689)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8689, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2534)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2534, 5575},
/*h(26023)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {26023, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_147_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25036)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25036;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17894)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_150_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7558)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_151_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(416)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {416, 4924},
/*h(5584)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5584, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_152_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4597)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4597;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21931)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21931;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_154_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20944)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20944;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_156_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9621)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9621;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_157_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3466)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3466;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_158_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2479)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2479, 5577},
/*h(30149)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30149, 3982},
/*h(1492)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1492, 3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_159_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24981)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24981;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_161_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16852)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16852, 4313},
/*h(17839)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {17839, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9710)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9710;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_166_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25070)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25070, 4310},
/*h(26057)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26057, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14734)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_169_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8579)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8579;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_171_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(450)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {450, 4314},
/*h(5618)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5618, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21965)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21965;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_174_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15810)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15810, 6341},
/*h(20978)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20978, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_175_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(10642)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {10642, 5580},
/*h(9655)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {9655, 6025},
/*h(14823)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14823, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_176_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4487)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4487;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(25015)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25015, 4921},
/*h(1526)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1526, 3977},
/*h(26002)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26002, 6026},
/*h(30183)=3 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30183, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_180_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17873)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17873;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_181_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11718)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {11718, 6337},
/*h(16886)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16886, 4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6550)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5576}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4576)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4576, 4316},
/*h(395)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {395, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_185_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21910)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21910, 6022},
/*h(26091)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26091, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_187_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9600)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9600;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8613)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8613, 4921},
/*h(13781)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13781, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_189_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7626)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7626, 6341},
/*h(6639)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6639, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24960)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24960;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_191_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(484)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {484, 4313},
/*h(29141)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29141, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_193_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21999)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21999;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_194_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11663)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11663;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5508)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5508, 6022},
/*h(4521)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4521, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_196_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3534)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3534;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_197_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26036)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26036;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20868)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20868;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_200_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17907)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17907;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1416)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1416;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_203_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(429)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 429;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_205_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16776)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16776;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_206_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14802)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5583}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14802;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_207_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9634)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9634, 6026},
/*h(13815)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13815, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3479)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3479, 6340},
/*h(8647)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8647, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_210_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29175)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29175, 4311},
/*h(24994)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24994, 4922},
/*h(1505)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1505, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_213_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16865)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16865;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_214_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10710)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {10710, 5581},
/*h(5542)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5542, 6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_215_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4555)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4555;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_217_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26070)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26070, 3981},
/*h(20902)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20902, 4925},
/*h(21889)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21889, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_220_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8592)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8592, 4922},
/*h(12773)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12773, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_222_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1450)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1450, 6021},
/*h(463)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {463, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_224_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17797)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17797;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_225_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16810)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16810, 4924},
/*h(15823)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {15823, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_227_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4500)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4500, 4925},
/*h(8681)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8681, 4312},
/*h(9668)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9668, 3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_230_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25028)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25028;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_234_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5576)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5576;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_235_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4589)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4589;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_236_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21923)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21923;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_237_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20936)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20936;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_239_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8626)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8626, 4922},
/*h(9613)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {9613, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_240_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3458)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3458, 6341},
/*h(7639)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {7639, 6344}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_241_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1484)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1484, 3977},
/*h(2471)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2471, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_242_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(497)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {497, 4314},
/*h(24973)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {24973, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_244_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16844)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16844, 4313},
/*h(17831)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {17831, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_246_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9702)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9702, 3981},
/*h(5521)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5521, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4534)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4534;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_249_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20881)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20881, 4926},
/*h(25062)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25062, 4310},
/*h(26049)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26049, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_250_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14726)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14726;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_253_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5610)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5610, 3980},
/*h(1429)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1429, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_256_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21957)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {21957, 3982},
/*h(16789)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16789, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_257_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20970)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_258_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10634)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {10634, 5579},
/*h(9647)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {9647, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_259_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8660)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8660;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_261_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25007)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25007, 4921},
/*h(25994)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25994, 6026},
/*h(1518)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1518, 3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_263_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17865)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17865;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_264_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16878)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16878;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_265_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6542)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_266_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(387)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {387, 4924},
/*h(5555)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5555, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_268_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21902)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21902, 6022},
/*h(26083)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26083, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_269_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20915)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20915;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_271_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13773)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13773;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_272_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2450)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2450, 5580},
/*h(6631)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6631, 5577},
/*h(7618)=2 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7618, 6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_273_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1463)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1463;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29133)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29133;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_275_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17810)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17810, 6021},
/*h(21991)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {21991, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_276_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11655)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {11655, 6339},
/*h(16823)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16823, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_278_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(9681)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9681, 3983},
/*h(4513)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4513, 4926},
/*h(8694)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8694, 4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_279_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3526)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_280_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26028)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26028;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_281_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25041)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25041;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_283_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17899)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17899;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_285_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1408)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1408, 6021},
/*h(5589)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5589, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_286_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(421)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 421;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21936)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21936, 6023},
/*h(16768)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16768, 4924},
/*h(20949)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20949, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_289_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14794)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14794;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_290_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13807)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_291_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3471)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3471;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_293_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29167)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29167;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_295_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17844)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17844;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_297_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10702)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10702, 5575},
/*h(9715)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9715, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_298_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4547)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4547;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_300_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26062)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26062, 3981},
/*h(25075)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25075, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_303_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8584)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8584;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_304_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6610)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5583}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6610;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_305_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(455)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {455, 4311},
/*h(5623)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5623, 3982},
/*h(1442)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1442, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_307_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21970)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_308_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(16802)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16802, 4924},
/*h(15815)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {15815, 6339},
/*h(20983)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20983, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_309_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10647)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5578}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10647;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_310_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4492)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4492, 4925},
/*h(8673)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8673, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_311_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2518)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5581}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2518;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_312_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26007)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26007;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_314_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17878)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17878;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_317_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(400)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {400, 4924},
/*h(4581)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4581, 4311},
/*h(5568)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5568, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_319_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26096)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26096;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_320_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20928)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20928;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_322_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8618)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8618, 4922},
/*h(9605)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {9605, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_323_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7631)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7631;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_324_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1476)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1476, 3977},
/*h(30133)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30133, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_325_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(489)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {489, 4314},
/*h(24965)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {24965, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_327_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16836)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16836, 4313},
/*h(22004)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {22004, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_329_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5513)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5513;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_330_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4526)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_332_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20873)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20873;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_336_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5602)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5602, 3980},
/*h(1421)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1421, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_337_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(434)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 434;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_339_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20962)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20962, 4316},
/*h(16781)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16781, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_340_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10626)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10626;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_341_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9639)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {9639, 6025},
/*h(14807)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {14807, 5582}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_342_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8652)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8652;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_344_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(1510)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1510, 3977},
/*h(30167)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30167, 3982},
/*h(24999)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {24999, 4921},
/*h(25986)=3 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25986, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_346_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17857)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17857;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_347_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16870)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16870;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_348_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6534)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6534, 5575},
/*h(5547)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5547, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_349_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4560)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4560;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_351_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21894)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_352_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20907)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20907;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_353_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13765)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13765;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_354_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8597)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8597;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_355_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2442)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2442;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_356_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1455)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1455, 6025},
/*h(468)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {468, 4313},
/*h(29125)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29125, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_358_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17802)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17802;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_359_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16815)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_361_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8686)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8686, 4310},
/*h(9673)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9673, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_363_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26020)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26020;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_364_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25033)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25033;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_366_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17891)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17891;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_368_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5581)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5581;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_369_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4594)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4594;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_370_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21928)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21928;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_371_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20941)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20941;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_372_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14786)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14786;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_373_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9618)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9618, 6026},
/*h(13799)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13799, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_374_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8631)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8631, 4921},
/*h(3463)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3463, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_375_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1489)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1489;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_376_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(24978)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24978, 4922},
/*h(502)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {502, 4313},
/*h(29159)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29159, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_378_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17836)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17836, 6020},
/*h(16849)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16849, 4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_380_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5526)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5526, 6022},
/*h(9707)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9707, 3983},
/*h(10694)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10694, 5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_383_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20886)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20886, 4925},
/*h(25067)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25067, 4312},
/*h(26054)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26054, 3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_386_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8576)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8576, 4922},
/*h(12757)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12757, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_387_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6602)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6602;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_388_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5615)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5615;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_390_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21962)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_391_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20975)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20975;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_392_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9652)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9652, 6024},
/*h(10639)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10639, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_393_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4484)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4484;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_394_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2510)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2510;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_395_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25012)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25012, 4920},
/*h(25999)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25999, 6025},
/*h(1523)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1523, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_397_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17870)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17870;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_398_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16883)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16883;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_400_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(392)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 392;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_402_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26088)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26088, 3983},
/*h(21907)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21907, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_405_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8610)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8610, 4922},
/*h(12791)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12791, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_406_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7623)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7623, 6339},
/*h(2455)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {2455, 5578}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_407_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30125)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30125;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_408_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(481)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 481;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_409_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17815)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_410_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21996)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21996;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_412_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9686)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9686, 3981},
/*h(5505)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5505, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_413_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4518)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4518;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_414_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26033)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26033;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_415_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25046)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25046, 4310},
/*h(20865)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20865, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_417_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17904)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17904;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_419_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1413)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1413;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_420_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(426)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 426;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_422_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16773)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16773, 4921},
/*h(21941)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21941, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_423_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15786)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15786;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_424_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14799)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14799;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_425_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8644)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8644;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_427_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30159)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30159;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_430_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11694)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11694;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_431_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5539)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5539;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_432_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4552)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4552;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_434_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26067)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26067, 3983},
/*h(20899)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20899, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_437_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8589)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8589;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_438_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2434)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2434, 5579},
/*h(6615)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6615, 5582}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_439_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(460)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {460, 4313},
/*h(1447)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1447, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_441_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17794)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17794, 6021},
/*h(21975)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {21975, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_442_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16807)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_444_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8678)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8678, 4310},
/*h(4497)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4497, 4926},
/*h(9665)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9665, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_447_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25025)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25025;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_451_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5573)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5573;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_452_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4586)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4586, 4316},
/*h(405)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {405, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_453_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21920)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21920;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_454_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20933)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20933, 4311},
/*h(26101)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {26101, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_456_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9610)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9610, 6026},
/*h(8623)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8623, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_458_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1481)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1481;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_459_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(494)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {494, 4313},
/*h(24970)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24970, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_461_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17828)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17828, 6020},
/*h(16841)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16841, 4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_462_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15854)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15854;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_463_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5518)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5518, 6022},
/*h(9699)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9699, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_464_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4531)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4531;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_466_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20878)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20878, 4925},
/*h(25059)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25059, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_469_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12749)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12749;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_470_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6594)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6594, 5579},
/*h(1426)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1426, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_471_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5607)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5607, 3982},
/*h(439)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {439, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_473_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21954)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21954, 3980},
/*h(16786)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16786, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_474_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20967)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20967;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_475_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9644)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9644, 6024},
/*h(10631)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10631, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_476_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8657)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8657;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_477_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2502)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2502;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_478_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1515)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1515, 3978},
/*h(25004)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25004, 4920},
/*h(25991)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25991, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((10*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_480_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17862)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17862;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_481_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16875)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16875;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_483_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4565)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4565, 4311},
/*h(5552)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5552, 6023},
/*h(384)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {384, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_485_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26080)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26080, 3983},
/*h(21899)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21899, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_486_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20912)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20912;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_488_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12783)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12783;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_489_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2447)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2447;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_490_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1460)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1460, 6020},
/*h(30117)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30117, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_492_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17807)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_493_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16820)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16820, 4923},
/*h(21988)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21988, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_495_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9678)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9678;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_496_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8691)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8691;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_497_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26025)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26025;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_498_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25038)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25038;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_500_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17896)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17896;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_502_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5586)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_503_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(418)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {418, 4924},
/*h(4599)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4599, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_505_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20946)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20946, 4316},
/*h(21933)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21933, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_506_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15778)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15778;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_507_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9623)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {9623, 6025},
/*h(14791)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14791, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_510_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1494)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1494, 3977},
/*h(30151)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30151, 3982},
/*h(24983)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {24983, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_512_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17841)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17841;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_513_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16854)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16854, 4313},
/*h(11686)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {11686, 6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_514_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9712)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_515_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4544)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4544;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_517_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26059)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26059;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_518_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25072)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25072;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_519_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13749)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13749;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_520_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7594)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7594, 6341},
/*h(8581)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8581, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_521_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6607)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6607;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_522_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29109)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29109, 4921},
/*h(5620)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5620, 3979},
/*h(452)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {452, 4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_524_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21967)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21967;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_525_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20980)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20980;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_527_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4489)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4489;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_528_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3502)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3502;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_529_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26004)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26004;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_532_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17875)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17875;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_534_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(397)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 397;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_535_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4578)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4578;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_536_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26093)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26093;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_539_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(13783)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13783, 3982},
/*h(9602)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9602, 6026},
/*h(8615)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8615, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_541_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1473)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1473;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_542_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(486)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {486, 4313},
/*h(29143)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29143, 4311},
/*h(24962)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24962, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_544_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16833)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16833, 4314},
/*h(22001)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {22001, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_545_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15846)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_546_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5510)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5510;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_547_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4523)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4523;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_549_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20870)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20870, 4925},
/*h(26038)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {26038, 6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_551_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17909)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_552_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11754)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11754, 6341},
/*h(12741)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12741, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_553_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1418)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1418;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_554_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(431)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 431;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_556_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16778)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16778;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_557_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15791)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15791;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_558_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9636)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9636;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_559_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8649)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8649;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_560_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7662)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_561_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24996)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24996, 4920},
/*h(1507)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1507, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_564_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16867)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16867;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_566_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5544)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5544, 6023},
/*h(4557)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4557, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_568_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21891)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21891;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_569_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20904)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20904;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_571_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8594)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8594, 4922},
/*h(12775)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12775, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_572_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2439)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2439;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_573_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1452)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1452;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_574_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(465)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 465;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_575_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17799)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17799;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_576_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16812)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16812;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_578_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4502)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4502, 4925},
/*h(9670)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9670, 3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_579_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8683)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8683;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_580_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26017)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26017;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_581_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25030)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_583_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17888)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17888;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_585_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5578)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5578;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_586_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4591)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4591;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_588_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20938)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20938, 4316},
/*h(21925)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21925, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_590_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9615)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9615;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_591_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8628)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8628;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_592_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1486)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1486;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_593_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24975)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {24975, 4921},
/*h(499)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {499, 4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_595_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17833)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17833;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_596_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16846)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_597_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9704)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9704, 3983},
/*h(5523)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5523, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_600_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26051)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26051, 3983},
/*h(20883)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20883, 4926},
/*h(25064)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25064, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_602_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13741)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13741;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_603_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7586)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_604_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6599)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6599;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_605_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1431)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1431, 6025},
/*h(29101)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29101, 4921},
/*h(5612)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5612, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_607_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21959)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21959;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_608_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20972)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20972, 4315},
/*h(16791)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16791, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_610_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4481)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4481, 4926},
/*h(8662)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8662, 4310},
/*h(9649)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9649, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_611_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3494)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3494;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_612_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1520)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1520, 3978},
/*h(25996)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25996, 6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_613_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25009)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25009;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_614_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17867)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17867;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_615_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16880)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16880;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_617_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(389)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {389, 4921},
/*h(5557)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5557, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_619_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21904)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21904, 6023},
/*h(26085)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {26085, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_620_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20917)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20917;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_621_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14762)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_622_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13775)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13775;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_625_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29135)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29135;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_627_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17812)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17812, 6020},
/*h(21993)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21993, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_628_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10670)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_629_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9683)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9683;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_630_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4515)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4515;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_631_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26030)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_632_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25043)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25043;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_634_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17901)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17901;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_635_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11746)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_636_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1410)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1410, 6021},
/*h(5591)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5591, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_637_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(423)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 423;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_639_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(16770)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16770, 4924},
/*h(20951)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20951, 4311},
/*h(21938)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21938, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_640_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15783)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15783;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_642_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8641)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8641;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_643_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7654)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_646_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17846)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_649_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5536)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5536, 6023},
/*h(9717)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9717, 3982},
/*h(4549)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4549, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_650_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3562)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_651_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26064)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26064;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_652_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20896)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20896, 4926},
/*h(25077)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25077, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_654_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8586)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_655_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7599)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7599;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_656_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1444)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1444, 6020},
/*h(30101)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30101, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_657_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(457)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 457;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_658_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21972)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21972;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_659_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16804)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16804;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_660_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14830)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14830;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_661_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4494)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4494, 4925},
/*h(8675)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8675, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_668_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5570)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5570;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_669_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(402)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {402, 4924},
/*h(4583)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4583, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_671_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20930)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20930, 4316},
/*h(26098)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26098, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_672_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15762)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {6342}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_673_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9607)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9607;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_674_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8620)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8620;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_675_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1478)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1478, 3977},
/*h(30135)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30135, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_676_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(491)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {491, 4314},
/*h(24967)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {24967, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_678_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(17825)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17825, 6021},
/*h(22006)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {22006, 3979},
/*h(16838)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16838, 4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_679_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11670)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6338}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_680_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9696)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9696, 3983},
/*h(5515)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5515, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_681_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4528)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4528;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_683_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25056)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25056, 4312},
/*h(20875)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20875, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_685_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13733)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13733;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_686_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11759)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11759;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_688_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(436)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {436, 4923},
/*h(1423)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1423, 6025},
/*h(29093)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29093, 4921},
/*h(5604)=3 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5604, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_691_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20964)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20964, 4315},
/*h(16783)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16783, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_692_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9641)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9641;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_693_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8654)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_695_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1512)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1512, 3978},
/*h(25988)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25988, 6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_696_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25001)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25001;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_697_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17859)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17859;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_698_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16872)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16872;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_700_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4562)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4562, 4316},
/*h(5549)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5549, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_702_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21896)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21896;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_703_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20909)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_704_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14754)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14754;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_705_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(13767)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13767, 3982},
/*h(8599)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8599, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_707_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1457)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1457;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_708_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(470)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {470, 4313},
/*h(29127)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29127, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_709_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17804)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17804;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_710_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16817)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16817, 4924},
/*h(21985)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21985, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_711_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10662)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10662, 5575},
/*h(15830)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {15830, 6343}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_712_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9675)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9675;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_713_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8688)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8688;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_714_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26022)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26022;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_715_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25035)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25035;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_717_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(12725)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12725, 4921},
/*h(17893)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {17893, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_719_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6570)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6570, 5579},
/*h(5583)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5583, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_720_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4596)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4596;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_722_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21930)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21930, 6023},
/*h(20943)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20943, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_724_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9620)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9620;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_726_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2478)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2478;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_727_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24980)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24980, 4920},
/*h(1491)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1491, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_729_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17838)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17838;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_730_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16851)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16851;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_732_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9709)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9709;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_733_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3554)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3554;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_734_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26056)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26056;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_735_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25069)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25069;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_737_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8578)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8578, 4922},
/*h(12759)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12759, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_738_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7591)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7591;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_739_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(30093)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30093, 6025},
/*h(5617)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5617, 3980},
/*h(449)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {449, 4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_741_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21964)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21964;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_742_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20977)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20977;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_743_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14822)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14822;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_744_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9654)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9654, 6024},
/*h(4486)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4486, 4925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_746_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26001)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26001, 6026},
/*h(1525)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1525, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_747_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25014)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25014;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_749_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17872)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17872, 3978},
/*h(16885)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16885, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_750_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10730)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_752_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(394)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 394;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_753_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21909)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_754_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26090)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26090;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_755_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15754)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15754, 6341},
/*h(14767)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14767, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_756_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8612)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8612;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_758_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6638)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6638, 5575},
/*h(30127)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30127, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_759_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(483)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 483;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_761_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21998)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_762_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11662)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_763_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5507)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5507;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_764_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4520)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4520;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_766_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20867)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20867, 4926},
/*h(26035)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26035, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_768_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17906)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17906;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_769_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7570)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7570, 6342},
/*h(11751)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {11751, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_770_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1415)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1415;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_771_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(428)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 428;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_773_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16775)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {16775, 4921},
/*h(21943)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21943, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_775_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9633)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9633;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_776_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8646)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8646;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_777_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3478)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6338}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3478;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_778_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1504)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1504, 3978},
/*h(24993)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24993, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_781_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16864)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16864;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_783_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4554)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4554, 4316},
/*h(5541)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5541, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_784_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3567)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3567;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_785_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21888)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21888, 6023},
/*h(26069)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {26069, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_786_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20901)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20901;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_788_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8591)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8591;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_790_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1449)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1449;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_791_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(462)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 462;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_792_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17796)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17796;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_793_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16809)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16809;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_794_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15822)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15822;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_795_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4499)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4499, 4926},
/*h(9667)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9667, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_796_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8680)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8680;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_798_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25027)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25027;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_800_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12717)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12717;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_801_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11730)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {6345}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_802_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6562)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6562, 5579},
/*h(5575)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5575, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_803_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4588)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4588, 4315},
/*h(407)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {407, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_805_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26103)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {26103, 3982},
/*h(21922)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21922, 6023},
/*h(20935)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {20935, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_806_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15767)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6340}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15767;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_807_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9612)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9612;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_808_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7638)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {7638, 6343},
/*h(8625)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8625, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_809_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2470)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2470;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_810_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(24972)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24972, 4920},
/*h(496)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {496, 4314},
/*h(1483)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1483, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_812_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17830)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17830;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_813_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16843)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16843;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_814_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5520)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5520;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_815_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4533)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4533, 4921},
/*h(9701)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9701, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_817_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20880)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20880, 4926},
/*h(26048)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26048, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_818_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25061)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25061;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_820_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12751)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12751;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_822_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1428)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1428, 6020},
/*h(30085)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30085, 6025},
/*h(5609)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5609, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_824_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21956)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21956;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_825_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16788)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16788, 4923},
/*h(20969)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20969, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_827_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9646)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9646, 6024},
/*h(8659)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8659, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_829_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1517)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1517, 3982},
/*h(25993)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25993, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_830_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25006)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_832_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17864)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17864, 3978},
/*h(16877)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16877, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_833_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10722)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_834_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(386)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {386, 4924},
/*h(5554)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5554, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_835_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4567)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4567;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_836_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26082)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26082, 3983},
/*h(21901)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21901, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_837_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20914)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20914;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_838_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15746)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15746, 6341},
/*h(14759)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14759, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_841_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(6630)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6630, 5575},
/*h(1462)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1462, 6020},
/*h(30119)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30119, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_844_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21990)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21990, 3979},
/*h(16822)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16822, 4923},
/*h(17809)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17809, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_845_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11654)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_846_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9680)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9680;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_847_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4512)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4512, 4926},
/*h(8693)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8693, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_848_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2538)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_849_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25040)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25040, 4312},
/*h(26027)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26027, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_851_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17898)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17898, 3978},
/*h(13717)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13717, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_852_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7562)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_853_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6575)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6575;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_854_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(420)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {420, 4923},
/*h(29077)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29077, 4921},
/*h(5588)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5588, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_856_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21935)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21935;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_857_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20948)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20948;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_859_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3470)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3470;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_863_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17843)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17843;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_866_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9714)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9714, 3983},
/*h(4546)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4546, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_867_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3559)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3559;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_868_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26061)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26061;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_869_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25074)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25074;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_870_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14738)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5580}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_871_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8583)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {8583, 4921},
/*h(13751)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13751, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_873_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5622)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5622, 3979},
/*h(1441)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1441, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_874_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(454)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {454, 4313},
/*h(29111)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29111, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_875_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21969)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21969;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_876_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20982)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20982, 4315},
/*h(16801)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16801, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_877_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10646)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {10646, 5576},
/*h(15814)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15814, 6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_878_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4491)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4491;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_879_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8672)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8672;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_880_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26006)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_883_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17877)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {17877, 3982},
/*h(12709)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12709, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_884_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11722)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_885_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10735)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10735;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_886_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4580)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4580, 4315},
/*h(399)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {399, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_888_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26095)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26095;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_889_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15759)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15759;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_890_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9604)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9604;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_891_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7630)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {7630, 6337},
/*h(8617)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8617, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_892_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1475)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1475;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_893_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(488)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {488, 4314},
/*h(24964)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24964, 4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_895_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(22003)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 22003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_896_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16835)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16835;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_897_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5512)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5512;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_898_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4525)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4525;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_899_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3538)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {6345}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_900_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20872)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20872;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_902_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17911)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_903_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7575)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {7575, 6340},
/*h(12743)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {12743, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_905_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1420)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1420, 6020},
/*h(5601)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5601, 3980},
/*h(433)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {433, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_908_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16780)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16780, 4923},
/*h(20961)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20961, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_909_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14806)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5581}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14806;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_910_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9638)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9638, 6024},
/*h(8651)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8651, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_912_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1509)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1509, 3982},
/*h(25985)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25985, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_913_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24998)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_914_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17856)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17856;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_915_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16869)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16869;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_917_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5546)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5546;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_918_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4559)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4559;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_919_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21893)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21893;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_920_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20906)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20906;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_922_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8596)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8596;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_924_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1454)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1454;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_925_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(467)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 467;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_927_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16814)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16814, 4923},
/*h(17801)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17801, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_929_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9672)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9672;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_930_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8685)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8685;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_931_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2530)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2530;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_932_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25032)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25032, 4312},
/*h(26019)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26019, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_934_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17890)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17890, 3978},
/*h(13709)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13709, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_935_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7554)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7554, 6341},
/*h(11735)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {11735, 6344}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_936_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5580)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5580, 3979},
/*h(6567)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6567, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_937_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4593)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4593, 4316},
/*h(29069)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29069, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_939_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21927)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21927;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_940_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20940)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20940;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_941_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9617)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9617;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_942_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3462)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3462, 6337},
/*h(8630)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {8630, 4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_944_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(24977)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24977, 4922},
/*h(501)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {501, 4311},
/*h(1488)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1488, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_946_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17835)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17835;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_947_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16848)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16848;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_949_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9706)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9706, 3983},
/*h(5525)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5525, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_951_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26053)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26053;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_952_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25066)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25066, 4312},
/*h(20885)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20885, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_953_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(14730)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {14730, 5579},
/*h(13743)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13743, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_956_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5614)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_957_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29103)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29103;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_958_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21961)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21961;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_959_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20974)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20974;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_960_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10638)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10638;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_961_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9651)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9651, 6026},
/*h(4483)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4483, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_963_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25998)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25998, 6024},
/*h(1522)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1522, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_964_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25011)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25011;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_966_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16882)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16882, 4314},
/*h(17869)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {17869, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_967_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6546)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {6546, 5580},
/*h(11714)=1 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11714, 6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_968_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5559)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5559, 6025},
/*h(10727)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10727, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_969_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(391)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 391;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_971_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21906)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21906, 6023},
/*h(26087)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {26087, 3982},
/*h(20919)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20919, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_972_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15751)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15751;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_974_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7622)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {7622, 6337},
/*h(8609)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8609, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_975_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2454)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5576}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2454;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_976_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(480)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 480;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_978_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17814)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17814, 6020},
/*h(21995)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21995, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_980_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5504)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5504, 6023},
/*h(9685)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9685, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_981_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4517)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4517;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_982_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3530)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3530, 6341},
/*h(2543)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2543, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_983_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25045)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25045, 4311},
/*h(26032)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26032, 6026},
/*h(20864)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20864, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_985_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17903)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17903;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_986_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7567)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7567;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_988_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1412)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1412, 6020},
/*h(425)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {425, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_990_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21940)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21940;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_991_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16772)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16772;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_992_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14798)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14798;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_993_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8643)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8643;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_999_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10706)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5583}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10706;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1000_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4551)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4551, 4311},
/*h(5538)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5538, 6023},
/*h(9719)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9719, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1002_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26066)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26066;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1003_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20898)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20898, 4926},
/*h(25079)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25079, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1004_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14743)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5578}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14743;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1005_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8588)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8588;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1007_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1446)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1446, 6020},
/*h(30103)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30103, 6025},
/*h(6614)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6614, 5581}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1008_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(459)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 459;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1009_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17793)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17793;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1010_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16806)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16806, 4923},
/*h(21974)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21974, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1012_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9664)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9664;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1013_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4496)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4496, 4926},
/*h(8677)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8677, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1015_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25024)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25024;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1017_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13701)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13701;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1018_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11727)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11727;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1019_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5572)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5572;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1020_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29061)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29061, 4921},
/*h(4585)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4585, 4316},
/*h(404)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {404, 4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1022_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26100)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26100, 3981},
/*h(20932)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20932, 4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1024_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9609)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9609;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1025_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8622)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8622;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1027_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1480)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1480, 3978},
/*h(493)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {493, 4311},
/*h(24969)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24969, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1029_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17827)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17827;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1030_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16840)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16840;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1031_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5517)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5517;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1032_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4530)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4530, 4926},
/*h(9698)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9698, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1033_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3543)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6344}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3543;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1035_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25058)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25058, 4312},
/*h(20877)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20877, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1036_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(14722)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {14722, 5579},
/*h(13735)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13735, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1039_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(29095)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29095, 4921},
/*h(438)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {438, 4923},
/*h(5606)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5606, 3979},
/*h(1425)=3 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1425, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1041_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21953)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21953;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1042_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20966)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20966, 4315},
/*h(16785)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16785, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1043_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10630)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10630;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1044_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8656)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8656, 4312},
/*h(9643)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9643, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1046_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1514)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1514, 3978},
/*h(25990)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25990, 6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1047_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25003)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1049_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(17861)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {17861, 3982},
/*h(12693)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12693, 4921},
/*h(16874)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16874, 4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1050_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6538)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1051_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5551)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5551;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1052_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4564)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4564;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1053_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21898)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21898;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1054_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20911)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1058_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2446)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2446, 5575},
/*h(1459)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1459, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1061_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(17806)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17806, 6020},
/*h(21987)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21987, 3980},
/*h(16819)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16819, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1063_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9677)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9677;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1064_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3522)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3522, 6341},
/*h(8690)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8690, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1065_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2535)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2535;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1066_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26024)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26024, 6026},
/*h(25037)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25037, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1068_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17895)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17895;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1069_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7559)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7559, 6339},
/*h(12727)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12727, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1071_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4598)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4598, 4315},
/*h(5585)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5585, 3980},
/*h(417)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {417, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1073_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21932)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21932;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1074_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20945)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20945;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1075_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(14790)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {14790, 5575},
/*h(9622)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9622, 6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1078_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24982)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24982, 4920},
/*h(1493)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1493, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1080_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17840)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17840;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1081_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16853)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16853;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1082_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10698)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10698;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1083_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9711)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9711;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1085_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26058)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26058;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1086_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25071)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25071;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1087_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14735)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14735;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1088_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8580)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8580;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1090_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5619)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5619, 3980},
/*h(30095)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30095, 6025},
/*h(6606)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6606, 5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1091_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(451)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 451;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1093_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21966)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21966, 3979},
/*h(20979)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20979, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1095_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4488)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4488;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1097_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1527)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1527, 3982},
/*h(2514)=1 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2514, 5583},
/*h(26003)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26003, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1100_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17874)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17874;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1101_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16887)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16887, 4311},
/*h(11719)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {11719, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6551)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5578}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6551;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1103_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(396)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {396, 4923},
/*h(4577)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4577, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1105_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26092)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26092, 3981},
/*h(21911)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21911, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1107_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9601)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9601;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1108_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8614)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(485)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {485, 4311},
/*h(24961)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24961, 4922},
/*h(1472)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1472, 3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1112_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(22000)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 22000;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16832)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16832;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1114_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5509)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5509;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1115_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4522)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4522;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1116_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3535)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3535;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1117_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26037)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {26037, 6025},
/*h(20869)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20869, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1119_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17908)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17908;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1122_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(430)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {430, 4923},
/*h(1417)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1417, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1125_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15790)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15790, 6337},
/*h(16777)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16777, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1127_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8648)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8648, 4312},
/*h(9635)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9635, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1129_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1506)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24995)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24995;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1132_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16866)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16866, 4314},
/*h(12685)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12685, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1133_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6530)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6530, 5579},
/*h(10711)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {10711, 5582}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1134_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5543)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5543;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1135_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4556)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4556;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1136_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21890)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21890;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1137_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20903)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20903, 4921},
/*h(26071)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {26071, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1139_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8593)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8593;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2438)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2438, 5575},
/*h(1451)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1451, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1142_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(464)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 464;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1144_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17798)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17798, 6020},
/*h(16811)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16811, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1146_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9669)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9669;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1147_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8682)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8682, 4312},
/*h(4501)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4501, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1149_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26016)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26016, 6026},
/*h(30197)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30197, 3982},
/*h(25029)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25029, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1152_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12719)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12719;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1154_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4590)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4590, 4315},
/*h(5577)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5577, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1156_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21924)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21924;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1157_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20937)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20937;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1158_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9614)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1159_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8627)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8627;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1161_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24974)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24974, 4920},
/*h(1485)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1485, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1162_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(498)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 498;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17832)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17832;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1164_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16845)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16845;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10690)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10690;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1166_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5522)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5522, 6023},
/*h(4535)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4535, 4921},
/*h(9703)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9703, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1168_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26050)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26050;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1169_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20882)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20882, 4926},
/*h(25063)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25063, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1170_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14727)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14727;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1172_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6598)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1173_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(30087)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {30087, 6025},
/*h(5611)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5611, 3980},
/*h(1430)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1430, 6020}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1175_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21958)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21958;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1176_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16790)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16790, 4923},
/*h(20971)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20971, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9648)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9648, 6026},
/*h(4480)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4480, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1179_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8661)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8661;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1180_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2506)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2506, 5579},
/*h(1519)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1519, 3982},
/*h(25995)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25995, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1181_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25008)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25008;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17866)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17866, 3978},
/*h(16879)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16879, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1185_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5556)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5556, 6022},
/*h(6543)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6543, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1186_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(388)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 388;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1188_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20916)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20916, 4925},
/*h(21903)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21903, 6025},
/*h(26084)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26084, 3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21992)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21992, 3980},
/*h(17811)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17811, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1197_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9682)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9682;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1198_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4514)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4514, 4926},
/*h(8695)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8695, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1199_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3527)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3527;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1200_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26029)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26029;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1201_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25042)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25042;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1202_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17900)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {17900, 3977},
/*h(13719)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13719, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1205_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(5590)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5590, 3979},
/*h(422)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {422, 4923},
/*h(1409)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1409, 6021},
/*h(29079)=3 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29079, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1207_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21937)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21937;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1208_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20950)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20950, 4315},
/*h(15782)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15782, 6337},
/*h(16769)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16769, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1210_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8640)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8640;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1214_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17845)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17845;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1215_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12677)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12677;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1216_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11690)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11690, 6341},
/*h(10703)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10703, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1217_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9716)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9716;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1218_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4548)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4548;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1219_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26063)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26063;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1220_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25076)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4310}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25076;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1222_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8585)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8585;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1223_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7598)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1224_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1443)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1443;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1225_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(456)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1227_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16803)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16803, 4924},
/*h(21971)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21971, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1230_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8674)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8674, 4312},
/*h(4493)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4493, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1231_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2519)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5582}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2519;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1232_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30189)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30189;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1234_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17879)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17879;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1235_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12711)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12711;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1236_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5569)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5569;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1237_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4582)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4582, 4315},
/*h(401)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {401, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1239_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26097)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26097;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1240_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20929)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20929;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1241_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9606)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6024}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1242_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8619)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8619;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1244_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(490)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {490, 4314},
/*h(24966)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24966, 4920},
/*h(1477)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1477, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1246_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17824)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17824, 6021},
/*h(22005)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {22005, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16837)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16837;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1248_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15850)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15850;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1249_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5514)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5514, 6023},
/*h(4527)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4527, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1252_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20874)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20874;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1255_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11758)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1256_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1422)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1422, 6020},
/*h(5603)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5603, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1257_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(435)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 435;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1259_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16782)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16782, 4923},
/*h(20963)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20963, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1261_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9640)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9640, 6026},
/*h(8653)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8653, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1263_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25987)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25987, 6026},
/*h(1511)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {1511, 3982},
/*h(2498)=2 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2498, 5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1264_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25000)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25000;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1266_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17858)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17858, 3978},
/*h(16871)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16871, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1267_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6535)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6535;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1268_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5548)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5548;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1269_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4561)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4561;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1271_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20908)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20908, 4925},
/*h(21895)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {21895, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8598)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1275_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1456)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1276_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(469)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 469;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1278_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21984)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21984, 3980},
/*h(17803)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17803, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1279_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16816)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16816;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1280_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9674)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9674;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1281_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8687)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1283_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25034)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25034, 4312},
/*h(26021)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {26021, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1285_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17892)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {17892, 3977},
/*h(13711)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {13711, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4595)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4595, 4316},
/*h(29071)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29071, 4921},
/*h(5582)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5582, 3979}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1290_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21929)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21929;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1291_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20942)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1292_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9619)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9619;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1295_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1490)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1490;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1296_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(503)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {503, 4311},
/*h(24979)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24979, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1297_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17837)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17837;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1298_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16850)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16850;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1299_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11682)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11682, 6341},
/*h(10695)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10695, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1300_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9708)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9708, 3981},
/*h(5527)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5527, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1302_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26055)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26055;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1303_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25068)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25068, 4310},
/*h(20887)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20887, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1305_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8577)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8577;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1306_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7590)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1307_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5616)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5616;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1308_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(448)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 448;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1310_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20976)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20976, 4316},
/*h(21963)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21963, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1312_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9653)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9653;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1313_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3498)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3498, 6341},
/*h(4485)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4485, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1314_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26000)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26000, 6026},
/*h(2511)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2511, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1315_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1524)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1524, 3977},
/*h(30181)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30181, 3982},
/*h(25013)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25013, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1317_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17871)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17871;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1318_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16884)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16884;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1320_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(393)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 393;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1322_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21908)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21908, 6022},
/*h(26089)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26089, 3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1324_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14766)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14766;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1325_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8611)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8611;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1327_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(482)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 482;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1329_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21997)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21997;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1330_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15842)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15842;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1331_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5506)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1332_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9687)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9687, 3982},
/*h(4519)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4519, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1334_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26034)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26034;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1335_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20866)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20866, 4926},
/*h(25047)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {25047, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1337_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17905)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17905;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1338_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11750)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11750;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1339_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1414)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1414, 6020},
/*h(427)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {427, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1341_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21942)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1342_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16774)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16774;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1344_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8645)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8645, 4311},
/*h(13813)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {13813, 3982},
/*h(9632)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9632, 6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1345_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7658)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7658;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1347_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24992)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24992, 4922},
/*h(29173)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {29173, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1350_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11695)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11695;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1351_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5540)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5540;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1352_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3566)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3566, 6337},
/*h(4553)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4553, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1354_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20900)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20900, 4925},
/*h(26068)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26068, 3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1357_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8590)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1358_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1448)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1448;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1359_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(461)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 461;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1361_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16808)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16808, 4924},
/*h(17795)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17795, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1363_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9666)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9666;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1364_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4498)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4498, 4926},
/*h(8679)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {8679, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1366_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25026)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25026;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1368_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13703)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13703;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1371_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(29063)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {29063, 4921},
/*h(4587)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4587, 4316},
/*h(5574)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5574, 3979},
/*h(406)=3 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {406, 4923}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1373_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26102)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26102, 3981},
/*h(21921)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21921, 6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1374_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20934)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20934, 4315},
/*h(15766)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {15766, 6338}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1375_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9611)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9611;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1376_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8624)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8624;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1378_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1482)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1482, 3978},
/*h(24971)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24971, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1379_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(495)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 495;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1380_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17829)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17829;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1381_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16842)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16842;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1382_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15855)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15855;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1383_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(9700)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9700, 3981},
/*h(4532)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4532, 4925},
/*h(5519)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5519, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1386_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25060)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25060, 4310},
/*h(20879)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {20879, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1390_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5608)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5608, 3980},
/*h(1427)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1427, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1393_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21955)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21955, 3980},
/*h(20968)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20968, 4316},
/*h(16787)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16787, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1395_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9645)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9645;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1396_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8658)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8658, 4312},
/*h(3490)=1 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3490, 6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1397_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25992)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25992, 6026},
/*h(2503)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2503, 5577}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1398_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1516)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1516, 3977},
/*h(25005)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {25005, 4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1400_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(12695)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {12695, 4921},
/*h(17863)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {17863, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1401_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16876)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16876;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1402_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5553)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5553;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1403_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4566)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4566, 4315},
/*h(385)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {385, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1405_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21900)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21900, 6022},
/*h(26081)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26081, 3983},
/*h(20913)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20913, 4926}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1407_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14758)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1410_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1461)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1461;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1412_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17808)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17808, 6021},
/*h(21989)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {21989, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1413_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16821)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16821;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1414_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10666)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10666;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1415_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8692)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8692, 4310},
/*h(9679)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {9679, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1417_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26026)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26026;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1418_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25039)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1419_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17897)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3978}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17897;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1421_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6574)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1422_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(419)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {419, 4924},
/*h(5587)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5587, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1424_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21934)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6022}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21934;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1425_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20947)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20947;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1427_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13805)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13805;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1428_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7650)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6341}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7650;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1429_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1495)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1495;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1430_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29165)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29165;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1432_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17842)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17842, 6021},
/*h(16855)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {16855, 4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1433_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11687)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1434_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9713)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9713;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1435_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3558)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3558, 6337},
/*h(4545)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4545, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1437_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26060)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26060, 3981},
/*h(25073)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25073, 4312}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1439_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8582)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4920}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8582;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1441_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1440)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1440, 6021},
/*h(5621)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {5621, 3982}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1442_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(453)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 453;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1444_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16800)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16800, 4924},
/*h(21968)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21968, 3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1445_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20981)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20981;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1446_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14826)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5579}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14826;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1447_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4490)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4490, 4926},
/*h(3503)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3503, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1449_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26005)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26005;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1451_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17876)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17876;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1453_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10734)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5575}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1454_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(398)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {398, 4923},
/*h(4579)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4579, 4316}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1456_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26094)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {3981}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26094;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1457_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15758)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6337}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1458_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9603)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6026}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9603;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1459_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8616)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8616;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1461_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1474)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1474, 3978},
/*h(24963)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24963, 4922}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1462_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(487)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {4311}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 487;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1463_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(22002)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {3980}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 22002;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1464_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11666)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11666, 6342},
/*h(16834)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16834, 4314}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1465_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15847)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15847;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1466_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4524)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4524, 4925},
/*h(5511)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {5511, 6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1468_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26039)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1469_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20871)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20871;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1471_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17910)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17910;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1472_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7574)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6338}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1473_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5600)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5600, 3980},
/*h(1419)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1419, 6021}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1474_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(432)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 432;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1476_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20960)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20960, 4316},
/*h(16779)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16779, 4924}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1478_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9637)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {6025}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9637;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1479_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8650)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8650, 4312},
/*h(7663)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7663, 6339}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1480_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(30165)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {30165, 3982},
/*h(25984)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25984, 6026},
/*h(1508)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1508, 3977}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1481_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24997)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24997;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1483_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12687)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {4921}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1484_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16868)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4313}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16868;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1485_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5545)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {6023}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5545;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2_1486_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4558)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4315}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x78_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[1488] = {
/*h(21892)=0 */ {21892, xed3_phash_find_map0x0F_opcode0x78_vv2_0_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8595)=3 */ {8595, xed3_phash_find_map0x0F_opcode0x78_vv2_3_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(466)=5 */ {466, xed3_phash_find_map0x0F_opcode0x78_vv2_5_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17800)=7 */ {17800, xed3_phash_find_map0x0F_opcode0x78_vv2_7_l1},
/*h(15826)=8 */ {15826, xed3_phash_find_map0x0F_opcode0x78_vv2_8_l1},
/*h(10658)=9 */ {10658, xed3_phash_find_map0x0F_opcode0x78_vv2_9_l1},
/*h(8684)=10 */ {8684, xed3_phash_find_map0x0F_opcode0x78_vv2_10_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30199)=12 */ {30199, xed3_phash_find_map0x0F_opcode0x78_vv2_12_l1},
/*h(25031)=13 */ {25031, xed3_phash_find_map0x0F_opcode0x78_vv2_13_l1},
/*h(17889)=14 */ {17889, xed3_phash_find_map0x0F_opcode0x78_vv2_14_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11734)=16 */ {11734, xed3_phash_find_map0x0F_opcode0x78_vv2_16_l1},
/*h(4592)=17 */ {4592, xed3_phash_find_map0x0F_opcode0x78_vv2_17_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21926)=19 */ {21926, xed3_phash_find_map0x0F_opcode0x78_vv2_19_l1},
/*h(20939)=20 */ {20939, xed3_phash_find_map0x0F_opcode0x78_vv2_20_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8629)=22 */ {8629, xed3_phash_find_map0x0F_opcode0x78_vv2_22_l1},
/*h(2474)=23 */ {2474, xed3_phash_find_map0x0F_opcode0x78_vv2_23_l1},
/*h(1487)=24 */ {1487, xed3_phash_find_map0x0F_opcode0x78_vv2_24_l1},
/*h(29157)=25 */ {29157, xed3_phash_find_map0x0F_opcode0x78_vv2_25_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17834)=27 */ {17834, xed3_phash_find_map0x0F_opcode0x78_vv2_27_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5524)=29 */ {5524, xed3_phash_find_map0x0F_opcode0x78_vv2_29_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26052)=31 */ {26052, xed3_phash_find_map0x0F_opcode0x78_vv2_31_l1},
/*h(25065)=32 */ {25065, xed3_phash_find_map0x0F_opcode0x78_vv2_32_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5613)=36 */ {5613, xed3_phash_find_map0x0F_opcode0x78_vv2_36_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21960)=39 */ {21960, xed3_phash_find_map0x0F_opcode0x78_vv2_39_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(14818)=41 */ {14818, xed3_phash_find_map0x0F_opcode0x78_vv2_41_l1},
/*h(8663)=42 */ {8663, xed3_phash_find_map0x0F_opcode0x78_vv2_42_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25010)=44 */ {25010, xed3_phash_find_map0x0F_opcode0x78_vv2_44_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17868)=46 */ {17868, xed3_phash_find_map0x0F_opcode0x78_vv2_46_l1},
/*h(16881)=47 */ {16881, xed3_phash_find_map0x0F_opcode0x78_vv2_47_l1},
/*h(5558)=48 */ {5558, xed3_phash_find_map0x0F_opcode0x78_vv2_48_l1},
/*h(390)=49 */ {390, xed3_phash_find_map0x0F_opcode0x78_vv2_49_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21905)=51 */ {21905, xed3_phash_find_map0x0F_opcode0x78_vv2_51_l1},
/*h(15750)=52 */ {15750, xed3_phash_find_map0x0F_opcode0x78_vv2_52_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8608)=54 */ {8608, xed3_phash_find_map0x0F_opcode0x78_vv2_54_l1},
/*h(6634)=55 */ {6634, xed3_phash_find_map0x0F_opcode0x78_vv2_55_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21994)=58 */ {21994, xed3_phash_find_map0x0F_opcode0x78_vv2_58_l1},
/*h(11658)=59 */ {11658, xed3_phash_find_map0x0F_opcode0x78_vv2_59_l1},
/*h(10671)=60 */ {10671, xed3_phash_find_map0x0F_opcode0x78_vv2_60_l1},
/*h(4516)=61 */ {4516, xed3_phash_find_map0x0F_opcode0x78_vv2_61_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26031)=63 */ {26031, xed3_phash_find_map0x0F_opcode0x78_vv2_63_l1},
/*h(25044)=64 */ {25044, xed3_phash_find_map0x0F_opcode0x78_vv2_64_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17902)=66 */ {17902, xed3_phash_find_map0x0F_opcode0x78_vv2_66_l1},
/*h(7566)=67 */ {7566, xed3_phash_find_map0x0F_opcode0x78_vv2_67_l1},
/*h(1411)=68 */ {1411, xed3_phash_find_map0x0F_opcode0x78_vv2_68_l1},
/*h(424)=69 */ {424, xed3_phash_find_map0x0F_opcode0x78_vv2_69_l1},
/*h(21939)=70 */ {21939, xed3_phash_find_map0x0F_opcode0x78_vv2_70_l1},
/*h(16771)=71 */ {16771, xed3_phash_find_map0x0F_opcode0x78_vv2_71_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8642)=73 */ {8642, xed3_phash_find_map0x0F_opcode0x78_vv2_73_l1},
/*h(7655)=74 */ {7655, xed3_phash_find_map0x0F_opcode0x78_vv2_74_l1},
/*h(30157)=75 */ {30157, xed3_phash_find_map0x0F_opcode0x78_vv2_75_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12679)=78 */ {12679, xed3_phash_find_map0x0F_opcode0x78_vv2_78_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5537)=80 */ {5537, xed3_phash_find_map0x0F_opcode0x78_vv2_80_l1},
/*h(4550)=81 */ {4550, xed3_phash_find_map0x0F_opcode0x78_vv2_81_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25078)=83 */ {25078, xed3_phash_find_map0x0F_opcode0x78_vv2_83_l1},
/*h(14742)=84 */ {14742, xed3_phash_find_map0x0F_opcode0x78_vv2_84_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8587)=86 */ {8587, xed3_phash_find_map0x0F_opcode0x78_vv2_86_l1},
/*h(1445)=87 */ {1445, xed3_phash_find_map0x0F_opcode0x78_vv2_87_l1},
/*h(458)=88 */ {458, xed3_phash_find_map0x0F_opcode0x78_vv2_88_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21973)=90 */ {21973, xed3_phash_find_map0x0F_opcode0x78_vv2_90_l1},
/*h(15818)=91 */ {15818, xed3_phash_find_map0x0F_opcode0x78_vv2_91_l1},
/*h(14831)=92 */ {14831, xed3_phash_find_map0x0F_opcode0x78_vv2_92_l1},
/*h(4495)=93 */ {4495, xed3_phash_find_map0x0F_opcode0x78_vv2_93_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30191)=95 */ {30191, xed3_phash_find_map0x0F_opcode0x78_vv2_95_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11726)=99 */ {11726, xed3_phash_find_map0x0F_opcode0x78_vv2_99_l1},
/*h(5571)=100 */ {5571, xed3_phash_find_map0x0F_opcode0x78_vv2_100_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26099)=102 */ {26099, xed3_phash_find_map0x0F_opcode0x78_vv2_102_l1},
/*h(20931)=103 */ {20931, xed3_phash_find_map0x0F_opcode0x78_vv2_103_l1},
/*h(9608)=104 */ {9608, xed3_phash_find_map0x0F_opcode0x78_vv2_104_l1},
/*h(8621)=105 */ {8621, xed3_phash_find_map0x0F_opcode0x78_vv2_105_l1},
/*h(7634)=106 */ {7634, xed3_phash_find_map0x0F_opcode0x78_vv2_106_l1},
/*h(1479)=107 */ {1479, xed3_phash_find_map0x0F_opcode0x78_vv2_107_l1},
/*h(24968)=108 */ {24968, xed3_phash_find_map0x0F_opcode0x78_vv2_108_l1},
/*h(17826)=109 */ {17826, xed3_phash_find_map0x0F_opcode0x78_vv2_109_l1},
/*h(16839)=110 */ {16839, xed3_phash_find_map0x0F_opcode0x78_vv2_110_l1},
/*h(11671)=111 */ {11671, xed3_phash_find_map0x0F_opcode0x78_vv2_111_l1},
/*h(9697)=112 */ {9697, xed3_phash_find_map0x0F_opcode0x78_vv2_112_l1},
/*h(3542)=113 */ {3542, xed3_phash_find_map0x0F_opcode0x78_vv2_113_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25057)=115 */ {25057, xed3_phash_find_map0x0F_opcode0x78_vv2_115_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5605)=119 */ {5605, xed3_phash_find_map0x0F_opcode0x78_vv2_119_l1},
/*h(437)=120 */ {437, xed3_phash_find_map0x0F_opcode0x78_vv2_120_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21952)=122 */ {21952, xed3_phash_find_map0x0F_opcode0x78_vv2_122_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9642)=124 */ {9642, xed3_phash_find_map0x0F_opcode0x78_vv2_124_l1},
/*h(8655)=125 */ {8655, xed3_phash_find_map0x0F_opcode0x78_vv2_125_l1},
/*h(25989)=126 */ {25989, xed3_phash_find_map0x0F_opcode0x78_vv2_126_l1},
/*h(1513)=127 */ {1513, xed3_phash_find_map0x0F_opcode0x78_vv2_127_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17860)=129 */ {17860, xed3_phash_find_map0x0F_opcode0x78_vv2_129_l1},
/*h(16873)=130 */ {16873, xed3_phash_find_map0x0F_opcode0x78_vv2_130_l1},
/*h(5550)=131 */ {5550, xed3_phash_find_map0x0F_opcode0x78_vv2_131_l1},
/*h(4563)=132 */ {4563, xed3_phash_find_map0x0F_opcode0x78_vv2_132_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21897)=134 */ {21897, xed3_phash_find_map0x0F_opcode0x78_vv2_134_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12781)=137 */ {12781, xed3_phash_find_map0x0F_opcode0x78_vv2_137_l1},
/*h(6626)=138 */ {6626, xed3_phash_find_map0x0F_opcode0x78_vv2_138_l1},
/*h(471)=139 */ {471, xed3_phash_find_map0x0F_opcode0x78_vv2_139_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21986)=141 */ {21986, xed3_phash_find_map0x0F_opcode0x78_vv2_141_l1},
/*h(11650)=142 */ {11650, xed3_phash_find_map0x0F_opcode0x78_vv2_142_l1},
/*h(10663)=143 */ {10663, xed3_phash_find_map0x0F_opcode0x78_vv2_143_l1},
/*h(9676)=144 */ {9676, xed3_phash_find_map0x0F_opcode0x78_vv2_144_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2534)=146 */ {2534, xed3_phash_find_map0x0F_opcode0x78_vv2_146_l1},
/*h(25036)=147 */ {25036, xed3_phash_find_map0x0F_opcode0x78_vv2_147_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17894)=149 */ {17894, xed3_phash_find_map0x0F_opcode0x78_vv2_149_l1},
/*h(7558)=150 */ {7558, xed3_phash_find_map0x0F_opcode0x78_vv2_150_l1},
/*h(5584)=151 */ {5584, xed3_phash_find_map0x0F_opcode0x78_vv2_151_l1},
/*h(4597)=152 */ {4597, xed3_phash_find_map0x0F_opcode0x78_vv2_152_l1},
/*h(21931)=153 */ {21931, xed3_phash_find_map0x0F_opcode0x78_vv2_153_l1},
/*h(20944)=154 */ {20944, xed3_phash_find_map0x0F_opcode0x78_vv2_154_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9621)=156 */ {9621, xed3_phash_find_map0x0F_opcode0x78_vv2_156_l1},
/*h(3466)=157 */ {3466, xed3_phash_find_map0x0F_opcode0x78_vv2_157_l1},
/*h(30149)=158 */ {30149, xed3_phash_find_map0x0F_opcode0x78_vv2_158_l1},
/*h(24981)=159 */ {24981, xed3_phash_find_map0x0F_opcode0x78_vv2_159_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17839)=161 */ {17839, xed3_phash_find_map0x0F_opcode0x78_vv2_161_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9710)=163 */ {9710, xed3_phash_find_map0x0F_opcode0x78_vv2_163_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25070)=166 */ {25070, xed3_phash_find_map0x0F_opcode0x78_vv2_166_l1},
/*h(14734)=167 */ {14734, xed3_phash_find_map0x0F_opcode0x78_vv2_167_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8579)=169 */ {8579, xed3_phash_find_map0x0F_opcode0x78_vv2_169_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5618)=171 */ {5618, xed3_phash_find_map0x0F_opcode0x78_vv2_171_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21965)=173 */ {21965, xed3_phash_find_map0x0F_opcode0x78_vv2_173_l1},
/*h(15810)=174 */ {15810, xed3_phash_find_map0x0F_opcode0x78_vv2_174_l1},
/*h(14823)=175 */ {14823, xed3_phash_find_map0x0F_opcode0x78_vv2_175_l1},
/*h(4487)=176 */ {4487, xed3_phash_find_map0x0F_opcode0x78_vv2_176_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25015)=178 */ {25015, xed3_phash_find_map0x0F_opcode0x78_vv2_178_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17873)=180 */ {17873, xed3_phash_find_map0x0F_opcode0x78_vv2_180_l1},
/*h(16886)=181 */ {16886, xed3_phash_find_map0x0F_opcode0x78_vv2_181_l1},
/*h(6550)=182 */ {6550, xed3_phash_find_map0x0F_opcode0x78_vv2_182_l1},
/*h(4576)=183 */ {4576, xed3_phash_find_map0x0F_opcode0x78_vv2_183_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21910)=185 */ {21910, xed3_phash_find_map0x0F_opcode0x78_vv2_185_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9600)=187 */ {9600, xed3_phash_find_map0x0F_opcode0x78_vv2_187_l1},
/*h(13781)=188 */ {13781, xed3_phash_find_map0x0F_opcode0x78_vv2_188_l1},
/*h(7626)=189 */ {7626, xed3_phash_find_map0x0F_opcode0x78_vv2_189_l1},
/*h(24960)=190 */ {24960, xed3_phash_find_map0x0F_opcode0x78_vv2_190_l1},
/*h(29141)=191 */ {29141, xed3_phash_find_map0x0F_opcode0x78_vv2_191_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21999)=193 */ {21999, xed3_phash_find_map0x0F_opcode0x78_vv2_193_l1},
/*h(11663)=194 */ {11663, xed3_phash_find_map0x0F_opcode0x78_vv2_194_l1},
/*h(4521)=195 */ {4521, xed3_phash_find_map0x0F_opcode0x78_vv2_195_l1},
/*h(3534)=196 */ {3534, xed3_phash_find_map0x0F_opcode0x78_vv2_196_l1},
/*h(26036)=197 */ {26036, xed3_phash_find_map0x0F_opcode0x78_vv2_197_l1},
/*h(20868)=198 */ {20868, xed3_phash_find_map0x0F_opcode0x78_vv2_198_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17907)=200 */ {17907, xed3_phash_find_map0x0F_opcode0x78_vv2_200_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1416)=202 */ {1416, xed3_phash_find_map0x0F_opcode0x78_vv2_202_l1},
/*h(429)=203 */ {429, xed3_phash_find_map0x0F_opcode0x78_vv2_203_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16776)=205 */ {16776, xed3_phash_find_map0x0F_opcode0x78_vv2_205_l1},
/*h(14802)=206 */ {14802, xed3_phash_find_map0x0F_opcode0x78_vv2_206_l1},
/*h(13815)=207 */ {13815, xed3_phash_find_map0x0F_opcode0x78_vv2_207_l1},
/*h(8647)=208 */ {8647, xed3_phash_find_map0x0F_opcode0x78_vv2_208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29175)=210 */ {29175, xed3_phash_find_map0x0F_opcode0x78_vv2_210_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16865)=213 */ {16865, xed3_phash_find_map0x0F_opcode0x78_vv2_213_l1},
/*h(5542)=214 */ {5542, xed3_phash_find_map0x0F_opcode0x78_vv2_214_l1},
/*h(4555)=215 */ {4555, xed3_phash_find_map0x0F_opcode0x78_vv2_215_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21889)=217 */ {21889, xed3_phash_find_map0x0F_opcode0x78_vv2_217_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12773)=220 */ {12773, xed3_phash_find_map0x0F_opcode0x78_vv2_220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(463)=222 */ {463, xed3_phash_find_map0x0F_opcode0x78_vv2_222_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17797)=224 */ {17797, xed3_phash_find_map0x0F_opcode0x78_vv2_224_l1},
/*h(15823)=225 */ {15823, xed3_phash_find_map0x0F_opcode0x78_vv2_225_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8681)=227 */ {8681, xed3_phash_find_map0x0F_opcode0x78_vv2_227_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25028)=230 */ {25028, xed3_phash_find_map0x0F_opcode0x78_vv2_230_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5576)=234 */ {5576, xed3_phash_find_map0x0F_opcode0x78_vv2_234_l1},
/*h(4589)=235 */ {4589, xed3_phash_find_map0x0F_opcode0x78_vv2_235_l1},
/*h(21923)=236 */ {21923, xed3_phash_find_map0x0F_opcode0x78_vv2_236_l1},
/*h(20936)=237 */ {20936, xed3_phash_find_map0x0F_opcode0x78_vv2_237_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9613)=239 */ {9613, xed3_phash_find_map0x0F_opcode0x78_vv2_239_l1},
/*h(7639)=240 */ {7639, xed3_phash_find_map0x0F_opcode0x78_vv2_240_l1},
/*h(2471)=241 */ {2471, xed3_phash_find_map0x0F_opcode0x78_vv2_241_l1},
/*h(497)=242 */ {497, xed3_phash_find_map0x0F_opcode0x78_vv2_242_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17831)=244 */ {17831, xed3_phash_find_map0x0F_opcode0x78_vv2_244_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5521)=246 */ {5521, xed3_phash_find_map0x0F_opcode0x78_vv2_246_l1},
/*h(4534)=247 */ {4534, xed3_phash_find_map0x0F_opcode0x78_vv2_247_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20881)=249 */ {20881, xed3_phash_find_map0x0F_opcode0x78_vv2_249_l1},
/*h(14726)=250 */ {14726, xed3_phash_find_map0x0F_opcode0x78_vv2_250_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5610)=253 */ {5610, xed3_phash_find_map0x0F_opcode0x78_vv2_253_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21957)=256 */ {21957, xed3_phash_find_map0x0F_opcode0x78_vv2_256_l1},
/*h(20970)=257 */ {20970, xed3_phash_find_map0x0F_opcode0x78_vv2_257_l1},
/*h(10634)=258 */ {10634, xed3_phash_find_map0x0F_opcode0x78_vv2_258_l1},
/*h(8660)=259 */ {8660, xed3_phash_find_map0x0F_opcode0x78_vv2_259_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25007)=261 */ {25007, xed3_phash_find_map0x0F_opcode0x78_vv2_261_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17865)=263 */ {17865, xed3_phash_find_map0x0F_opcode0x78_vv2_263_l1},
/*h(16878)=264 */ {16878, xed3_phash_find_map0x0F_opcode0x78_vv2_264_l1},
/*h(6542)=265 */ {6542, xed3_phash_find_map0x0F_opcode0x78_vv2_265_l1},
/*h(5555)=266 */ {5555, xed3_phash_find_map0x0F_opcode0x78_vv2_266_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21902)=268 */ {21902, xed3_phash_find_map0x0F_opcode0x78_vv2_268_l1},
/*h(20915)=269 */ {20915, xed3_phash_find_map0x0F_opcode0x78_vv2_269_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13773)=271 */ {13773, xed3_phash_find_map0x0F_opcode0x78_vv2_271_l1},
/*h(7618)=272 */ {7618, xed3_phash_find_map0x0F_opcode0x78_vv2_272_l1},
/*h(1463)=273 */ {1463, xed3_phash_find_map0x0F_opcode0x78_vv2_273_l1},
/*h(29133)=274 */ {29133, xed3_phash_find_map0x0F_opcode0x78_vv2_274_l1},
/*h(21991)=275 */ {21991, xed3_phash_find_map0x0F_opcode0x78_vv2_275_l1},
/*h(11655)=276 */ {11655, xed3_phash_find_map0x0F_opcode0x78_vv2_276_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4513)=278 */ {4513, xed3_phash_find_map0x0F_opcode0x78_vv2_278_l1},
/*h(3526)=279 */ {3526, xed3_phash_find_map0x0F_opcode0x78_vv2_279_l1},
/*h(26028)=280 */ {26028, xed3_phash_find_map0x0F_opcode0x78_vv2_280_l1},
/*h(25041)=281 */ {25041, xed3_phash_find_map0x0F_opcode0x78_vv2_281_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17899)=283 */ {17899, xed3_phash_find_map0x0F_opcode0x78_vv2_283_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5589)=285 */ {5589, xed3_phash_find_map0x0F_opcode0x78_vv2_285_l1},
/*h(421)=286 */ {421, xed3_phash_find_map0x0F_opcode0x78_vv2_286_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20949)=288 */ {20949, xed3_phash_find_map0x0F_opcode0x78_vv2_288_l1},
/*h(14794)=289 */ {14794, xed3_phash_find_map0x0F_opcode0x78_vv2_289_l1},
/*h(13807)=290 */ {13807, xed3_phash_find_map0x0F_opcode0x78_vv2_290_l1},
/*h(3471)=291 */ {3471, xed3_phash_find_map0x0F_opcode0x78_vv2_291_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29167)=293 */ {29167, xed3_phash_find_map0x0F_opcode0x78_vv2_293_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17844)=295 */ {17844, xed3_phash_find_map0x0F_opcode0x78_vv2_295_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10702)=297 */ {10702, xed3_phash_find_map0x0F_opcode0x78_vv2_297_l1},
/*h(4547)=298 */ {4547, xed3_phash_find_map0x0F_opcode0x78_vv2_298_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25075)=300 */ {25075, xed3_phash_find_map0x0F_opcode0x78_vv2_300_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8584)=303 */ {8584, xed3_phash_find_map0x0F_opcode0x78_vv2_303_l1},
/*h(6610)=304 */ {6610, xed3_phash_find_map0x0F_opcode0x78_vv2_304_l1},
/*h(455)=305 */ {455, xed3_phash_find_map0x0F_opcode0x78_vv2_305_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21970)=307 */ {21970, xed3_phash_find_map0x0F_opcode0x78_vv2_307_l1},
/*h(15815)=308 */ {15815, xed3_phash_find_map0x0F_opcode0x78_vv2_308_l1},
/*h(10647)=309 */ {10647, xed3_phash_find_map0x0F_opcode0x78_vv2_309_l1},
/*h(8673)=310 */ {8673, xed3_phash_find_map0x0F_opcode0x78_vv2_310_l1},
/*h(2518)=311 */ {2518, xed3_phash_find_map0x0F_opcode0x78_vv2_311_l1},
/*h(26007)=312 */ {26007, xed3_phash_find_map0x0F_opcode0x78_vv2_312_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17878)=314 */ {17878, xed3_phash_find_map0x0F_opcode0x78_vv2_314_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5568)=317 */ {5568, xed3_phash_find_map0x0F_opcode0x78_vv2_317_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26096)=319 */ {26096, xed3_phash_find_map0x0F_opcode0x78_vv2_319_l1},
/*h(20928)=320 */ {20928, xed3_phash_find_map0x0F_opcode0x78_vv2_320_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8618)=322 */ {8618, xed3_phash_find_map0x0F_opcode0x78_vv2_322_l1},
/*h(7631)=323 */ {7631, xed3_phash_find_map0x0F_opcode0x78_vv2_323_l1},
/*h(30133)=324 */ {30133, xed3_phash_find_map0x0F_opcode0x78_vv2_324_l1},
/*h(489)=325 */ {489, xed3_phash_find_map0x0F_opcode0x78_vv2_325_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16836)=327 */ {16836, xed3_phash_find_map0x0F_opcode0x78_vv2_327_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5513)=329 */ {5513, xed3_phash_find_map0x0F_opcode0x78_vv2_329_l1},
/*h(4526)=330 */ {4526, xed3_phash_find_map0x0F_opcode0x78_vv2_330_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20873)=332 */ {20873, xed3_phash_find_map0x0F_opcode0x78_vv2_332_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5602)=336 */ {5602, xed3_phash_find_map0x0F_opcode0x78_vv2_336_l1},
/*h(434)=337 */ {434, xed3_phash_find_map0x0F_opcode0x78_vv2_337_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20962)=339 */ {20962, xed3_phash_find_map0x0F_opcode0x78_vv2_339_l1},
/*h(10626)=340 */ {10626, xed3_phash_find_map0x0F_opcode0x78_vv2_340_l1},
/*h(14807)=341 */ {14807, xed3_phash_find_map0x0F_opcode0x78_vv2_341_l1},
/*h(8652)=342 */ {8652, xed3_phash_find_map0x0F_opcode0x78_vv2_342_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24999)=344 */ {24999, xed3_phash_find_map0x0F_opcode0x78_vv2_344_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17857)=346 */ {17857, xed3_phash_find_map0x0F_opcode0x78_vv2_346_l1},
/*h(16870)=347 */ {16870, xed3_phash_find_map0x0F_opcode0x78_vv2_347_l1},
/*h(6534)=348 */ {6534, xed3_phash_find_map0x0F_opcode0x78_vv2_348_l1},
/*h(4560)=349 */ {4560, xed3_phash_find_map0x0F_opcode0x78_vv2_349_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21894)=351 */ {21894, xed3_phash_find_map0x0F_opcode0x78_vv2_351_l1},
/*h(20907)=352 */ {20907, xed3_phash_find_map0x0F_opcode0x78_vv2_352_l1},
/*h(13765)=353 */ {13765, xed3_phash_find_map0x0F_opcode0x78_vv2_353_l1},
/*h(8597)=354 */ {8597, xed3_phash_find_map0x0F_opcode0x78_vv2_354_l1},
/*h(2442)=355 */ {2442, xed3_phash_find_map0x0F_opcode0x78_vv2_355_l1},
/*h(468)=356 */ {468, xed3_phash_find_map0x0F_opcode0x78_vv2_356_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17802)=358 */ {17802, xed3_phash_find_map0x0F_opcode0x78_vv2_358_l1},
/*h(16815)=359 */ {16815, xed3_phash_find_map0x0F_opcode0x78_vv2_359_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8686)=361 */ {8686, xed3_phash_find_map0x0F_opcode0x78_vv2_361_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26020)=363 */ {26020, xed3_phash_find_map0x0F_opcode0x78_vv2_363_l1},
/*h(25033)=364 */ {25033, xed3_phash_find_map0x0F_opcode0x78_vv2_364_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17891)=366 */ {17891, xed3_phash_find_map0x0F_opcode0x78_vv2_366_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5581)=368 */ {5581, xed3_phash_find_map0x0F_opcode0x78_vv2_368_l1},
/*h(4594)=369 */ {4594, xed3_phash_find_map0x0F_opcode0x78_vv2_369_l1},
/*h(21928)=370 */ {21928, xed3_phash_find_map0x0F_opcode0x78_vv2_370_l1},
/*h(20941)=371 */ {20941, xed3_phash_find_map0x0F_opcode0x78_vv2_371_l1},
/*h(14786)=372 */ {14786, xed3_phash_find_map0x0F_opcode0x78_vv2_372_l1},
/*h(13799)=373 */ {13799, xed3_phash_find_map0x0F_opcode0x78_vv2_373_l1},
/*h(8631)=374 */ {8631, xed3_phash_find_map0x0F_opcode0x78_vv2_374_l1},
/*h(1489)=375 */ {1489, xed3_phash_find_map0x0F_opcode0x78_vv2_375_l1},
/*h(29159)=376 */ {29159, xed3_phash_find_map0x0F_opcode0x78_vv2_376_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16849)=378 */ {16849, xed3_phash_find_map0x0F_opcode0x78_vv2_378_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9707)=380 */ {9707, xed3_phash_find_map0x0F_opcode0x78_vv2_380_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25067)=383 */ {25067, xed3_phash_find_map0x0F_opcode0x78_vv2_383_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12757)=386 */ {12757, xed3_phash_find_map0x0F_opcode0x78_vv2_386_l1},
/*h(6602)=387 */ {6602, xed3_phash_find_map0x0F_opcode0x78_vv2_387_l1},
/*h(5615)=388 */ {5615, xed3_phash_find_map0x0F_opcode0x78_vv2_388_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21962)=390 */ {21962, xed3_phash_find_map0x0F_opcode0x78_vv2_390_l1},
/*h(20975)=391 */ {20975, xed3_phash_find_map0x0F_opcode0x78_vv2_391_l1},
/*h(9652)=392 */ {9652, xed3_phash_find_map0x0F_opcode0x78_vv2_392_l1},
/*h(4484)=393 */ {4484, xed3_phash_find_map0x0F_opcode0x78_vv2_393_l1},
/*h(2510)=394 */ {2510, xed3_phash_find_map0x0F_opcode0x78_vv2_394_l1},
/*h(25012)=395 */ {25012, xed3_phash_find_map0x0F_opcode0x78_vv2_395_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17870)=397 */ {17870, xed3_phash_find_map0x0F_opcode0x78_vv2_397_l1},
/*h(16883)=398 */ {16883, xed3_phash_find_map0x0F_opcode0x78_vv2_398_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(392)=400 */ {392, xed3_phash_find_map0x0F_opcode0x78_vv2_400_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21907)=402 */ {21907, xed3_phash_find_map0x0F_opcode0x78_vv2_402_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12791)=405 */ {12791, xed3_phash_find_map0x0F_opcode0x78_vv2_405_l1},
/*h(7623)=406 */ {7623, xed3_phash_find_map0x0F_opcode0x78_vv2_406_l1},
/*h(30125)=407 */ {30125, xed3_phash_find_map0x0F_opcode0x78_vv2_407_l1},
/*h(481)=408 */ {481, xed3_phash_find_map0x0F_opcode0x78_vv2_408_l1},
/*h(17815)=409 */ {17815, xed3_phash_find_map0x0F_opcode0x78_vv2_409_l1},
/*h(21996)=410 */ {21996, xed3_phash_find_map0x0F_opcode0x78_vv2_410_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5505)=412 */ {5505, xed3_phash_find_map0x0F_opcode0x78_vv2_412_l1},
/*h(4518)=413 */ {4518, xed3_phash_find_map0x0F_opcode0x78_vv2_413_l1},
/*h(26033)=414 */ {26033, xed3_phash_find_map0x0F_opcode0x78_vv2_414_l1},
/*h(20865)=415 */ {20865, xed3_phash_find_map0x0F_opcode0x78_vv2_415_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17904)=417 */ {17904, xed3_phash_find_map0x0F_opcode0x78_vv2_417_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1413)=419 */ {1413, xed3_phash_find_map0x0F_opcode0x78_vv2_419_l1},
/*h(426)=420 */ {426, xed3_phash_find_map0x0F_opcode0x78_vv2_420_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16773)=422 */ {16773, xed3_phash_find_map0x0F_opcode0x78_vv2_422_l1},
/*h(15786)=423 */ {15786, xed3_phash_find_map0x0F_opcode0x78_vv2_423_l1},
/*h(14799)=424 */ {14799, xed3_phash_find_map0x0F_opcode0x78_vv2_424_l1},
/*h(8644)=425 */ {8644, xed3_phash_find_map0x0F_opcode0x78_vv2_425_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30159)=427 */ {30159, xed3_phash_find_map0x0F_opcode0x78_vv2_427_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11694)=430 */ {11694, xed3_phash_find_map0x0F_opcode0x78_vv2_430_l1},
/*h(5539)=431 */ {5539, xed3_phash_find_map0x0F_opcode0x78_vv2_431_l1},
/*h(4552)=432 */ {4552, xed3_phash_find_map0x0F_opcode0x78_vv2_432_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20899)=434 */ {20899, xed3_phash_find_map0x0F_opcode0x78_vv2_434_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8589)=437 */ {8589, xed3_phash_find_map0x0F_opcode0x78_vv2_437_l1},
/*h(6615)=438 */ {6615, xed3_phash_find_map0x0F_opcode0x78_vv2_438_l1},
/*h(460)=439 */ {460, xed3_phash_find_map0x0F_opcode0x78_vv2_439_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21975)=441 */ {21975, xed3_phash_find_map0x0F_opcode0x78_vv2_441_l1},
/*h(16807)=442 */ {16807, xed3_phash_find_map0x0F_opcode0x78_vv2_442_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8678)=444 */ {8678, xed3_phash_find_map0x0F_opcode0x78_vv2_444_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25025)=447 */ {25025, xed3_phash_find_map0x0F_opcode0x78_vv2_447_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5573)=451 */ {5573, xed3_phash_find_map0x0F_opcode0x78_vv2_451_l1},
/*h(4586)=452 */ {4586, xed3_phash_find_map0x0F_opcode0x78_vv2_452_l1},
/*h(21920)=453 */ {21920, xed3_phash_find_map0x0F_opcode0x78_vv2_453_l1},
/*h(20933)=454 */ {20933, xed3_phash_find_map0x0F_opcode0x78_vv2_454_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8623)=456 */ {8623, xed3_phash_find_map0x0F_opcode0x78_vv2_456_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1481)=458 */ {1481, xed3_phash_find_map0x0F_opcode0x78_vv2_458_l1},
/*h(24970)=459 */ {24970, xed3_phash_find_map0x0F_opcode0x78_vv2_459_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17828)=461 */ {17828, xed3_phash_find_map0x0F_opcode0x78_vv2_461_l1},
/*h(15854)=462 */ {15854, xed3_phash_find_map0x0F_opcode0x78_vv2_462_l1},
/*h(5518)=463 */ {5518, xed3_phash_find_map0x0F_opcode0x78_vv2_463_l1},
/*h(4531)=464 */ {4531, xed3_phash_find_map0x0F_opcode0x78_vv2_464_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25059)=466 */ {25059, xed3_phash_find_map0x0F_opcode0x78_vv2_466_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12749)=469 */ {12749, xed3_phash_find_map0x0F_opcode0x78_vv2_469_l1},
/*h(6594)=470 */ {6594, xed3_phash_find_map0x0F_opcode0x78_vv2_470_l1},
/*h(5607)=471 */ {5607, xed3_phash_find_map0x0F_opcode0x78_vv2_471_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21954)=473 */ {21954, xed3_phash_find_map0x0F_opcode0x78_vv2_473_l1},
/*h(20967)=474 */ {20967, xed3_phash_find_map0x0F_opcode0x78_vv2_474_l1},
/*h(10631)=475 */ {10631, xed3_phash_find_map0x0F_opcode0x78_vv2_475_l1},
/*h(8657)=476 */ {8657, xed3_phash_find_map0x0F_opcode0x78_vv2_476_l1},
/*h(2502)=477 */ {2502, xed3_phash_find_map0x0F_opcode0x78_vv2_477_l1},
/*h(25004)=478 */ {25004, xed3_phash_find_map0x0F_opcode0x78_vv2_478_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17862)=480 */ {17862, xed3_phash_find_map0x0F_opcode0x78_vv2_480_l1},
/*h(16875)=481 */ {16875, xed3_phash_find_map0x0F_opcode0x78_vv2_481_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4565)=483 */ {4565, xed3_phash_find_map0x0F_opcode0x78_vv2_483_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26080)=485 */ {26080, xed3_phash_find_map0x0F_opcode0x78_vv2_485_l1},
/*h(20912)=486 */ {20912, xed3_phash_find_map0x0F_opcode0x78_vv2_486_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12783)=488 */ {12783, xed3_phash_find_map0x0F_opcode0x78_vv2_488_l1},
/*h(2447)=489 */ {2447, xed3_phash_find_map0x0F_opcode0x78_vv2_489_l1},
/*h(30117)=490 */ {30117, xed3_phash_find_map0x0F_opcode0x78_vv2_490_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17807)=492 */ {17807, xed3_phash_find_map0x0F_opcode0x78_vv2_492_l1},
/*h(16820)=493 */ {16820, xed3_phash_find_map0x0F_opcode0x78_vv2_493_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9678)=495 */ {9678, xed3_phash_find_map0x0F_opcode0x78_vv2_495_l1},
/*h(8691)=496 */ {8691, xed3_phash_find_map0x0F_opcode0x78_vv2_496_l1},
/*h(26025)=497 */ {26025, xed3_phash_find_map0x0F_opcode0x78_vv2_497_l1},
/*h(25038)=498 */ {25038, xed3_phash_find_map0x0F_opcode0x78_vv2_498_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17896)=500 */ {17896, xed3_phash_find_map0x0F_opcode0x78_vv2_500_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5586)=502 */ {5586, xed3_phash_find_map0x0F_opcode0x78_vv2_502_l1},
/*h(4599)=503 */ {4599, xed3_phash_find_map0x0F_opcode0x78_vv2_503_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20946)=505 */ {20946, xed3_phash_find_map0x0F_opcode0x78_vv2_505_l1},
/*h(15778)=506 */ {15778, xed3_phash_find_map0x0F_opcode0x78_vv2_506_l1},
/*h(14791)=507 */ {14791, xed3_phash_find_map0x0F_opcode0x78_vv2_507_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24983)=510 */ {24983, xed3_phash_find_map0x0F_opcode0x78_vv2_510_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17841)=512 */ {17841, xed3_phash_find_map0x0F_opcode0x78_vv2_512_l1},
/*h(11686)=513 */ {11686, xed3_phash_find_map0x0F_opcode0x78_vv2_513_l1},
/*h(9712)=514 */ {9712, xed3_phash_find_map0x0F_opcode0x78_vv2_514_l1},
/*h(4544)=515 */ {4544, xed3_phash_find_map0x0F_opcode0x78_vv2_515_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26059)=517 */ {26059, xed3_phash_find_map0x0F_opcode0x78_vv2_517_l1},
/*h(25072)=518 */ {25072, xed3_phash_find_map0x0F_opcode0x78_vv2_518_l1},
/*h(13749)=519 */ {13749, xed3_phash_find_map0x0F_opcode0x78_vv2_519_l1},
/*h(7594)=520 */ {7594, xed3_phash_find_map0x0F_opcode0x78_vv2_520_l1},
/*h(6607)=521 */ {6607, xed3_phash_find_map0x0F_opcode0x78_vv2_521_l1},
/*h(29109)=522 */ {29109, xed3_phash_find_map0x0F_opcode0x78_vv2_522_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21967)=524 */ {21967, xed3_phash_find_map0x0F_opcode0x78_vv2_524_l1},
/*h(20980)=525 */ {20980, xed3_phash_find_map0x0F_opcode0x78_vv2_525_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4489)=527 */ {4489, xed3_phash_find_map0x0F_opcode0x78_vv2_527_l1},
/*h(3502)=528 */ {3502, xed3_phash_find_map0x0F_opcode0x78_vv2_528_l1},
/*h(26004)=529 */ {26004, xed3_phash_find_map0x0F_opcode0x78_vv2_529_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17875)=532 */ {17875, xed3_phash_find_map0x0F_opcode0x78_vv2_532_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(397)=534 */ {397, xed3_phash_find_map0x0F_opcode0x78_vv2_534_l1},
/*h(4578)=535 */ {4578, xed3_phash_find_map0x0F_opcode0x78_vv2_535_l1},
/*h(26093)=536 */ {26093, xed3_phash_find_map0x0F_opcode0x78_vv2_536_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8615)=539 */ {8615, xed3_phash_find_map0x0F_opcode0x78_vv2_539_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1473)=541 */ {1473, xed3_phash_find_map0x0F_opcode0x78_vv2_541_l1},
/*h(29143)=542 */ {29143, xed3_phash_find_map0x0F_opcode0x78_vv2_542_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(22001)=544 */ {22001, xed3_phash_find_map0x0F_opcode0x78_vv2_544_l1},
/*h(15846)=545 */ {15846, xed3_phash_find_map0x0F_opcode0x78_vv2_545_l1},
/*h(5510)=546 */ {5510, xed3_phash_find_map0x0F_opcode0x78_vv2_546_l1},
/*h(4523)=547 */ {4523, xed3_phash_find_map0x0F_opcode0x78_vv2_547_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20870)=549 */ {20870, xed3_phash_find_map0x0F_opcode0x78_vv2_549_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17909)=551 */ {17909, xed3_phash_find_map0x0F_opcode0x78_vv2_551_l1},
/*h(12741)=552 */ {12741, xed3_phash_find_map0x0F_opcode0x78_vv2_552_l1},
/*h(1418)=553 */ {1418, xed3_phash_find_map0x0F_opcode0x78_vv2_553_l1},
/*h(431)=554 */ {431, xed3_phash_find_map0x0F_opcode0x78_vv2_554_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16778)=556 */ {16778, xed3_phash_find_map0x0F_opcode0x78_vv2_556_l1},
/*h(15791)=557 */ {15791, xed3_phash_find_map0x0F_opcode0x78_vv2_557_l1},
/*h(9636)=558 */ {9636, xed3_phash_find_map0x0F_opcode0x78_vv2_558_l1},
/*h(8649)=559 */ {8649, xed3_phash_find_map0x0F_opcode0x78_vv2_559_l1},
/*h(7662)=560 */ {7662, xed3_phash_find_map0x0F_opcode0x78_vv2_560_l1},
/*h(24996)=561 */ {24996, xed3_phash_find_map0x0F_opcode0x78_vv2_561_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16867)=564 */ {16867, xed3_phash_find_map0x0F_opcode0x78_vv2_564_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4557)=566 */ {4557, xed3_phash_find_map0x0F_opcode0x78_vv2_566_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21891)=568 */ {21891, xed3_phash_find_map0x0F_opcode0x78_vv2_568_l1},
/*h(20904)=569 */ {20904, xed3_phash_find_map0x0F_opcode0x78_vv2_569_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12775)=571 */ {12775, xed3_phash_find_map0x0F_opcode0x78_vv2_571_l1},
/*h(2439)=572 */ {2439, xed3_phash_find_map0x0F_opcode0x78_vv2_572_l1},
/*h(1452)=573 */ {1452, xed3_phash_find_map0x0F_opcode0x78_vv2_573_l1},
/*h(465)=574 */ {465, xed3_phash_find_map0x0F_opcode0x78_vv2_574_l1},
/*h(17799)=575 */ {17799, xed3_phash_find_map0x0F_opcode0x78_vv2_575_l1},
/*h(16812)=576 */ {16812, xed3_phash_find_map0x0F_opcode0x78_vv2_576_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4502)=578 */ {4502, xed3_phash_find_map0x0F_opcode0x78_vv2_578_l1},
/*h(8683)=579 */ {8683, xed3_phash_find_map0x0F_opcode0x78_vv2_579_l1},
/*h(26017)=580 */ {26017, xed3_phash_find_map0x0F_opcode0x78_vv2_580_l1},
/*h(25030)=581 */ {25030, xed3_phash_find_map0x0F_opcode0x78_vv2_581_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17888)=583 */ {17888, xed3_phash_find_map0x0F_opcode0x78_vv2_583_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5578)=585 */ {5578, xed3_phash_find_map0x0F_opcode0x78_vv2_585_l1},
/*h(4591)=586 */ {4591, xed3_phash_find_map0x0F_opcode0x78_vv2_586_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20938)=588 */ {20938, xed3_phash_find_map0x0F_opcode0x78_vv2_588_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9615)=590 */ {9615, xed3_phash_find_map0x0F_opcode0x78_vv2_590_l1},
/*h(8628)=591 */ {8628, xed3_phash_find_map0x0F_opcode0x78_vv2_591_l1},
/*h(1486)=592 */ {1486, xed3_phash_find_map0x0F_opcode0x78_vv2_592_l1},
/*h(499)=593 */ {499, xed3_phash_find_map0x0F_opcode0x78_vv2_593_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17833)=595 */ {17833, xed3_phash_find_map0x0F_opcode0x78_vv2_595_l1},
/*h(16846)=596 */ {16846, xed3_phash_find_map0x0F_opcode0x78_vv2_596_l1},
/*h(9704)=597 */ {9704, xed3_phash_find_map0x0F_opcode0x78_vv2_597_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25064)=600 */ {25064, xed3_phash_find_map0x0F_opcode0x78_vv2_600_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13741)=602 */ {13741, xed3_phash_find_map0x0F_opcode0x78_vv2_602_l1},
/*h(7586)=603 */ {7586, xed3_phash_find_map0x0F_opcode0x78_vv2_603_l1},
/*h(6599)=604 */ {6599, xed3_phash_find_map0x0F_opcode0x78_vv2_604_l1},
/*h(5612)=605 */ {5612, xed3_phash_find_map0x0F_opcode0x78_vv2_605_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21959)=607 */ {21959, xed3_phash_find_map0x0F_opcode0x78_vv2_607_l1},
/*h(20972)=608 */ {20972, xed3_phash_find_map0x0F_opcode0x78_vv2_608_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8662)=610 */ {8662, xed3_phash_find_map0x0F_opcode0x78_vv2_610_l1},
/*h(3494)=611 */ {3494, xed3_phash_find_map0x0F_opcode0x78_vv2_611_l1},
/*h(25996)=612 */ {25996, xed3_phash_find_map0x0F_opcode0x78_vv2_612_l1},
/*h(25009)=613 */ {25009, xed3_phash_find_map0x0F_opcode0x78_vv2_613_l1},
/*h(17867)=614 */ {17867, xed3_phash_find_map0x0F_opcode0x78_vv2_614_l1},
/*h(16880)=615 */ {16880, xed3_phash_find_map0x0F_opcode0x78_vv2_615_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5557)=617 */ {5557, xed3_phash_find_map0x0F_opcode0x78_vv2_617_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21904)=619 */ {21904, xed3_phash_find_map0x0F_opcode0x78_vv2_619_l1},
/*h(20917)=620 */ {20917, xed3_phash_find_map0x0F_opcode0x78_vv2_620_l1},
/*h(14762)=621 */ {14762, xed3_phash_find_map0x0F_opcode0x78_vv2_621_l1},
/*h(13775)=622 */ {13775, xed3_phash_find_map0x0F_opcode0x78_vv2_622_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29135)=625 */ {29135, xed3_phash_find_map0x0F_opcode0x78_vv2_625_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21993)=627 */ {21993, xed3_phash_find_map0x0F_opcode0x78_vv2_627_l1},
/*h(10670)=628 */ {10670, xed3_phash_find_map0x0F_opcode0x78_vv2_628_l1},
/*h(9683)=629 */ {9683, xed3_phash_find_map0x0F_opcode0x78_vv2_629_l1},
/*h(4515)=630 */ {4515, xed3_phash_find_map0x0F_opcode0x78_vv2_630_l1},
/*h(26030)=631 */ {26030, xed3_phash_find_map0x0F_opcode0x78_vv2_631_l1},
/*h(25043)=632 */ {25043, xed3_phash_find_map0x0F_opcode0x78_vv2_632_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17901)=634 */ {17901, xed3_phash_find_map0x0F_opcode0x78_vv2_634_l1},
/*h(11746)=635 */ {11746, xed3_phash_find_map0x0F_opcode0x78_vv2_635_l1},
/*h(5591)=636 */ {5591, xed3_phash_find_map0x0F_opcode0x78_vv2_636_l1},
/*h(423)=637 */ {423, xed3_phash_find_map0x0F_opcode0x78_vv2_637_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21938)=639 */ {21938, xed3_phash_find_map0x0F_opcode0x78_vv2_639_l1},
/*h(15783)=640 */ {15783, xed3_phash_find_map0x0F_opcode0x78_vv2_640_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8641)=642 */ {8641, xed3_phash_find_map0x0F_opcode0x78_vv2_642_l1},
/*h(7654)=643 */ {7654, xed3_phash_find_map0x0F_opcode0x78_vv2_643_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17846)=646 */ {17846, xed3_phash_find_map0x0F_opcode0x78_vv2_646_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4549)=649 */ {4549, xed3_phash_find_map0x0F_opcode0x78_vv2_649_l1},
/*h(3562)=650 */ {3562, xed3_phash_find_map0x0F_opcode0x78_vv2_650_l1},
/*h(26064)=651 */ {26064, xed3_phash_find_map0x0F_opcode0x78_vv2_651_l1},
/*h(25077)=652 */ {25077, xed3_phash_find_map0x0F_opcode0x78_vv2_652_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8586)=654 */ {8586, xed3_phash_find_map0x0F_opcode0x78_vv2_654_l1},
/*h(7599)=655 */ {7599, xed3_phash_find_map0x0F_opcode0x78_vv2_655_l1},
/*h(30101)=656 */ {30101, xed3_phash_find_map0x0F_opcode0x78_vv2_656_l1},
/*h(457)=657 */ {457, xed3_phash_find_map0x0F_opcode0x78_vv2_657_l1},
/*h(21972)=658 */ {21972, xed3_phash_find_map0x0F_opcode0x78_vv2_658_l1},
/*h(16804)=659 */ {16804, xed3_phash_find_map0x0F_opcode0x78_vv2_659_l1},
/*h(14830)=660 */ {14830, xed3_phash_find_map0x0F_opcode0x78_vv2_660_l1},
/*h(4494)=661 */ {4494, xed3_phash_find_map0x0F_opcode0x78_vv2_661_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5570)=668 */ {5570, xed3_phash_find_map0x0F_opcode0x78_vv2_668_l1},
/*h(402)=669 */ {402, xed3_phash_find_map0x0F_opcode0x78_vv2_669_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20930)=671 */ {20930, xed3_phash_find_map0x0F_opcode0x78_vv2_671_l1},
/*h(15762)=672 */ {15762, xed3_phash_find_map0x0F_opcode0x78_vv2_672_l1},
/*h(9607)=673 */ {9607, xed3_phash_find_map0x0F_opcode0x78_vv2_673_l1},
/*h(8620)=674 */ {8620, xed3_phash_find_map0x0F_opcode0x78_vv2_674_l1},
/*h(30135)=675 */ {30135, xed3_phash_find_map0x0F_opcode0x78_vv2_675_l1},
/*h(24967)=676 */ {24967, xed3_phash_find_map0x0F_opcode0x78_vv2_676_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16838)=678 */ {16838, xed3_phash_find_map0x0F_opcode0x78_vv2_678_l1},
/*h(11670)=679 */ {11670, xed3_phash_find_map0x0F_opcode0x78_vv2_679_l1},
/*h(5515)=680 */ {5515, xed3_phash_find_map0x0F_opcode0x78_vv2_680_l1},
/*h(4528)=681 */ {4528, xed3_phash_find_map0x0F_opcode0x78_vv2_681_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25056)=683 */ {25056, xed3_phash_find_map0x0F_opcode0x78_vv2_683_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13733)=685 */ {13733, xed3_phash_find_map0x0F_opcode0x78_vv2_685_l1},
/*h(11759)=686 */ {11759, xed3_phash_find_map0x0F_opcode0x78_vv2_686_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5604)=688 */ {5604, xed3_phash_find_map0x0F_opcode0x78_vv2_688_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20964)=691 */ {20964, xed3_phash_find_map0x0F_opcode0x78_vv2_691_l1},
/*h(9641)=692 */ {9641, xed3_phash_find_map0x0F_opcode0x78_vv2_692_l1},
/*h(8654)=693 */ {8654, xed3_phash_find_map0x0F_opcode0x78_vv2_693_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1512)=695 */ {1512, xed3_phash_find_map0x0F_opcode0x78_vv2_695_l1},
/*h(25001)=696 */ {25001, xed3_phash_find_map0x0F_opcode0x78_vv2_696_l1},
/*h(17859)=697 */ {17859, xed3_phash_find_map0x0F_opcode0x78_vv2_697_l1},
/*h(16872)=698 */ {16872, xed3_phash_find_map0x0F_opcode0x78_vv2_698_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4562)=700 */ {4562, xed3_phash_find_map0x0F_opcode0x78_vv2_700_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21896)=702 */ {21896, xed3_phash_find_map0x0F_opcode0x78_vv2_702_l1},
/*h(20909)=703 */ {20909, xed3_phash_find_map0x0F_opcode0x78_vv2_703_l1},
/*h(14754)=704 */ {14754, xed3_phash_find_map0x0F_opcode0x78_vv2_704_l1},
/*h(13767)=705 */ {13767, xed3_phash_find_map0x0F_opcode0x78_vv2_705_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1457)=707 */ {1457, xed3_phash_find_map0x0F_opcode0x78_vv2_707_l1},
/*h(29127)=708 */ {29127, xed3_phash_find_map0x0F_opcode0x78_vv2_708_l1},
/*h(17804)=709 */ {17804, xed3_phash_find_map0x0F_opcode0x78_vv2_709_l1},
/*h(21985)=710 */ {21985, xed3_phash_find_map0x0F_opcode0x78_vv2_710_l1},
/*h(15830)=711 */ {15830, xed3_phash_find_map0x0F_opcode0x78_vv2_711_l1},
/*h(9675)=712 */ {9675, xed3_phash_find_map0x0F_opcode0x78_vv2_712_l1},
/*h(8688)=713 */ {8688, xed3_phash_find_map0x0F_opcode0x78_vv2_713_l1},
/*h(26022)=714 */ {26022, xed3_phash_find_map0x0F_opcode0x78_vv2_714_l1},
/*h(25035)=715 */ {25035, xed3_phash_find_map0x0F_opcode0x78_vv2_715_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17893)=717 */ {17893, xed3_phash_find_map0x0F_opcode0x78_vv2_717_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6570)=719 */ {6570, xed3_phash_find_map0x0F_opcode0x78_vv2_719_l1},
/*h(4596)=720 */ {4596, xed3_phash_find_map0x0F_opcode0x78_vv2_720_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21930)=722 */ {21930, xed3_phash_find_map0x0F_opcode0x78_vv2_722_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9620)=724 */ {9620, xed3_phash_find_map0x0F_opcode0x78_vv2_724_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2478)=726 */ {2478, xed3_phash_find_map0x0F_opcode0x78_vv2_726_l1},
/*h(24980)=727 */ {24980, xed3_phash_find_map0x0F_opcode0x78_vv2_727_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17838)=729 */ {17838, xed3_phash_find_map0x0F_opcode0x78_vv2_729_l1},
/*h(16851)=730 */ {16851, xed3_phash_find_map0x0F_opcode0x78_vv2_730_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9709)=732 */ {9709, xed3_phash_find_map0x0F_opcode0x78_vv2_732_l1},
/*h(3554)=733 */ {3554, xed3_phash_find_map0x0F_opcode0x78_vv2_733_l1},
/*h(26056)=734 */ {26056, xed3_phash_find_map0x0F_opcode0x78_vv2_734_l1},
/*h(25069)=735 */ {25069, xed3_phash_find_map0x0F_opcode0x78_vv2_735_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12759)=737 */ {12759, xed3_phash_find_map0x0F_opcode0x78_vv2_737_l1},
/*h(7591)=738 */ {7591, xed3_phash_find_map0x0F_opcode0x78_vv2_738_l1},
/*h(449)=739 */ {449, xed3_phash_find_map0x0F_opcode0x78_vv2_739_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21964)=741 */ {21964, xed3_phash_find_map0x0F_opcode0x78_vv2_741_l1},
/*h(20977)=742 */ {20977, xed3_phash_find_map0x0F_opcode0x78_vv2_742_l1},
/*h(14822)=743 */ {14822, xed3_phash_find_map0x0F_opcode0x78_vv2_743_l1},
/*h(4486)=744 */ {4486, xed3_phash_find_map0x0F_opcode0x78_vv2_744_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1525)=746 */ {1525, xed3_phash_find_map0x0F_opcode0x78_vv2_746_l1},
/*h(25014)=747 */ {25014, xed3_phash_find_map0x0F_opcode0x78_vv2_747_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16885)=749 */ {16885, xed3_phash_find_map0x0F_opcode0x78_vv2_749_l1},
/*h(10730)=750 */ {10730, xed3_phash_find_map0x0F_opcode0x78_vv2_750_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(394)=752 */ {394, xed3_phash_find_map0x0F_opcode0x78_vv2_752_l1},
/*h(21909)=753 */ {21909, xed3_phash_find_map0x0F_opcode0x78_vv2_753_l1},
/*h(26090)=754 */ {26090, xed3_phash_find_map0x0F_opcode0x78_vv2_754_l1},
/*h(15754)=755 */ {15754, xed3_phash_find_map0x0F_opcode0x78_vv2_755_l1},
/*h(8612)=756 */ {8612, xed3_phash_find_map0x0F_opcode0x78_vv2_756_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6638)=758 */ {6638, xed3_phash_find_map0x0F_opcode0x78_vv2_758_l1},
/*h(483)=759 */ {483, xed3_phash_find_map0x0F_opcode0x78_vv2_759_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21998)=761 */ {21998, xed3_phash_find_map0x0F_opcode0x78_vv2_761_l1},
/*h(11662)=762 */ {11662, xed3_phash_find_map0x0F_opcode0x78_vv2_762_l1},
/*h(5507)=763 */ {5507, xed3_phash_find_map0x0F_opcode0x78_vv2_763_l1},
/*h(4520)=764 */ {4520, xed3_phash_find_map0x0F_opcode0x78_vv2_764_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20867)=766 */ {20867, xed3_phash_find_map0x0F_opcode0x78_vv2_766_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17906)=768 */ {17906, xed3_phash_find_map0x0F_opcode0x78_vv2_768_l1},
/*h(7570)=769 */ {7570, xed3_phash_find_map0x0F_opcode0x78_vv2_769_l1},
/*h(1415)=770 */ {1415, xed3_phash_find_map0x0F_opcode0x78_vv2_770_l1},
/*h(428)=771 */ {428, xed3_phash_find_map0x0F_opcode0x78_vv2_771_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16775)=773 */ {16775, xed3_phash_find_map0x0F_opcode0x78_vv2_773_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9633)=775 */ {9633, xed3_phash_find_map0x0F_opcode0x78_vv2_775_l1},
/*h(8646)=776 */ {8646, xed3_phash_find_map0x0F_opcode0x78_vv2_776_l1},
/*h(3478)=777 */ {3478, xed3_phash_find_map0x0F_opcode0x78_vv2_777_l1},
/*h(24993)=778 */ {24993, xed3_phash_find_map0x0F_opcode0x78_vv2_778_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16864)=781 */ {16864, xed3_phash_find_map0x0F_opcode0x78_vv2_781_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4554)=783 */ {4554, xed3_phash_find_map0x0F_opcode0x78_vv2_783_l1},
/*h(3567)=784 */ {3567, xed3_phash_find_map0x0F_opcode0x78_vv2_784_l1},
/*h(21888)=785 */ {21888, xed3_phash_find_map0x0F_opcode0x78_vv2_785_l1},
/*h(20901)=786 */ {20901, xed3_phash_find_map0x0F_opcode0x78_vv2_786_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8591)=788 */ {8591, xed3_phash_find_map0x0F_opcode0x78_vv2_788_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1449)=790 */ {1449, xed3_phash_find_map0x0F_opcode0x78_vv2_790_l1},
/*h(462)=791 */ {462, xed3_phash_find_map0x0F_opcode0x78_vv2_791_l1},
/*h(17796)=792 */ {17796, xed3_phash_find_map0x0F_opcode0x78_vv2_792_l1},
/*h(16809)=793 */ {16809, xed3_phash_find_map0x0F_opcode0x78_vv2_793_l1},
/*h(15822)=794 */ {15822, xed3_phash_find_map0x0F_opcode0x78_vv2_794_l1},
/*h(4499)=795 */ {4499, xed3_phash_find_map0x0F_opcode0x78_vv2_795_l1},
/*h(8680)=796 */ {8680, xed3_phash_find_map0x0F_opcode0x78_vv2_796_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25027)=798 */ {25027, xed3_phash_find_map0x0F_opcode0x78_vv2_798_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12717)=800 */ {12717, xed3_phash_find_map0x0F_opcode0x78_vv2_800_l1},
/*h(11730)=801 */ {11730, xed3_phash_find_map0x0F_opcode0x78_vv2_801_l1},
/*h(6562)=802 */ {6562, xed3_phash_find_map0x0F_opcode0x78_vv2_802_l1},
/*h(407)=803 */ {407, xed3_phash_find_map0x0F_opcode0x78_vv2_803_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20935)=805 */ {20935, xed3_phash_find_map0x0F_opcode0x78_vv2_805_l1},
/*h(15767)=806 */ {15767, xed3_phash_find_map0x0F_opcode0x78_vv2_806_l1},
/*h(9612)=807 */ {9612, xed3_phash_find_map0x0F_opcode0x78_vv2_807_l1},
/*h(7638)=808 */ {7638, xed3_phash_find_map0x0F_opcode0x78_vv2_808_l1},
/*h(2470)=809 */ {2470, xed3_phash_find_map0x0F_opcode0x78_vv2_809_l1},
/*h(1483)=810 */ {1483, xed3_phash_find_map0x0F_opcode0x78_vv2_810_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17830)=812 */ {17830, xed3_phash_find_map0x0F_opcode0x78_vv2_812_l1},
/*h(16843)=813 */ {16843, xed3_phash_find_map0x0F_opcode0x78_vv2_813_l1},
/*h(5520)=814 */ {5520, xed3_phash_find_map0x0F_opcode0x78_vv2_814_l1},
/*h(4533)=815 */ {4533, xed3_phash_find_map0x0F_opcode0x78_vv2_815_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20880)=817 */ {20880, xed3_phash_find_map0x0F_opcode0x78_vv2_817_l1},
/*h(25061)=818 */ {25061, xed3_phash_find_map0x0F_opcode0x78_vv2_818_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12751)=820 */ {12751, xed3_phash_find_map0x0F_opcode0x78_vv2_820_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5609)=822 */ {5609, xed3_phash_find_map0x0F_opcode0x78_vv2_822_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21956)=824 */ {21956, xed3_phash_find_map0x0F_opcode0x78_vv2_824_l1},
/*h(20969)=825 */ {20969, xed3_phash_find_map0x0F_opcode0x78_vv2_825_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8659)=827 */ {8659, xed3_phash_find_map0x0F_opcode0x78_vv2_827_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25993)=829 */ {25993, xed3_phash_find_map0x0F_opcode0x78_vv2_829_l1},
/*h(25006)=830 */ {25006, xed3_phash_find_map0x0F_opcode0x78_vv2_830_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17864)=832 */ {17864, xed3_phash_find_map0x0F_opcode0x78_vv2_832_l1},
/*h(10722)=833 */ {10722, xed3_phash_find_map0x0F_opcode0x78_vv2_833_l1},
/*h(5554)=834 */ {5554, xed3_phash_find_map0x0F_opcode0x78_vv2_834_l1},
/*h(4567)=835 */ {4567, xed3_phash_find_map0x0F_opcode0x78_vv2_835_l1},
/*h(26082)=836 */ {26082, xed3_phash_find_map0x0F_opcode0x78_vv2_836_l1},
/*h(20914)=837 */ {20914, xed3_phash_find_map0x0F_opcode0x78_vv2_837_l1},
/*h(15746)=838 */ {15746, xed3_phash_find_map0x0F_opcode0x78_vv2_838_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30119)=841 */ {30119, xed3_phash_find_map0x0F_opcode0x78_vv2_841_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21990)=844 */ {21990, xed3_phash_find_map0x0F_opcode0x78_vv2_844_l1},
/*h(11654)=845 */ {11654, xed3_phash_find_map0x0F_opcode0x78_vv2_845_l1},
/*h(9680)=846 */ {9680, xed3_phash_find_map0x0F_opcode0x78_vv2_846_l1},
/*h(8693)=847 */ {8693, xed3_phash_find_map0x0F_opcode0x78_vv2_847_l1},
/*h(2538)=848 */ {2538, xed3_phash_find_map0x0F_opcode0x78_vv2_848_l1},
/*h(25040)=849 */ {25040, xed3_phash_find_map0x0F_opcode0x78_vv2_849_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13717)=851 */ {13717, xed3_phash_find_map0x0F_opcode0x78_vv2_851_l1},
/*h(7562)=852 */ {7562, xed3_phash_find_map0x0F_opcode0x78_vv2_852_l1},
/*h(6575)=853 */ {6575, xed3_phash_find_map0x0F_opcode0x78_vv2_853_l1},
/*h(29077)=854 */ {29077, xed3_phash_find_map0x0F_opcode0x78_vv2_854_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21935)=856 */ {21935, xed3_phash_find_map0x0F_opcode0x78_vv2_856_l1},
/*h(20948)=857 */ {20948, xed3_phash_find_map0x0F_opcode0x78_vv2_857_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3470)=859 */ {3470, xed3_phash_find_map0x0F_opcode0x78_vv2_859_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17843)=863 */ {17843, xed3_phash_find_map0x0F_opcode0x78_vv2_863_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9714)=866 */ {9714, xed3_phash_find_map0x0F_opcode0x78_vv2_866_l1},
/*h(3559)=867 */ {3559, xed3_phash_find_map0x0F_opcode0x78_vv2_867_l1},
/*h(26061)=868 */ {26061, xed3_phash_find_map0x0F_opcode0x78_vv2_868_l1},
/*h(25074)=869 */ {25074, xed3_phash_find_map0x0F_opcode0x78_vv2_869_l1},
/*h(14738)=870 */ {14738, xed3_phash_find_map0x0F_opcode0x78_vv2_870_l1},
/*h(13751)=871 */ {13751, xed3_phash_find_map0x0F_opcode0x78_vv2_871_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5622)=873 */ {5622, xed3_phash_find_map0x0F_opcode0x78_vv2_873_l1},
/*h(29111)=874 */ {29111, xed3_phash_find_map0x0F_opcode0x78_vv2_874_l1},
/*h(21969)=875 */ {21969, xed3_phash_find_map0x0F_opcode0x78_vv2_875_l1},
/*h(20982)=876 */ {20982, xed3_phash_find_map0x0F_opcode0x78_vv2_876_l1},
/*h(15814)=877 */ {15814, xed3_phash_find_map0x0F_opcode0x78_vv2_877_l1},
/*h(4491)=878 */ {4491, xed3_phash_find_map0x0F_opcode0x78_vv2_878_l1},
/*h(8672)=879 */ {8672, xed3_phash_find_map0x0F_opcode0x78_vv2_879_l1},
/*h(26006)=880 */ {26006, xed3_phash_find_map0x0F_opcode0x78_vv2_880_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12709)=883 */ {12709, xed3_phash_find_map0x0F_opcode0x78_vv2_883_l1},
/*h(11722)=884 */ {11722, xed3_phash_find_map0x0F_opcode0x78_vv2_884_l1},
/*h(10735)=885 */ {10735, xed3_phash_find_map0x0F_opcode0x78_vv2_885_l1},
/*h(4580)=886 */ {4580, xed3_phash_find_map0x0F_opcode0x78_vv2_886_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26095)=888 */ {26095, xed3_phash_find_map0x0F_opcode0x78_vv2_888_l1},
/*h(15759)=889 */ {15759, xed3_phash_find_map0x0F_opcode0x78_vv2_889_l1},
/*h(9604)=890 */ {9604, xed3_phash_find_map0x0F_opcode0x78_vv2_890_l1},
/*h(7630)=891 */ {7630, xed3_phash_find_map0x0F_opcode0x78_vv2_891_l1},
/*h(1475)=892 */ {1475, xed3_phash_find_map0x0F_opcode0x78_vv2_892_l1},
/*h(24964)=893 */ {24964, xed3_phash_find_map0x0F_opcode0x78_vv2_893_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(22003)=895 */ {22003, xed3_phash_find_map0x0F_opcode0x78_vv2_895_l1},
/*h(16835)=896 */ {16835, xed3_phash_find_map0x0F_opcode0x78_vv2_896_l1},
/*h(5512)=897 */ {5512, xed3_phash_find_map0x0F_opcode0x78_vv2_897_l1},
/*h(4525)=898 */ {4525, xed3_phash_find_map0x0F_opcode0x78_vv2_898_l1},
/*h(3538)=899 */ {3538, xed3_phash_find_map0x0F_opcode0x78_vv2_899_l1},
/*h(20872)=900 */ {20872, xed3_phash_find_map0x0F_opcode0x78_vv2_900_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17911)=902 */ {17911, xed3_phash_find_map0x0F_opcode0x78_vv2_902_l1},
/*h(7575)=903 */ {7575, xed3_phash_find_map0x0F_opcode0x78_vv2_903_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5601)=905 */ {5601, xed3_phash_find_map0x0F_opcode0x78_vv2_905_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20961)=908 */ {20961, xed3_phash_find_map0x0F_opcode0x78_vv2_908_l1},
/*h(14806)=909 */ {14806, xed3_phash_find_map0x0F_opcode0x78_vv2_909_l1},
/*h(8651)=910 */ {8651, xed3_phash_find_map0x0F_opcode0x78_vv2_910_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1509)=912 */ {1509, xed3_phash_find_map0x0F_opcode0x78_vv2_912_l1},
/*h(24998)=913 */ {24998, xed3_phash_find_map0x0F_opcode0x78_vv2_913_l1},
/*h(17856)=914 */ {17856, xed3_phash_find_map0x0F_opcode0x78_vv2_914_l1},
/*h(16869)=915 */ {16869, xed3_phash_find_map0x0F_opcode0x78_vv2_915_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5546)=917 */ {5546, xed3_phash_find_map0x0F_opcode0x78_vv2_917_l1},
/*h(4559)=918 */ {4559, xed3_phash_find_map0x0F_opcode0x78_vv2_918_l1},
/*h(21893)=919 */ {21893, xed3_phash_find_map0x0F_opcode0x78_vv2_919_l1},
/*h(20906)=920 */ {20906, xed3_phash_find_map0x0F_opcode0x78_vv2_920_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8596)=922 */ {8596, xed3_phash_find_map0x0F_opcode0x78_vv2_922_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1454)=924 */ {1454, xed3_phash_find_map0x0F_opcode0x78_vv2_924_l1},
/*h(467)=925 */ {467, xed3_phash_find_map0x0F_opcode0x78_vv2_925_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16814)=927 */ {16814, xed3_phash_find_map0x0F_opcode0x78_vv2_927_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9672)=929 */ {9672, xed3_phash_find_map0x0F_opcode0x78_vv2_929_l1},
/*h(8685)=930 */ {8685, xed3_phash_find_map0x0F_opcode0x78_vv2_930_l1},
/*h(2530)=931 */ {2530, xed3_phash_find_map0x0F_opcode0x78_vv2_931_l1},
/*h(26019)=932 */ {26019, xed3_phash_find_map0x0F_opcode0x78_vv2_932_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13709)=934 */ {13709, xed3_phash_find_map0x0F_opcode0x78_vv2_934_l1},
/*h(7554)=935 */ {7554, xed3_phash_find_map0x0F_opcode0x78_vv2_935_l1},
/*h(6567)=936 */ {6567, xed3_phash_find_map0x0F_opcode0x78_vv2_936_l1},
/*h(4593)=937 */ {4593, xed3_phash_find_map0x0F_opcode0x78_vv2_937_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21927)=939 */ {21927, xed3_phash_find_map0x0F_opcode0x78_vv2_939_l1},
/*h(20940)=940 */ {20940, xed3_phash_find_map0x0F_opcode0x78_vv2_940_l1},
/*h(9617)=941 */ {9617, xed3_phash_find_map0x0F_opcode0x78_vv2_941_l1},
/*h(8630)=942 */ {8630, xed3_phash_find_map0x0F_opcode0x78_vv2_942_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24977)=944 */ {24977, xed3_phash_find_map0x0F_opcode0x78_vv2_944_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17835)=946 */ {17835, xed3_phash_find_map0x0F_opcode0x78_vv2_946_l1},
/*h(16848)=947 */ {16848, xed3_phash_find_map0x0F_opcode0x78_vv2_947_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5525)=949 */ {5525, xed3_phash_find_map0x0F_opcode0x78_vv2_949_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26053)=951 */ {26053, xed3_phash_find_map0x0F_opcode0x78_vv2_951_l1},
/*h(25066)=952 */ {25066, xed3_phash_find_map0x0F_opcode0x78_vv2_952_l1},
/*h(14730)=953 */ {14730, xed3_phash_find_map0x0F_opcode0x78_vv2_953_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5614)=956 */ {5614, xed3_phash_find_map0x0F_opcode0x78_vv2_956_l1},
/*h(29103)=957 */ {29103, xed3_phash_find_map0x0F_opcode0x78_vv2_957_l1},
/*h(21961)=958 */ {21961, xed3_phash_find_map0x0F_opcode0x78_vv2_958_l1},
/*h(20974)=959 */ {20974, xed3_phash_find_map0x0F_opcode0x78_vv2_959_l1},
/*h(10638)=960 */ {10638, xed3_phash_find_map0x0F_opcode0x78_vv2_960_l1},
/*h(4483)=961 */ {4483, xed3_phash_find_map0x0F_opcode0x78_vv2_961_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1522)=963 */ {1522, xed3_phash_find_map0x0F_opcode0x78_vv2_963_l1},
/*h(25011)=964 */ {25011, xed3_phash_find_map0x0F_opcode0x78_vv2_964_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16882)=966 */ {16882, xed3_phash_find_map0x0F_opcode0x78_vv2_966_l1},
/*h(6546)=967 */ {6546, xed3_phash_find_map0x0F_opcode0x78_vv2_967_l1},
/*h(10727)=968 */ {10727, xed3_phash_find_map0x0F_opcode0x78_vv2_968_l1},
/*h(391)=969 */ {391, xed3_phash_find_map0x0F_opcode0x78_vv2_969_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20919)=971 */ {20919, xed3_phash_find_map0x0F_opcode0x78_vv2_971_l1},
/*h(15751)=972 */ {15751, xed3_phash_find_map0x0F_opcode0x78_vv2_972_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7622)=974 */ {7622, xed3_phash_find_map0x0F_opcode0x78_vv2_974_l1},
/*h(2454)=975 */ {2454, xed3_phash_find_map0x0F_opcode0x78_vv2_975_l1},
/*h(480)=976 */ {480, xed3_phash_find_map0x0F_opcode0x78_vv2_976_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21995)=978 */ {21995, xed3_phash_find_map0x0F_opcode0x78_vv2_978_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5504)=980 */ {5504, xed3_phash_find_map0x0F_opcode0x78_vv2_980_l1},
/*h(4517)=981 */ {4517, xed3_phash_find_map0x0F_opcode0x78_vv2_981_l1},
/*h(3530)=982 */ {3530, xed3_phash_find_map0x0F_opcode0x78_vv2_982_l1},
/*h(25045)=983 */ {25045, xed3_phash_find_map0x0F_opcode0x78_vv2_983_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17903)=985 */ {17903, xed3_phash_find_map0x0F_opcode0x78_vv2_985_l1},
/*h(7567)=986 */ {7567, xed3_phash_find_map0x0F_opcode0x78_vv2_986_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1412)=988 */ {1412, xed3_phash_find_map0x0F_opcode0x78_vv2_988_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21940)=990 */ {21940, xed3_phash_find_map0x0F_opcode0x78_vv2_990_l1},
/*h(16772)=991 */ {16772, xed3_phash_find_map0x0F_opcode0x78_vv2_991_l1},
/*h(14798)=992 */ {14798, xed3_phash_find_map0x0F_opcode0x78_vv2_992_l1},
/*h(8643)=993 */ {8643, xed3_phash_find_map0x0F_opcode0x78_vv2_993_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10706)=999 */ {10706, xed3_phash_find_map0x0F_opcode0x78_vv2_999_l1},
/*h(5538)=1000 */ {5538, xed3_phash_find_map0x0F_opcode0x78_vv2_1000_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26066)=1002 */ {26066, xed3_phash_find_map0x0F_opcode0x78_vv2_1002_l1},
/*h(25079)=1003 */ {25079, xed3_phash_find_map0x0F_opcode0x78_vv2_1003_l1},
/*h(14743)=1004 */ {14743, xed3_phash_find_map0x0F_opcode0x78_vv2_1004_l1},
/*h(8588)=1005 */ {8588, xed3_phash_find_map0x0F_opcode0x78_vv2_1005_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30103)=1007 */ {30103, xed3_phash_find_map0x0F_opcode0x78_vv2_1007_l1},
/*h(459)=1008 */ {459, xed3_phash_find_map0x0F_opcode0x78_vv2_1008_l1},
/*h(17793)=1009 */ {17793, xed3_phash_find_map0x0F_opcode0x78_vv2_1009_l1},
/*h(21974)=1010 */ {21974, xed3_phash_find_map0x0F_opcode0x78_vv2_1010_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9664)=1012 */ {9664, xed3_phash_find_map0x0F_opcode0x78_vv2_1012_l1},
/*h(4496)=1013 */ {4496, xed3_phash_find_map0x0F_opcode0x78_vv2_1013_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25024)=1015 */ {25024, xed3_phash_find_map0x0F_opcode0x78_vv2_1015_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13701)=1017 */ {13701, xed3_phash_find_map0x0F_opcode0x78_vv2_1017_l1},
/*h(11727)=1018 */ {11727, xed3_phash_find_map0x0F_opcode0x78_vv2_1018_l1},
/*h(5572)=1019 */ {5572, xed3_phash_find_map0x0F_opcode0x78_vv2_1019_l1},
/*h(4585)=1020 */ {4585, xed3_phash_find_map0x0F_opcode0x78_vv2_1020_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20932)=1022 */ {20932, xed3_phash_find_map0x0F_opcode0x78_vv2_1022_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9609)=1024 */ {9609, xed3_phash_find_map0x0F_opcode0x78_vv2_1024_l1},
/*h(8622)=1025 */ {8622, xed3_phash_find_map0x0F_opcode0x78_vv2_1025_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(493)=1027 */ {493, xed3_phash_find_map0x0F_opcode0x78_vv2_1027_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17827)=1029 */ {17827, xed3_phash_find_map0x0F_opcode0x78_vv2_1029_l1},
/*h(16840)=1030 */ {16840, xed3_phash_find_map0x0F_opcode0x78_vv2_1030_l1},
/*h(5517)=1031 */ {5517, xed3_phash_find_map0x0F_opcode0x78_vv2_1031_l1},
/*h(4530)=1032 */ {4530, xed3_phash_find_map0x0F_opcode0x78_vv2_1032_l1},
/*h(3543)=1033 */ {3543, xed3_phash_find_map0x0F_opcode0x78_vv2_1033_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25058)=1035 */ {25058, xed3_phash_find_map0x0F_opcode0x78_vv2_1035_l1},
/*h(14722)=1036 */ {14722, xed3_phash_find_map0x0F_opcode0x78_vv2_1036_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5606)=1039 */ {5606, xed3_phash_find_map0x0F_opcode0x78_vv2_1039_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21953)=1041 */ {21953, xed3_phash_find_map0x0F_opcode0x78_vv2_1041_l1},
/*h(20966)=1042 */ {20966, xed3_phash_find_map0x0F_opcode0x78_vv2_1042_l1},
/*h(10630)=1043 */ {10630, xed3_phash_find_map0x0F_opcode0x78_vv2_1043_l1},
/*h(8656)=1044 */ {8656, xed3_phash_find_map0x0F_opcode0x78_vv2_1044_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1514)=1046 */ {1514, xed3_phash_find_map0x0F_opcode0x78_vv2_1046_l1},
/*h(25003)=1047 */ {25003, xed3_phash_find_map0x0F_opcode0x78_vv2_1047_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16874)=1049 */ {16874, xed3_phash_find_map0x0F_opcode0x78_vv2_1049_l1},
/*h(6538)=1050 */ {6538, xed3_phash_find_map0x0F_opcode0x78_vv2_1050_l1},
/*h(5551)=1051 */ {5551, xed3_phash_find_map0x0F_opcode0x78_vv2_1051_l1},
/*h(4564)=1052 */ {4564, xed3_phash_find_map0x0F_opcode0x78_vv2_1052_l1},
/*h(21898)=1053 */ {21898, xed3_phash_find_map0x0F_opcode0x78_vv2_1053_l1},
/*h(20911)=1054 */ {20911, xed3_phash_find_map0x0F_opcode0x78_vv2_1054_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1459)=1058 */ {1459, xed3_phash_find_map0x0F_opcode0x78_vv2_1058_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21987)=1061 */ {21987, xed3_phash_find_map0x0F_opcode0x78_vv2_1061_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9677)=1063 */ {9677, xed3_phash_find_map0x0F_opcode0x78_vv2_1063_l1},
/*h(3522)=1064 */ {3522, xed3_phash_find_map0x0F_opcode0x78_vv2_1064_l1},
/*h(2535)=1065 */ {2535, xed3_phash_find_map0x0F_opcode0x78_vv2_1065_l1},
/*h(26024)=1066 */ {26024, xed3_phash_find_map0x0F_opcode0x78_vv2_1066_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17895)=1068 */ {17895, xed3_phash_find_map0x0F_opcode0x78_vv2_1068_l1},
/*h(12727)=1069 */ {12727, xed3_phash_find_map0x0F_opcode0x78_vv2_1069_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4598)=1071 */ {4598, xed3_phash_find_map0x0F_opcode0x78_vv2_1071_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21932)=1073 */ {21932, xed3_phash_find_map0x0F_opcode0x78_vv2_1073_l1},
/*h(20945)=1074 */ {20945, xed3_phash_find_map0x0F_opcode0x78_vv2_1074_l1},
/*h(9622)=1075 */ {9622, xed3_phash_find_map0x0F_opcode0x78_vv2_1075_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24982)=1078 */ {24982, xed3_phash_find_map0x0F_opcode0x78_vv2_1078_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17840)=1080 */ {17840, xed3_phash_find_map0x0F_opcode0x78_vv2_1080_l1},
/*h(16853)=1081 */ {16853, xed3_phash_find_map0x0F_opcode0x78_vv2_1081_l1},
/*h(10698)=1082 */ {10698, xed3_phash_find_map0x0F_opcode0x78_vv2_1082_l1},
/*h(9711)=1083 */ {9711, xed3_phash_find_map0x0F_opcode0x78_vv2_1083_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26058)=1085 */ {26058, xed3_phash_find_map0x0F_opcode0x78_vv2_1085_l1},
/*h(25071)=1086 */ {25071, xed3_phash_find_map0x0F_opcode0x78_vv2_1086_l1},
/*h(14735)=1087 */ {14735, xed3_phash_find_map0x0F_opcode0x78_vv2_1087_l1},
/*h(8580)=1088 */ {8580, xed3_phash_find_map0x0F_opcode0x78_vv2_1088_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5619)=1090 */ {5619, xed3_phash_find_map0x0F_opcode0x78_vv2_1090_l1},
/*h(451)=1091 */ {451, xed3_phash_find_map0x0F_opcode0x78_vv2_1091_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21966)=1093 */ {21966, xed3_phash_find_map0x0F_opcode0x78_vv2_1093_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4488)=1095 */ {4488, xed3_phash_find_map0x0F_opcode0x78_vv2_1095_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26003)=1097 */ {26003, xed3_phash_find_map0x0F_opcode0x78_vv2_1097_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17874)=1100 */ {17874, xed3_phash_find_map0x0F_opcode0x78_vv2_1100_l1},
/*h(16887)=1101 */ {16887, xed3_phash_find_map0x0F_opcode0x78_vv2_1101_l1},
/*h(6551)=1102 */ {6551, xed3_phash_find_map0x0F_opcode0x78_vv2_1102_l1},
/*h(4577)=1103 */ {4577, xed3_phash_find_map0x0F_opcode0x78_vv2_1103_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26092)=1105 */ {26092, xed3_phash_find_map0x0F_opcode0x78_vv2_1105_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9601)=1107 */ {9601, xed3_phash_find_map0x0F_opcode0x78_vv2_1107_l1},
/*h(8614)=1108 */ {8614, xed3_phash_find_map0x0F_opcode0x78_vv2_1108_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(485)=1110 */ {485, xed3_phash_find_map0x0F_opcode0x78_vv2_1110_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(22000)=1112 */ {22000, xed3_phash_find_map0x0F_opcode0x78_vv2_1112_l1},
/*h(16832)=1113 */ {16832, xed3_phash_find_map0x0F_opcode0x78_vv2_1113_l1},
/*h(5509)=1114 */ {5509, xed3_phash_find_map0x0F_opcode0x78_vv2_1114_l1},
/*h(4522)=1115 */ {4522, xed3_phash_find_map0x0F_opcode0x78_vv2_1115_l1},
/*h(3535)=1116 */ {3535, xed3_phash_find_map0x0F_opcode0x78_vv2_1116_l1},
/*h(20869)=1117 */ {20869, xed3_phash_find_map0x0F_opcode0x78_vv2_1117_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17908)=1119 */ {17908, xed3_phash_find_map0x0F_opcode0x78_vv2_1119_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(430)=1122 */ {430, xed3_phash_find_map0x0F_opcode0x78_vv2_1122_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(15790)=1125 */ {15790, xed3_phash_find_map0x0F_opcode0x78_vv2_1125_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8648)=1127 */ {8648, xed3_phash_find_map0x0F_opcode0x78_vv2_1127_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1506)=1129 */ {1506, xed3_phash_find_map0x0F_opcode0x78_vv2_1129_l1},
/*h(24995)=1130 */ {24995, xed3_phash_find_map0x0F_opcode0x78_vv2_1130_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16866)=1132 */ {16866, xed3_phash_find_map0x0F_opcode0x78_vv2_1132_l1},
/*h(6530)=1133 */ {6530, xed3_phash_find_map0x0F_opcode0x78_vv2_1133_l1},
/*h(5543)=1134 */ {5543, xed3_phash_find_map0x0F_opcode0x78_vv2_1134_l1},
/*h(4556)=1135 */ {4556, xed3_phash_find_map0x0F_opcode0x78_vv2_1135_l1},
/*h(21890)=1136 */ {21890, xed3_phash_find_map0x0F_opcode0x78_vv2_1136_l1},
/*h(20903)=1137 */ {20903, xed3_phash_find_map0x0F_opcode0x78_vv2_1137_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8593)=1139 */ {8593, xed3_phash_find_map0x0F_opcode0x78_vv2_1139_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2438)=1141 */ {2438, xed3_phash_find_map0x0F_opcode0x78_vv2_1141_l1},
/*h(464)=1142 */ {464, xed3_phash_find_map0x0F_opcode0x78_vv2_1142_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16811)=1144 */ {16811, xed3_phash_find_map0x0F_opcode0x78_vv2_1144_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9669)=1146 */ {9669, xed3_phash_find_map0x0F_opcode0x78_vv2_1146_l1},
/*h(4501)=1147 */ {4501, xed3_phash_find_map0x0F_opcode0x78_vv2_1147_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30197)=1149 */ {30197, xed3_phash_find_map0x0F_opcode0x78_vv2_1149_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12719)=1152 */ {12719, xed3_phash_find_map0x0F_opcode0x78_vv2_1152_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4590)=1154 */ {4590, xed3_phash_find_map0x0F_opcode0x78_vv2_1154_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21924)=1156 */ {21924, xed3_phash_find_map0x0F_opcode0x78_vv2_1156_l1},
/*h(20937)=1157 */ {20937, xed3_phash_find_map0x0F_opcode0x78_vv2_1157_l1},
/*h(9614)=1158 */ {9614, xed3_phash_find_map0x0F_opcode0x78_vv2_1158_l1},
/*h(8627)=1159 */ {8627, xed3_phash_find_map0x0F_opcode0x78_vv2_1159_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1485)=1161 */ {1485, xed3_phash_find_map0x0F_opcode0x78_vv2_1161_l1},
/*h(498)=1162 */ {498, xed3_phash_find_map0x0F_opcode0x78_vv2_1162_l1},
/*h(17832)=1163 */ {17832, xed3_phash_find_map0x0F_opcode0x78_vv2_1163_l1},
/*h(16845)=1164 */ {16845, xed3_phash_find_map0x0F_opcode0x78_vv2_1164_l1},
/*h(10690)=1165 */ {10690, xed3_phash_find_map0x0F_opcode0x78_vv2_1165_l1},
/*h(5522)=1166 */ {5522, xed3_phash_find_map0x0F_opcode0x78_vv2_1166_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26050)=1168 */ {26050, xed3_phash_find_map0x0F_opcode0x78_vv2_1168_l1},
/*h(25063)=1169 */ {25063, xed3_phash_find_map0x0F_opcode0x78_vv2_1169_l1},
/*h(14727)=1170 */ {14727, xed3_phash_find_map0x0F_opcode0x78_vv2_1170_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6598)=1172 */ {6598, xed3_phash_find_map0x0F_opcode0x78_vv2_1172_l1},
/*h(5611)=1173 */ {5611, xed3_phash_find_map0x0F_opcode0x78_vv2_1173_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21958)=1175 */ {21958, xed3_phash_find_map0x0F_opcode0x78_vv2_1175_l1},
/*h(20971)=1176 */ {20971, xed3_phash_find_map0x0F_opcode0x78_vv2_1176_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4480)=1178 */ {4480, xed3_phash_find_map0x0F_opcode0x78_vv2_1178_l1},
/*h(8661)=1179 */ {8661, xed3_phash_find_map0x0F_opcode0x78_vv2_1179_l1},
/*h(1519)=1180 */ {1519, xed3_phash_find_map0x0F_opcode0x78_vv2_1180_l1},
/*h(25008)=1181 */ {25008, xed3_phash_find_map0x0F_opcode0x78_vv2_1181_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16879)=1183 */ {16879, xed3_phash_find_map0x0F_opcode0x78_vv2_1183_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5556)=1185 */ {5556, xed3_phash_find_map0x0F_opcode0x78_vv2_1185_l1},
/*h(388)=1186 */ {388, xed3_phash_find_map0x0F_opcode0x78_vv2_1186_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26084)=1188 */ {26084, xed3_phash_find_map0x0F_opcode0x78_vv2_1188_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21992)=1195 */ {21992, xed3_phash_find_map0x0F_opcode0x78_vv2_1195_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9682)=1197 */ {9682, xed3_phash_find_map0x0F_opcode0x78_vv2_1197_l1},
/*h(8695)=1198 */ {8695, xed3_phash_find_map0x0F_opcode0x78_vv2_1198_l1},
/*h(3527)=1199 */ {3527, xed3_phash_find_map0x0F_opcode0x78_vv2_1199_l1},
/*h(26029)=1200 */ {26029, xed3_phash_find_map0x0F_opcode0x78_vv2_1200_l1},
/*h(25042)=1201 */ {25042, xed3_phash_find_map0x0F_opcode0x78_vv2_1201_l1},
/*h(17900)=1202 */ {17900, xed3_phash_find_map0x0F_opcode0x78_vv2_1202_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(422)=1205 */ {422, xed3_phash_find_map0x0F_opcode0x78_vv2_1205_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21937)=1207 */ {21937, xed3_phash_find_map0x0F_opcode0x78_vv2_1207_l1},
/*h(15782)=1208 */ {15782, xed3_phash_find_map0x0F_opcode0x78_vv2_1208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8640)=1210 */ {8640, xed3_phash_find_map0x0F_opcode0x78_vv2_1210_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17845)=1214 */ {17845, xed3_phash_find_map0x0F_opcode0x78_vv2_1214_l1},
/*h(12677)=1215 */ {12677, xed3_phash_find_map0x0F_opcode0x78_vv2_1215_l1},
/*h(11690)=1216 */ {11690, xed3_phash_find_map0x0F_opcode0x78_vv2_1216_l1},
/*h(9716)=1217 */ {9716, xed3_phash_find_map0x0F_opcode0x78_vv2_1217_l1},
/*h(4548)=1218 */ {4548, xed3_phash_find_map0x0F_opcode0x78_vv2_1218_l1},
/*h(26063)=1219 */ {26063, xed3_phash_find_map0x0F_opcode0x78_vv2_1219_l1},
/*h(25076)=1220 */ {25076, xed3_phash_find_map0x0F_opcode0x78_vv2_1220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8585)=1222 */ {8585, xed3_phash_find_map0x0F_opcode0x78_vv2_1222_l1},
/*h(7598)=1223 */ {7598, xed3_phash_find_map0x0F_opcode0x78_vv2_1223_l1},
/*h(1443)=1224 */ {1443, xed3_phash_find_map0x0F_opcode0x78_vv2_1224_l1},
/*h(456)=1225 */ {456, xed3_phash_find_map0x0F_opcode0x78_vv2_1225_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21971)=1227 */ {21971, xed3_phash_find_map0x0F_opcode0x78_vv2_1227_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8674)=1230 */ {8674, xed3_phash_find_map0x0F_opcode0x78_vv2_1230_l1},
/*h(2519)=1231 */ {2519, xed3_phash_find_map0x0F_opcode0x78_vv2_1231_l1},
/*h(30189)=1232 */ {30189, xed3_phash_find_map0x0F_opcode0x78_vv2_1232_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17879)=1234 */ {17879, xed3_phash_find_map0x0F_opcode0x78_vv2_1234_l1},
/*h(12711)=1235 */ {12711, xed3_phash_find_map0x0F_opcode0x78_vv2_1235_l1},
/*h(5569)=1236 */ {5569, xed3_phash_find_map0x0F_opcode0x78_vv2_1236_l1},
/*h(4582)=1237 */ {4582, xed3_phash_find_map0x0F_opcode0x78_vv2_1237_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26097)=1239 */ {26097, xed3_phash_find_map0x0F_opcode0x78_vv2_1239_l1},
/*h(20929)=1240 */ {20929, xed3_phash_find_map0x0F_opcode0x78_vv2_1240_l1},
/*h(9606)=1241 */ {9606, xed3_phash_find_map0x0F_opcode0x78_vv2_1241_l1},
/*h(8619)=1242 */ {8619, xed3_phash_find_map0x0F_opcode0x78_vv2_1242_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1477)=1244 */ {1477, xed3_phash_find_map0x0F_opcode0x78_vv2_1244_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17824)=1246 */ {17824, xed3_phash_find_map0x0F_opcode0x78_vv2_1246_l1},
/*h(16837)=1247 */ {16837, xed3_phash_find_map0x0F_opcode0x78_vv2_1247_l1},
/*h(15850)=1248 */ {15850, xed3_phash_find_map0x0F_opcode0x78_vv2_1248_l1},
/*h(5514)=1249 */ {5514, xed3_phash_find_map0x0F_opcode0x78_vv2_1249_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20874)=1252 */ {20874, xed3_phash_find_map0x0F_opcode0x78_vv2_1252_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11758)=1255 */ {11758, xed3_phash_find_map0x0F_opcode0x78_vv2_1255_l1},
/*h(5603)=1256 */ {5603, xed3_phash_find_map0x0F_opcode0x78_vv2_1256_l1},
/*h(435)=1257 */ {435, xed3_phash_find_map0x0F_opcode0x78_vv2_1257_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20963)=1259 */ {20963, xed3_phash_find_map0x0F_opcode0x78_vv2_1259_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8653)=1261 */ {8653, xed3_phash_find_map0x0F_opcode0x78_vv2_1261_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2498)=1263 */ {2498, xed3_phash_find_map0x0F_opcode0x78_vv2_1263_l1},
/*h(25000)=1264 */ {25000, xed3_phash_find_map0x0F_opcode0x78_vv2_1264_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16871)=1266 */ {16871, xed3_phash_find_map0x0F_opcode0x78_vv2_1266_l1},
/*h(6535)=1267 */ {6535, xed3_phash_find_map0x0F_opcode0x78_vv2_1267_l1},
/*h(5548)=1268 */ {5548, xed3_phash_find_map0x0F_opcode0x78_vv2_1268_l1},
/*h(4561)=1269 */ {4561, xed3_phash_find_map0x0F_opcode0x78_vv2_1269_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20908)=1271 */ {20908, xed3_phash_find_map0x0F_opcode0x78_vv2_1271_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8598)=1274 */ {8598, xed3_phash_find_map0x0F_opcode0x78_vv2_1274_l1},
/*h(1456)=1275 */ {1456, xed3_phash_find_map0x0F_opcode0x78_vv2_1275_l1},
/*h(469)=1276 */ {469, xed3_phash_find_map0x0F_opcode0x78_vv2_1276_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21984)=1278 */ {21984, xed3_phash_find_map0x0F_opcode0x78_vv2_1278_l1},
/*h(16816)=1279 */ {16816, xed3_phash_find_map0x0F_opcode0x78_vv2_1279_l1},
/*h(9674)=1280 */ {9674, xed3_phash_find_map0x0F_opcode0x78_vv2_1280_l1},
/*h(8687)=1281 */ {8687, xed3_phash_find_map0x0F_opcode0x78_vv2_1281_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25034)=1283 */ {25034, xed3_phash_find_map0x0F_opcode0x78_vv2_1283_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13711)=1285 */ {13711, xed3_phash_find_map0x0F_opcode0x78_vv2_1285_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5582)=1288 */ {5582, xed3_phash_find_map0x0F_opcode0x78_vv2_1288_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21929)=1290 */ {21929, xed3_phash_find_map0x0F_opcode0x78_vv2_1290_l1},
/*h(20942)=1291 */ {20942, xed3_phash_find_map0x0F_opcode0x78_vv2_1291_l1},
/*h(9619)=1292 */ {9619, xed3_phash_find_map0x0F_opcode0x78_vv2_1292_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1490)=1295 */ {1490, xed3_phash_find_map0x0F_opcode0x78_vv2_1295_l1},
/*h(24979)=1296 */ {24979, xed3_phash_find_map0x0F_opcode0x78_vv2_1296_l1},
/*h(17837)=1297 */ {17837, xed3_phash_find_map0x0F_opcode0x78_vv2_1297_l1},
/*h(16850)=1298 */ {16850, xed3_phash_find_map0x0F_opcode0x78_vv2_1298_l1},
/*h(11682)=1299 */ {11682, xed3_phash_find_map0x0F_opcode0x78_vv2_1299_l1},
/*h(5527)=1300 */ {5527, xed3_phash_find_map0x0F_opcode0x78_vv2_1300_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26055)=1302 */ {26055, xed3_phash_find_map0x0F_opcode0x78_vv2_1302_l1},
/*h(25068)=1303 */ {25068, xed3_phash_find_map0x0F_opcode0x78_vv2_1303_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8577)=1305 */ {8577, xed3_phash_find_map0x0F_opcode0x78_vv2_1305_l1},
/*h(7590)=1306 */ {7590, xed3_phash_find_map0x0F_opcode0x78_vv2_1306_l1},
/*h(5616)=1307 */ {5616, xed3_phash_find_map0x0F_opcode0x78_vv2_1307_l1},
/*h(448)=1308 */ {448, xed3_phash_find_map0x0F_opcode0x78_vv2_1308_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20976)=1310 */ {20976, xed3_phash_find_map0x0F_opcode0x78_vv2_1310_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9653)=1312 */ {9653, xed3_phash_find_map0x0F_opcode0x78_vv2_1312_l1},
/*h(3498)=1313 */ {3498, xed3_phash_find_map0x0F_opcode0x78_vv2_1313_l1},
/*h(2511)=1314 */ {2511, xed3_phash_find_map0x0F_opcode0x78_vv2_1314_l1},
/*h(25013)=1315 */ {25013, xed3_phash_find_map0x0F_opcode0x78_vv2_1315_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17871)=1317 */ {17871, xed3_phash_find_map0x0F_opcode0x78_vv2_1317_l1},
/*h(16884)=1318 */ {16884, xed3_phash_find_map0x0F_opcode0x78_vv2_1318_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(393)=1320 */ {393, xed3_phash_find_map0x0F_opcode0x78_vv2_1320_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26089)=1322 */ {26089, xed3_phash_find_map0x0F_opcode0x78_vv2_1322_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(14766)=1324 */ {14766, xed3_phash_find_map0x0F_opcode0x78_vv2_1324_l1},
/*h(8611)=1325 */ {8611, xed3_phash_find_map0x0F_opcode0x78_vv2_1325_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(482)=1327 */ {482, xed3_phash_find_map0x0F_opcode0x78_vv2_1327_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21997)=1329 */ {21997, xed3_phash_find_map0x0F_opcode0x78_vv2_1329_l1},
/*h(15842)=1330 */ {15842, xed3_phash_find_map0x0F_opcode0x78_vv2_1330_l1},
/*h(5506)=1331 */ {5506, xed3_phash_find_map0x0F_opcode0x78_vv2_1331_l1},
/*h(4519)=1332 */ {4519, xed3_phash_find_map0x0F_opcode0x78_vv2_1332_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26034)=1334 */ {26034, xed3_phash_find_map0x0F_opcode0x78_vv2_1334_l1},
/*h(25047)=1335 */ {25047, xed3_phash_find_map0x0F_opcode0x78_vv2_1335_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17905)=1337 */ {17905, xed3_phash_find_map0x0F_opcode0x78_vv2_1337_l1},
/*h(11750)=1338 */ {11750, xed3_phash_find_map0x0F_opcode0x78_vv2_1338_l1},
/*h(1414)=1339 */ {1414, xed3_phash_find_map0x0F_opcode0x78_vv2_1339_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21942)=1341 */ {21942, xed3_phash_find_map0x0F_opcode0x78_vv2_1341_l1},
/*h(16774)=1342 */ {16774, xed3_phash_find_map0x0F_opcode0x78_vv2_1342_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8645)=1344 */ {8645, xed3_phash_find_map0x0F_opcode0x78_vv2_1344_l1},
/*h(7658)=1345 */ {7658, xed3_phash_find_map0x0F_opcode0x78_vv2_1345_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29173)=1347 */ {29173, xed3_phash_find_map0x0F_opcode0x78_vv2_1347_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11695)=1350 */ {11695, xed3_phash_find_map0x0F_opcode0x78_vv2_1350_l1},
/*h(5540)=1351 */ {5540, xed3_phash_find_map0x0F_opcode0x78_vv2_1351_l1},
/*h(4553)=1352 */ {4553, xed3_phash_find_map0x0F_opcode0x78_vv2_1352_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20900)=1354 */ {20900, xed3_phash_find_map0x0F_opcode0x78_vv2_1354_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8590)=1357 */ {8590, xed3_phash_find_map0x0F_opcode0x78_vv2_1357_l1},
/*h(1448)=1358 */ {1448, xed3_phash_find_map0x0F_opcode0x78_vv2_1358_l1},
/*h(461)=1359 */ {461, xed3_phash_find_map0x0F_opcode0x78_vv2_1359_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16808)=1361 */ {16808, xed3_phash_find_map0x0F_opcode0x78_vv2_1361_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9666)=1363 */ {9666, xed3_phash_find_map0x0F_opcode0x78_vv2_1363_l1},
/*h(8679)=1364 */ {8679, xed3_phash_find_map0x0F_opcode0x78_vv2_1364_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25026)=1366 */ {25026, xed3_phash_find_map0x0F_opcode0x78_vv2_1366_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13703)=1368 */ {13703, xed3_phash_find_map0x0F_opcode0x78_vv2_1368_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4587)=1371 */ {4587, xed3_phash_find_map0x0F_opcode0x78_vv2_1371_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26102)=1373 */ {26102, xed3_phash_find_map0x0F_opcode0x78_vv2_1373_l1},
/*h(15766)=1374 */ {15766, xed3_phash_find_map0x0F_opcode0x78_vv2_1374_l1},
/*h(9611)=1375 */ {9611, xed3_phash_find_map0x0F_opcode0x78_vv2_1375_l1},
/*h(8624)=1376 */ {8624, xed3_phash_find_map0x0F_opcode0x78_vv2_1376_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24971)=1378 */ {24971, xed3_phash_find_map0x0F_opcode0x78_vv2_1378_l1},
/*h(495)=1379 */ {495, xed3_phash_find_map0x0F_opcode0x78_vv2_1379_l1},
/*h(17829)=1380 */ {17829, xed3_phash_find_map0x0F_opcode0x78_vv2_1380_l1},
/*h(16842)=1381 */ {16842, xed3_phash_find_map0x0F_opcode0x78_vv2_1381_l1},
/*h(15855)=1382 */ {15855, xed3_phash_find_map0x0F_opcode0x78_vv2_1382_l1},
/*h(4532)=1383 */ {4532, xed3_phash_find_map0x0F_opcode0x78_vv2_1383_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20879)=1386 */ {20879, xed3_phash_find_map0x0F_opcode0x78_vv2_1386_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5608)=1390 */ {5608, xed3_phash_find_map0x0F_opcode0x78_vv2_1390_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21955)=1393 */ {21955, xed3_phash_find_map0x0F_opcode0x78_vv2_1393_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9645)=1395 */ {9645, xed3_phash_find_map0x0F_opcode0x78_vv2_1395_l1},
/*h(8658)=1396 */ {8658, xed3_phash_find_map0x0F_opcode0x78_vv2_1396_l1},
/*h(2503)=1397 */ {2503, xed3_phash_find_map0x0F_opcode0x78_vv2_1397_l1},
/*h(25005)=1398 */ {25005, xed3_phash_find_map0x0F_opcode0x78_vv2_1398_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12695)=1400 */ {12695, xed3_phash_find_map0x0F_opcode0x78_vv2_1400_l1},
/*h(16876)=1401 */ {16876, xed3_phash_find_map0x0F_opcode0x78_vv2_1401_l1},
/*h(5553)=1402 */ {5553, xed3_phash_find_map0x0F_opcode0x78_vv2_1402_l1},
/*h(4566)=1403 */ {4566, xed3_phash_find_map0x0F_opcode0x78_vv2_1403_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21900)=1405 */ {21900, xed3_phash_find_map0x0F_opcode0x78_vv2_1405_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(14758)=1407 */ {14758, xed3_phash_find_map0x0F_opcode0x78_vv2_1407_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1461)=1410 */ {1461, xed3_phash_find_map0x0F_opcode0x78_vv2_1410_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21989)=1412 */ {21989, xed3_phash_find_map0x0F_opcode0x78_vv2_1412_l1},
/*h(16821)=1413 */ {16821, xed3_phash_find_map0x0F_opcode0x78_vv2_1413_l1},
/*h(10666)=1414 */ {10666, xed3_phash_find_map0x0F_opcode0x78_vv2_1414_l1},
/*h(9679)=1415 */ {9679, xed3_phash_find_map0x0F_opcode0x78_vv2_1415_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26026)=1417 */ {26026, xed3_phash_find_map0x0F_opcode0x78_vv2_1417_l1},
/*h(25039)=1418 */ {25039, xed3_phash_find_map0x0F_opcode0x78_vv2_1418_l1},
/*h(17897)=1419 */ {17897, xed3_phash_find_map0x0F_opcode0x78_vv2_1419_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6574)=1421 */ {6574, xed3_phash_find_map0x0F_opcode0x78_vv2_1421_l1},
/*h(5587)=1422 */ {5587, xed3_phash_find_map0x0F_opcode0x78_vv2_1422_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21934)=1424 */ {21934, xed3_phash_find_map0x0F_opcode0x78_vv2_1424_l1},
/*h(20947)=1425 */ {20947, xed3_phash_find_map0x0F_opcode0x78_vv2_1425_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13805)=1427 */ {13805, xed3_phash_find_map0x0F_opcode0x78_vv2_1427_l1},
/*h(7650)=1428 */ {7650, xed3_phash_find_map0x0F_opcode0x78_vv2_1428_l1},
/*h(1495)=1429 */ {1495, xed3_phash_find_map0x0F_opcode0x78_vv2_1429_l1},
/*h(29165)=1430 */ {29165, xed3_phash_find_map0x0F_opcode0x78_vv2_1430_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17842)=1432 */ {17842, xed3_phash_find_map0x0F_opcode0x78_vv2_1432_l1},
/*h(11687)=1433 */ {11687, xed3_phash_find_map0x0F_opcode0x78_vv2_1433_l1},
/*h(9713)=1434 */ {9713, xed3_phash_find_map0x0F_opcode0x78_vv2_1434_l1},
/*h(4545)=1435 */ {4545, xed3_phash_find_map0x0F_opcode0x78_vv2_1435_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25073)=1437 */ {25073, xed3_phash_find_map0x0F_opcode0x78_vv2_1437_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8582)=1439 */ {8582, xed3_phash_find_map0x0F_opcode0x78_vv2_1439_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5621)=1441 */ {5621, xed3_phash_find_map0x0F_opcode0x78_vv2_1441_l1},
/*h(453)=1442 */ {453, xed3_phash_find_map0x0F_opcode0x78_vv2_1442_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21968)=1444 */ {21968, xed3_phash_find_map0x0F_opcode0x78_vv2_1444_l1},
/*h(20981)=1445 */ {20981, xed3_phash_find_map0x0F_opcode0x78_vv2_1445_l1},
/*h(14826)=1446 */ {14826, xed3_phash_find_map0x0F_opcode0x78_vv2_1446_l1},
/*h(4490)=1447 */ {4490, xed3_phash_find_map0x0F_opcode0x78_vv2_1447_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26005)=1449 */ {26005, xed3_phash_find_map0x0F_opcode0x78_vv2_1449_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17876)=1451 */ {17876, xed3_phash_find_map0x0F_opcode0x78_vv2_1451_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10734)=1453 */ {10734, xed3_phash_find_map0x0F_opcode0x78_vv2_1453_l1},
/*h(4579)=1454 */ {4579, xed3_phash_find_map0x0F_opcode0x78_vv2_1454_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26094)=1456 */ {26094, xed3_phash_find_map0x0F_opcode0x78_vv2_1456_l1},
/*h(15758)=1457 */ {15758, xed3_phash_find_map0x0F_opcode0x78_vv2_1457_l1},
/*h(9603)=1458 */ {9603, xed3_phash_find_map0x0F_opcode0x78_vv2_1458_l1},
/*h(8616)=1459 */ {8616, xed3_phash_find_map0x0F_opcode0x78_vv2_1459_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1474)=1461 */ {1474, xed3_phash_find_map0x0F_opcode0x78_vv2_1461_l1},
/*h(487)=1462 */ {487, xed3_phash_find_map0x0F_opcode0x78_vv2_1462_l1},
/*h(22002)=1463 */ {22002, xed3_phash_find_map0x0F_opcode0x78_vv2_1463_l1},
/*h(16834)=1464 */ {16834, xed3_phash_find_map0x0F_opcode0x78_vv2_1464_l1},
/*h(15847)=1465 */ {15847, xed3_phash_find_map0x0F_opcode0x78_vv2_1465_l1},
/*h(4524)=1466 */ {4524, xed3_phash_find_map0x0F_opcode0x78_vv2_1466_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26039)=1468 */ {26039, xed3_phash_find_map0x0F_opcode0x78_vv2_1468_l1},
/*h(20871)=1469 */ {20871, xed3_phash_find_map0x0F_opcode0x78_vv2_1469_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17910)=1471 */ {17910, xed3_phash_find_map0x0F_opcode0x78_vv2_1471_l1},
/*h(7574)=1472 */ {7574, xed3_phash_find_map0x0F_opcode0x78_vv2_1472_l1},
/*h(5600)=1473 */ {5600, xed3_phash_find_map0x0F_opcode0x78_vv2_1473_l1},
/*h(432)=1474 */ {432, xed3_phash_find_map0x0F_opcode0x78_vv2_1474_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20960)=1476 */ {20960, xed3_phash_find_map0x0F_opcode0x78_vv2_1476_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9637)=1478 */ {9637, xed3_phash_find_map0x0F_opcode0x78_vv2_1478_l1},
/*h(7663)=1479 */ {7663, xed3_phash_find_map0x0F_opcode0x78_vv2_1479_l1},
/*h(30165)=1480 */ {30165, xed3_phash_find_map0x0F_opcode0x78_vv2_1480_l1},
/*h(24997)=1481 */ {24997, xed3_phash_find_map0x0F_opcode0x78_vv2_1481_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12687)=1483 */ {12687, xed3_phash_find_map0x0F_opcode0x78_vv2_1483_l1},
/*h(16868)=1484 */ {16868, xed3_phash_find_map0x0F_opcode0x78_vv2_1484_l1},
/*h(5545)=1485 */ {5545, xed3_phash_find_map0x0F_opcode0x78_vv2_1485_l1},
/*h(4558)=1486 */ {4558, xed3_phash_find_map0x0F_opcode0x78_vv2_1486_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 1488ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21892)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21892, 3890},
/*h(20905)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20905, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_3_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8595)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8595;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(466)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {466, 4433},
/*h(1453)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1453, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17800)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17800;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15826)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15826, 6174},
/*h(16813)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16813, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_9_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10658)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {10658, 5073},
/*h(9671)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9671, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8684)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8684, 4429},
/*h(4503)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4503, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26018)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26018, 3894},
/*h(30199)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30199, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25031)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25031;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_14_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17889)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17889;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6566)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6566, 5069},
/*h(11734)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {11734, 6172}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_17_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4592)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4592, 4435},
/*h(5579)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5579, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21926)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21926;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20939)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20939;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_22_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(9616)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9616, 3894},
/*h(13797)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13797, 6390},
/*h(8629)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8629, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2474)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2474;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1487)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1487;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29157)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29157, 4430},
/*h(24976)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24976, 6439},
/*h(500)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {500, 4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17834)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17834, 3889},
/*h(16847)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16847, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_29_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5524)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5524, 3890},
/*h(9705)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9705, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26052)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26052;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_32_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20884)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20884, 6442},
/*h(25065)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25065, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5613)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5613;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21960)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21960, 6388},
/*h(20973)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20973, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9650)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9650, 3894},
/*h(14818)=1 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {14818, 5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4482)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4482, 6443},
/*h(3495)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3495, 6168},
/*h(8663)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8663, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25010)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {25010, 6439},
/*h(1521)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1521, 6386},
/*h(25997)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25997, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17868)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17868;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_47_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16881)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16881;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5558)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5558, 3890},
/*h(10726)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10726, 5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_49_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(390)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 390;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_51_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26086)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26086, 6389},
/*h(21905)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21905, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_52_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15750)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15750, 6166},
/*h(20918)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20918, 6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_54_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8608)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8608, 6439},
/*h(12789)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12789, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_55_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6634)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6634;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21994)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21994, 6388},
/*h(17813)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {17813, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11658)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11658;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10671)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_61_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9684)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9684, 6389},
/*h(4516)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4516, 6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2542)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2542, 5069},
/*h(26031)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {26031, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_64_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25044)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25044;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17902)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_67_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7566)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7566;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1411)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1411;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(424)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 424;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21939)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21939;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16771)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16771;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8642)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8642;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_74_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3474)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3474, 6171},
/*h(7655)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7655, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_75_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30157)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30157;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_78_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17847)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {17847, 3893},
/*h(12679)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12679, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_80_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9718)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9718, 6389},
/*h(5537)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5537, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4550)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25078)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25078, 4429},
/*h(20897)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20897, 6443},
/*h(26065)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26065, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_84_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14742)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {5070}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14742;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8587)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8587;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_87_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1445)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1445;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(458)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 458;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_90_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17792)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17792, 3889},
/*h(21973)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {21973, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_91_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15818)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15818, 6170},
/*h(16805)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16805, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14831)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14831;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8676)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8676, 4429},
/*h(4495)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4495, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30191)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30191;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11726)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11726;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5571)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5571, 6388},
/*h(403)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {403, 6441},
/*h(4584)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4584, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26099)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26099;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_103_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20931)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20931;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_104_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9608)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9608;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8621)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8621;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2466)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2466, 5073},
/*h(7634)=1 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7634, 6174}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_107_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1479)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1479;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_108_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(492)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {492, 4432},
/*h(24968)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24968, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_109_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17826)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17826;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16839)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16839, 4430},
/*h(22007)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {22007, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_111_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11671)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6169}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5516)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5516, 3890},
/*h(9697)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9697, 6391},
/*h(4529)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4529, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3542)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6172}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_115_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20876)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20876, 6442},
/*h(25057)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25057, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_119_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1424)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1424, 3889},
/*h(5605)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5605, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_120_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(437)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 437;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20965)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20965, 4430},
/*h(21952)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21952, 6388},
/*h(16784)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16784, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_124_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9642)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9642;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8655)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8655;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_126_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25989)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25989;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_127_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25002)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {25002, 6439},
/*h(1513)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1513, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17860)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17860;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16873)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16873;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_131_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5550)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4563)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4563;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20910)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20910, 6442},
/*h(21897)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21897, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12781)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12781;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_138_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6626)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6626;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_139_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1458)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1458, 3889},
/*h(471)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {471, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21986)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21986, 6388},
/*h(17805)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {17805, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_142_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(11650)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11650, 6170},
/*h(15831)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {15831, 6173},
/*h(16818)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16818, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10663)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10663;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9676)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9676, 6389},
/*h(8689)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8689, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2534)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2534, 5069},
/*h(26023)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {26023, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_147_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25036)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25036;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17894)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_150_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7558)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_151_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(416)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {416, 6441},
/*h(5584)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5584, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_152_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4597)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4597;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21931)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21931;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_154_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20944)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20944;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_156_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9621)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9621;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_157_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3466)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3466;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_158_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2479)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2479, 5071},
/*h(30149)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30149, 6390},
/*h(1492)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1492, 6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_159_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24981)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24981;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_161_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16852)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16852, 4432},
/*h(17839)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {17839, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9710)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9710;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_166_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25070)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25070, 4429},
/*h(26057)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26057, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14734)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_169_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8579)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8579;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_171_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(450)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {450, 4433},
/*h(5618)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5618, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21965)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21965;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_174_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15810)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15810, 6170},
/*h(20978)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20978, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_175_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(10642)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {10642, 5074},
/*h(9655)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {9655, 3893},
/*h(14823)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14823, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_176_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4487)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4487;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(25015)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25015, 6438},
/*h(1526)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1526, 6385},
/*h(26002)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26002, 3894},
/*h(30183)=3 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30183, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_180_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17873)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17873;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_181_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11718)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {11718, 6166},
/*h(16886)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16886, 4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6550)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {5070}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4576)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4576, 4435},
/*h(395)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {395, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_185_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21910)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21910, 3890},
/*h(26091)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26091, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_187_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9600)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9600;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8613)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8613, 6438},
/*h(13781)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13781, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_189_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7626)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7626, 6170},
/*h(6639)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6639, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24960)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24960;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_191_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(484)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {484, 4432},
/*h(29141)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29141, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_193_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21999)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21999;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_194_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11663)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11663;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5508)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5508, 3890},
/*h(4521)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4521, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_196_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3534)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3534;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_197_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26036)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26036;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20868)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20868;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_200_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17907)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17907;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1416)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1416;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_203_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(429)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 429;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_205_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16776)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16776;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_206_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14802)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5077}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14802;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_207_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9634)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9634, 3894},
/*h(13815)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13815, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3479)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {3479, 6169},
/*h(8647)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8647, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_210_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29175)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29175, 4430},
/*h(24994)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24994, 6439},
/*h(1505)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1505, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_213_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16865)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16865;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_214_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10710)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {10710, 5075},
/*h(5542)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5542, 3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_215_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4555)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4555;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_217_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26070)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26070, 6389},
/*h(20902)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20902, 6442},
/*h(21889)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21889, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_220_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8592)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8592, 6439},
/*h(12773)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12773, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_222_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1450)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1450, 3889},
/*h(463)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {463, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_224_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17797)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17797;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_225_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16810)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16810, 6441},
/*h(15823)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {15823, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_227_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4500)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4500, 6442},
/*h(8681)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8681, 4431},
/*h(9668)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9668, 6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_230_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25028)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25028;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_234_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5576)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5576;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_235_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4589)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4589;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_236_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21923)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21923;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_237_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20936)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20936;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_239_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8626)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8626, 6439},
/*h(9613)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {9613, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_240_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3458)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3458, 6170},
/*h(7639)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {7639, 6173}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_241_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1484)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1484, 6385},
/*h(2471)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2471, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_242_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(497)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {497, 4433},
/*h(24973)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {24973, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_244_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16844)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16844, 4432},
/*h(17831)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {17831, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_246_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9702)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9702, 6389},
/*h(5521)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5521, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4534)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4534;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_249_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20881)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20881, 6443},
/*h(25062)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25062, 4429},
/*h(26049)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26049, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_250_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14726)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14726;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_253_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5610)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5610, 6388},
/*h(1429)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1429, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_256_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21957)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {21957, 6390},
/*h(16789)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16789, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_257_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20970)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_258_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10634)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {10634, 5073},
/*h(9647)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {9647, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_259_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8660)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8660;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_261_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25007)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25007, 6438},
/*h(25994)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25994, 3894},
/*h(1518)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1518, 6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_263_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17865)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17865;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_264_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16878)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16878;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_265_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6542)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_266_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(387)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {387, 6441},
/*h(5555)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5555, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_268_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21902)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21902, 3890},
/*h(26083)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26083, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_269_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20915)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20915;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_271_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13773)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13773;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_272_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2450)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2450, 5074},
/*h(6631)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6631, 5071},
/*h(7618)=2 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7618, 6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_273_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1463)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1463;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29133)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29133;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_275_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17810)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17810, 3889},
/*h(21991)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {21991, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_276_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11655)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {11655, 6168},
/*h(16823)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16823, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_278_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(9681)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9681, 6391},
/*h(4513)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4513, 6443},
/*h(8694)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8694, 4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_279_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3526)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_280_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26028)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26028;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_281_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25041)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25041;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_283_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17899)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17899;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_285_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1408)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1408, 3889},
/*h(5589)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5589, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_286_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(421)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 421;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21936)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21936, 3891},
/*h(16768)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16768, 6441},
/*h(20949)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20949, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_289_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14794)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14794;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_290_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13807)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_291_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3471)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3471;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_293_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29167)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29167;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_295_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17844)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17844;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_297_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10702)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10702, 5069},
/*h(9715)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9715, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_298_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4547)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4547;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_300_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26062)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26062, 6389},
/*h(25075)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25075, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_303_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8584)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8584;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_304_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6610)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5077}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6610;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_305_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(455)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {455, 4430},
/*h(5623)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5623, 6390},
/*h(1442)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1442, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_307_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21970)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_308_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(16802)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16802, 6441},
/*h(15815)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {15815, 6168},
/*h(20983)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20983, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_309_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10647)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {5072}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10647;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_310_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4492)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4492, 6442},
/*h(8673)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8673, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_311_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2518)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5075}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2518;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_312_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26007)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26007;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_314_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17878)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17878;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_317_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(400)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {400, 6441},
/*h(4581)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4581, 4430},
/*h(5568)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5568, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_319_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26096)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26096;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_320_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20928)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20928;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_322_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8618)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8618, 6439},
/*h(9605)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {9605, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_323_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7631)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7631;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_324_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1476)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1476, 6385},
/*h(30133)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30133, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_325_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(489)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {489, 4433},
/*h(24965)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {24965, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_327_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16836)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16836, 4432},
/*h(22004)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {22004, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_329_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5513)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5513;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_330_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4526)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_332_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20873)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20873;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_336_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5602)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5602, 6388},
/*h(1421)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1421, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_337_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(434)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 434;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_339_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20962)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20962, 4435},
/*h(16781)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16781, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_340_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10626)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10626;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_341_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9639)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {9639, 3893},
/*h(14807)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {14807, 5076}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_342_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8652)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8652;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_344_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(1510)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1510, 6385},
/*h(30167)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30167, 6390},
/*h(24999)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {24999, 6438},
/*h(25986)=3 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25986, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_346_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17857)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17857;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_347_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16870)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16870;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_348_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6534)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6534, 5069},
/*h(5547)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5547, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_349_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4560)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4560;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_351_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21894)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_352_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20907)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20907;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_353_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13765)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13765;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_354_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8597)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8597;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_355_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2442)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2442;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_356_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1455)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1455, 3893},
/*h(468)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {468, 4432},
/*h(29125)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29125, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_358_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17802)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17802;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_359_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16815)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_361_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8686)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8686, 4429},
/*h(9673)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9673, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_363_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26020)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26020;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_364_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25033)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25033;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_366_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17891)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17891;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_368_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5581)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5581;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_369_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4594)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4594;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_370_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21928)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21928;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_371_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20941)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20941;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_372_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14786)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14786;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_373_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9618)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9618, 3894},
/*h(13799)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13799, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_374_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8631)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8631, 6438},
/*h(3463)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3463, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_375_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1489)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1489;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_376_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(24978)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24978, 6439},
/*h(502)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {502, 4432},
/*h(29159)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29159, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_378_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17836)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17836, 3888},
/*h(16849)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16849, 4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_380_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5526)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5526, 3890},
/*h(9707)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9707, 6391},
/*h(10694)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10694, 5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_383_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20886)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20886, 6442},
/*h(25067)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25067, 4431},
/*h(26054)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26054, 6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_386_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8576)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8576, 6439},
/*h(12757)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12757, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_387_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6602)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6602;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_388_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5615)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5615;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_390_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21962)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_391_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20975)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20975;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_392_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9652)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9652, 3892},
/*h(10639)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10639, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_393_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4484)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4484;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_394_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2510)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2510;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_395_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25012)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25012, 6437},
/*h(25999)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25999, 3893},
/*h(1523)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1523, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_397_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17870)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17870;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_398_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16883)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16883;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_400_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(392)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 392;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_402_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26088)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26088, 6391},
/*h(21907)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21907, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_405_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8610)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8610, 6439},
/*h(12791)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12791, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_406_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7623)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7623, 6168},
/*h(2455)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {2455, 5072}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_407_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30125)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30125;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_408_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(481)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 481;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_409_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17815)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_410_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21996)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21996;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_412_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9686)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9686, 6389},
/*h(5505)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5505, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_413_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4518)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4518;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_414_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26033)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26033;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_415_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25046)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25046, 4429},
/*h(20865)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20865, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_417_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17904)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17904;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_419_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1413)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1413;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_420_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(426)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 426;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_422_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16773)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16773, 6438},
/*h(21941)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21941, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_423_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15786)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15786;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_424_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14799)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14799;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_425_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8644)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8644;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_427_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30159)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30159;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_430_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11694)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11694;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_431_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5539)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5539;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_432_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4552)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4552;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_434_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26067)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26067, 6391},
/*h(20899)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20899, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_437_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8589)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8589;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_438_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2434)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2434, 5073},
/*h(6615)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6615, 5076}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_439_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(460)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {460, 4432},
/*h(1447)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1447, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_441_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17794)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17794, 3889},
/*h(21975)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {21975, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_442_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16807)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_444_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8678)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8678, 4429},
/*h(4497)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4497, 6443},
/*h(9665)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9665, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_447_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25025)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25025;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_451_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5573)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5573;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_452_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4586)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4586, 4435},
/*h(405)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {405, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_453_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21920)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21920;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_454_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20933)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20933, 4430},
/*h(26101)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {26101, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_456_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9610)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9610, 3894},
/*h(8623)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8623, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_458_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1481)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1481;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_459_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(494)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {494, 4432},
/*h(24970)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24970, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_461_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17828)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17828, 3888},
/*h(16841)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16841, 4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_462_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15854)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15854;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_463_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5518)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5518, 3890},
/*h(9699)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9699, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_464_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4531)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4531;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_466_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20878)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20878, 6442},
/*h(25059)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25059, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_469_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12749)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12749;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_470_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6594)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6594, 5073},
/*h(1426)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1426, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_471_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5607)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5607, 6390},
/*h(439)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {439, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_473_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21954)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21954, 6388},
/*h(16786)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16786, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_474_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20967)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20967;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_475_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9644)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9644, 3892},
/*h(10631)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10631, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_476_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8657)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8657;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_477_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2502)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2502;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_478_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1515)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1515, 6386},
/*h(25004)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25004, 6437},
/*h(25991)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25991, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((10*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_480_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17862)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17862;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_481_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16875)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16875;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_483_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4565)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4565, 4430},
/*h(5552)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5552, 3891},
/*h(384)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {384, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_485_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26080)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26080, 6391},
/*h(21899)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21899, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_486_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20912)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20912;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_488_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12783)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12783;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_489_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2447)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2447;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_490_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1460)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1460, 3888},
/*h(30117)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30117, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_492_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17807)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_493_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16820)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16820, 6440},
/*h(21988)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21988, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_495_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9678)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9678;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_496_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8691)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8691;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_497_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26025)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26025;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_498_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25038)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25038;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_500_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17896)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17896;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_502_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5586)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_503_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(418)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {418, 6441},
/*h(4599)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4599, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_505_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20946)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20946, 4435},
/*h(21933)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21933, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_506_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15778)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15778;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_507_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9623)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {9623, 3893},
/*h(14791)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14791, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_510_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1494)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1494, 6385},
/*h(30151)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30151, 6390},
/*h(24983)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {24983, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_512_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17841)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17841;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_513_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16854)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16854, 4432},
/*h(11686)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {11686, 6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_514_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9712)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_515_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4544)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4544;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_517_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26059)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26059;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_518_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25072)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25072;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_519_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13749)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13749;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_520_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7594)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7594, 6170},
/*h(8581)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8581, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_521_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6607)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6607;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_522_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29109)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29109, 6438},
/*h(5620)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5620, 6387},
/*h(452)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {452, 4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_524_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21967)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21967;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_525_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20980)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20980;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_527_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4489)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4489;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_528_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3502)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3502;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_529_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26004)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26004;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_532_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17875)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17875;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_534_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(397)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 397;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_535_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4578)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4578;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_536_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26093)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26093;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_539_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(13783)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13783, 6390},
/*h(9602)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9602, 3894},
/*h(8615)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8615, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_541_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1473)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1473;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_542_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(486)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {486, 4432},
/*h(29143)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29143, 4430},
/*h(24962)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24962, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_544_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16833)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16833, 4433},
/*h(22001)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {22001, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_545_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15846)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_546_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5510)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5510;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_547_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4523)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4523;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_549_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20870)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20870, 6442},
/*h(26038)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {26038, 3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_551_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17909)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_552_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11754)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11754, 6170},
/*h(12741)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12741, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_553_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1418)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1418;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_554_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(431)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 431;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_556_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16778)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16778;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_557_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15791)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15791;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_558_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9636)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9636;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_559_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8649)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8649;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_560_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7662)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_561_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24996)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24996, 6437},
/*h(1507)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1507, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_564_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16867)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16867;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_566_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5544)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5544, 3891},
/*h(4557)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4557, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_568_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21891)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21891;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_569_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20904)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20904;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_571_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8594)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8594, 6439},
/*h(12775)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12775, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_572_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2439)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2439;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_573_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1452)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1452;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_574_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(465)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 465;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_575_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17799)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17799;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_576_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16812)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16812;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_578_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4502)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4502, 6442},
/*h(9670)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9670, 6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_579_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8683)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8683;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_580_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26017)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26017;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_581_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25030)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_583_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17888)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17888;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_585_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5578)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5578;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_586_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4591)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4591;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_588_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20938)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20938, 4435},
/*h(21925)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21925, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_590_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9615)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9615;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_591_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8628)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8628;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_592_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1486)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1486;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_593_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24975)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {24975, 6438},
/*h(499)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {499, 4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_595_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17833)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17833;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_596_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16846)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_597_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9704)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9704, 6391},
/*h(5523)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5523, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_600_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26051)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26051, 6391},
/*h(20883)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20883, 6443},
/*h(25064)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25064, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_602_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13741)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13741;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_603_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7586)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_604_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6599)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6599;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_605_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1431)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1431, 3893},
/*h(29101)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29101, 6438},
/*h(5612)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5612, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_607_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21959)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21959;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_608_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20972)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20972, 4434},
/*h(16791)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16791, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_610_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4481)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4481, 6443},
/*h(8662)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8662, 4429},
/*h(9649)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9649, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_611_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3494)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3494;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_612_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1520)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1520, 6386},
/*h(25996)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25996, 3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_613_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25009)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25009;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_614_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17867)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17867;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_615_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16880)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16880;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_617_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(389)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {389, 6438},
/*h(5557)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5557, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_619_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21904)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21904, 3891},
/*h(26085)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {26085, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_620_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20917)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20917;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_621_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14762)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_622_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13775)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13775;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_625_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29135)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29135;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_627_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17812)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17812, 3888},
/*h(21993)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21993, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_628_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10670)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_629_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9683)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9683;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_630_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4515)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4515;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_631_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26030)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_632_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25043)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25043;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_634_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17901)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17901;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_635_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11746)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_636_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1410)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1410, 3889},
/*h(5591)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5591, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_637_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(423)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 423;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_639_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(16770)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16770, 6441},
/*h(20951)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20951, 4430},
/*h(21938)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21938, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_640_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15783)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15783;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_642_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8641)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8641;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_643_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7654)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_646_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17846)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_649_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5536)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5536, 3891},
/*h(9717)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9717, 6390},
/*h(4549)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4549, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_650_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3562)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_651_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26064)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26064;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_652_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20896)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20896, 6443},
/*h(25077)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25077, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_654_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8586)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_655_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7599)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7599;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_656_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1444)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1444, 3888},
/*h(30101)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30101, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_657_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(457)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 457;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_658_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21972)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21972;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_659_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16804)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16804;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_660_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14830)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14830;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_661_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4494)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4494, 6442},
/*h(8675)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8675, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_668_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5570)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5570;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_669_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(402)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {402, 6441},
/*h(4583)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4583, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_671_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20930)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20930, 4435},
/*h(26098)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26098, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_672_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15762)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {6171}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_673_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9607)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9607;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_674_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8620)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8620;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_675_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1478)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1478, 6385},
/*h(30135)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30135, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_676_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(491)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {491, 4433},
/*h(24967)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {24967, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_678_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(17825)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17825, 3889},
/*h(22006)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {22006, 6387},
/*h(16838)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {16838, 4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_679_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11670)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6167}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_680_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9696)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9696, 6391},
/*h(5515)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5515, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_681_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4528)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4528;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_683_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25056)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25056, 4431},
/*h(20875)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20875, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_685_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13733)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13733;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_686_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11759)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11759;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_688_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(436)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {436, 6440},
/*h(1423)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {1423, 3893},
/*h(29093)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29093, 6438},
/*h(5604)=3 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5604, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_691_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20964)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20964, 4434},
/*h(16783)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16783, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_692_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9641)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9641;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_693_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8654)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_695_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1512)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1512, 6386},
/*h(25988)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25988, 3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_696_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25001)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25001;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_697_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17859)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17859;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_698_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16872)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16872;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_700_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4562)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4562, 4435},
/*h(5549)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5549, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_702_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21896)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21896;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_703_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20909)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_704_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14754)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14754;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_705_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(13767)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13767, 6390},
/*h(8599)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8599, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_707_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1457)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1457;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_708_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(470)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {470, 4432},
/*h(29127)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29127, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_709_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17804)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17804;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_710_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16817)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16817, 6441},
/*h(21985)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21985, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_711_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10662)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {10662, 5069},
/*h(15830)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {15830, 6172}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_712_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9675)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9675;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_713_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8688)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8688;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_714_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26022)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26022;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_715_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25035)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25035;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_717_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(12725)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12725, 6438},
/*h(17893)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {17893, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_719_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6570)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6570, 5073},
/*h(5583)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5583, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_720_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4596)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4596;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_722_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21930)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21930, 3891},
/*h(20943)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20943, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_724_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9620)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9620;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_726_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2478)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2478;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_727_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24980)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24980, 6437},
/*h(1491)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1491, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_729_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17838)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17838;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_730_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16851)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16851;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_732_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9709)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9709;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_733_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3554)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3554;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_734_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26056)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26056;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_735_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25069)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25069;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_737_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8578)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8578, 6439},
/*h(12759)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12759, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_738_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7591)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7591;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_739_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(30093)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30093, 3893},
/*h(5617)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5617, 6388},
/*h(449)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {449, 4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_741_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21964)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21964;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_742_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20977)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20977;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_743_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14822)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14822;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_744_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9654)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9654, 3892},
/*h(4486)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4486, 6442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_746_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26001)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26001, 3894},
/*h(1525)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1525, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_747_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25014)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25014;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_749_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17872)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17872, 6386},
/*h(16885)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16885, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_750_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10730)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_752_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(394)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 394;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_753_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21909)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_754_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26090)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26090;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_755_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15754)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15754, 6170},
/*h(14767)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14767, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_756_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8612)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8612;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_758_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6638)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6638, 5069},
/*h(30127)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30127, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_759_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(483)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 483;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_761_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21998)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_762_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11662)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_763_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5507)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5507;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_764_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4520)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4520;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_766_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20867)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20867, 6443},
/*h(26035)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26035, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_768_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17906)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17906;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_769_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7570)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7570, 6171},
/*h(11751)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {11751, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_770_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1415)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1415;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_771_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(428)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 428;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_773_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16775)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {16775, 6438},
/*h(21943)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21943, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_775_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9633)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9633;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_776_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8646)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8646;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_777_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3478)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6167}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3478;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_778_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1504)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1504, 6386},
/*h(24993)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24993, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_781_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16864)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16864;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_783_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4554)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4554, 4435},
/*h(5541)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5541, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_784_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3567)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3567;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_785_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21888)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21888, 3891},
/*h(26069)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {26069, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_786_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20901)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20901;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_788_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8591)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8591;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_790_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1449)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1449;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_791_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(462)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 462;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_792_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17796)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17796;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_793_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16809)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16809;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_794_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15822)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15822;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_795_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4499)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4499, 6443},
/*h(9667)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9667, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_796_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8680)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8680;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_798_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25027)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25027;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_800_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12717)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12717;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_801_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11730)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {6174}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_802_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6562)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6562, 5073},
/*h(5575)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5575, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_803_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4588)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4588, 4434},
/*h(407)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {407, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_805_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26103)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {26103, 6390},
/*h(21922)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21922, 3891},
/*h(20935)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {20935, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_806_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15767)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6169}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15767;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_807_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9612)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9612;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_808_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7638)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {7638, 6172},
/*h(8625)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8625, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_809_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2470)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2470;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_810_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(24972)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24972, 6437},
/*h(496)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {496, 4433},
/*h(1483)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1483, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_812_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17830)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17830;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_813_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16843)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16843;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_814_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5520)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5520;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_815_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4533)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4533, 6438},
/*h(9701)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9701, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_817_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20880)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20880, 6443},
/*h(26048)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26048, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_818_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25061)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25061;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_820_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12751)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12751;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_822_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1428)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1428, 3888},
/*h(30085)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30085, 3893},
/*h(5609)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5609, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_824_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21956)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21956;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_825_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16788)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16788, 6440},
/*h(20969)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20969, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_827_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9646)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9646, 3892},
/*h(8659)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8659, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_829_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1517)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1517, 6390},
/*h(25993)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25993, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_830_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25006)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_832_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17864)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17864, 6386},
/*h(16877)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16877, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_833_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10722)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_834_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(386)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {386, 6441},
/*h(5554)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5554, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_835_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4567)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4567;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_836_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26082)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26082, 6391},
/*h(21901)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21901, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_837_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20914)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20914;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_838_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15746)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {15746, 6170},
/*h(14759)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {14759, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_841_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(6630)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6630, 5069},
/*h(1462)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1462, 3888},
/*h(30119)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30119, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_844_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21990)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21990, 6387},
/*h(16822)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16822, 6440},
/*h(17809)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17809, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_845_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11654)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_846_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9680)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9680;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_847_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4512)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4512, 6443},
/*h(8693)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8693, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_848_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2538)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_849_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25040)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25040, 4431},
/*h(26027)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26027, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_851_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17898)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17898, 6386},
/*h(13717)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13717, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_852_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7562)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_853_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6575)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6575;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_854_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(420)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {420, 6440},
/*h(29077)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29077, 6438},
/*h(5588)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5588, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_856_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21935)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21935;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_857_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20948)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20948;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_859_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3470)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3470;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_863_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17843)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17843;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_866_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9714)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9714, 6391},
/*h(4546)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4546, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_867_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3559)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3559;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_868_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26061)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26061;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_869_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25074)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25074;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_870_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14738)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5074}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_871_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8583)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8583, 6438},
/*h(13751)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13751, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_873_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5622)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5622, 6387},
/*h(1441)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1441, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_874_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(454)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {454, 4432},
/*h(29111)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29111, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_875_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21969)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21969;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_876_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20982)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20982, 4434},
/*h(16801)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16801, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_877_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10646)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {10646, 5070},
/*h(15814)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15814, 6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_878_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4491)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4491;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_879_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8672)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8672;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_880_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26006)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_883_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17877)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {17877, 6390},
/*h(12709)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12709, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_884_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11722)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_885_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10735)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10735;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_886_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4580)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4580, 4434},
/*h(399)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {399, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_888_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26095)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26095;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_889_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15759)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15759;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_890_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9604)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9604;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_891_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7630)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {7630, 6166},
/*h(8617)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8617, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_892_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1475)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1475;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_893_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(488)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {488, 4433},
/*h(24964)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24964, 6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_895_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(22003)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 22003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_896_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16835)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16835;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_897_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5512)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5512;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_898_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4525)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4525;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_899_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3538)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {6174}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_900_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20872)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20872;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_902_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17911)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_903_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7575)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {7575, 6169},
/*h(12743)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {12743, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_905_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1420)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1420, 3888},
/*h(5601)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5601, 6388},
/*h(433)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {433, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_908_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16780)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16780, 6440},
/*h(20961)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20961, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_909_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14806)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5075}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14806;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_910_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9638)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9638, 3892},
/*h(8651)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8651, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_912_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1509)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1509, 6390},
/*h(25985)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25985, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_913_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24998)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_914_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17856)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17856;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_915_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16869)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16869;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_917_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5546)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5546;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_918_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4559)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4559;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_919_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21893)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21893;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_920_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20906)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20906;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_922_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8596)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8596;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_924_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1454)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1454;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_925_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(467)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 467;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_927_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16814)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16814, 6440},
/*h(17801)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17801, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_929_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9672)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9672;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_930_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8685)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8685;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_931_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2530)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2530;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_932_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25032)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25032, 4431},
/*h(26019)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26019, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_934_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17890)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17890, 6386},
/*h(13709)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13709, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_935_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7554)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {7554, 6170},
/*h(11735)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {11735, 6173}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_936_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5580)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5580, 6387},
/*h(6567)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6567, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_937_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4593)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4593, 4435},
/*h(29069)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29069, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_939_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21927)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21927;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_940_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20940)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20940;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_941_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9617)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9617;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_942_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3462)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3462, 6166},
/*h(8630)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {8630, 6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_944_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(24977)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24977, 6439},
/*h(501)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {501, 4430},
/*h(1488)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1488, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_946_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17835)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17835;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_947_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16848)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16848;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_949_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9706)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9706, 6391},
/*h(5525)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5525, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_951_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26053)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26053;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_952_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25066)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25066, 4431},
/*h(20885)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20885, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_953_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(14730)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {14730, 5073},
/*h(13743)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13743, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_956_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5614)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_957_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29103)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29103;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_958_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21961)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21961;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_959_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20974)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20974;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_960_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10638)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10638;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_961_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9651)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9651, 3894},
/*h(4483)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4483, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_963_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25998)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25998, 3892},
/*h(1522)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1522, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_964_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25011)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25011;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_966_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16882)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16882, 4433},
/*h(17869)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {17869, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_967_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6546)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {6546, 5074},
/*h(11714)=1 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11714, 6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_968_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5559)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5559, 3893},
/*h(10727)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10727, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_969_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(391)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 391;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_971_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21906)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21906, 3891},
/*h(26087)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {26087, 6390},
/*h(20919)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20919, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_972_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15751)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15751;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_974_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7622)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {7622, 6166},
/*h(8609)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {8609, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_975_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2454)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {5070}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2454;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_976_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(480)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 480;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_978_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17814)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17814, 3888},
/*h(21995)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21995, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_980_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5504)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5504, 3891},
/*h(9685)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9685, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_981_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4517)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4517;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_982_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3530)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3530, 6170},
/*h(2543)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2543, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_983_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25045)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25045, 4430},
/*h(26032)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26032, 3894},
/*h(20864)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20864, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_985_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17903)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17903;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_986_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7567)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7567;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_988_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1412)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1412, 3888},
/*h(425)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {425, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_990_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21940)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21940;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_991_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16772)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16772;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_992_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14798)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14798;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_993_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8643)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8643;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_999_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10706)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {5077}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10706;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1000_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4551)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4551, 4430},
/*h(5538)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5538, 3891},
/*h(9719)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9719, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1002_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26066)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26066;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1003_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20898)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20898, 6443},
/*h(25079)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25079, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1004_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14743)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {5072}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14743;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1005_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8588)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8588;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1007_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1446)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1446, 3888},
/*h(30103)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30103, 3893},
/*h(6614)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6614, 5075}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1008_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(459)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 459;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1009_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17793)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17793;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1010_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16806)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16806, 6440},
/*h(21974)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21974, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1012_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9664)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9664;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1013_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4496)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4496, 6443},
/*h(8677)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8677, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1015_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25024)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25024;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1017_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13701)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13701;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1018_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11727)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11727;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1019_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5572)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5572;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1020_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(29061)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29061, 6438},
/*h(4585)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4585, 4435},
/*h(404)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {404, 6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1022_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26100)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26100, 6389},
/*h(20932)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20932, 4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1024_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9609)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9609;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1025_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8622)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8622;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1027_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1480)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1480, 6386},
/*h(493)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {493, 4430},
/*h(24969)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24969, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1029_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17827)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17827;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1030_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16840)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16840;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1031_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5517)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5517;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1032_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4530)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4530, 6443},
/*h(9698)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {9698, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1033_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3543)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6173}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3543;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1035_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25058)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25058, 4431},
/*h(20877)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20877, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1036_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(14722)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {14722, 5073},
/*h(13735)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13735, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1039_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(29095)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29095, 6438},
/*h(438)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {438, 6440},
/*h(5606)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5606, 6387},
/*h(1425)=3 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1425, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1041_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21953)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21953;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1042_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20966)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20966, 4434},
/*h(16785)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16785, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1043_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10630)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10630;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1044_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8656)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8656, 4431},
/*h(9643)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9643, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1046_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1514)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1514, 6386},
/*h(25990)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {25990, 3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1047_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25003)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1049_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(17861)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {17861, 6390},
/*h(12693)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12693, 6438},
/*h(16874)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16874, 4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1050_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6538)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1051_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5551)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5551;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1052_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4564)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4564;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1053_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21898)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21898;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1054_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20911)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1058_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2446)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2446, 5069},
/*h(1459)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1459, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1061_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(17806)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17806, 3888},
/*h(21987)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21987, 6388},
/*h(16819)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16819, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1063_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9677)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9677;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1064_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3522)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3522, 6170},
/*h(8690)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8690, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1065_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2535)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2535;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1066_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26024)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26024, 3894},
/*h(25037)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25037, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1068_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17895)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17895;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1069_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7559)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7559, 6168},
/*h(12727)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12727, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1071_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4598)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4598, 4434},
/*h(5585)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5585, 6388},
/*h(417)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {417, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1073_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21932)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21932;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1074_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20945)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20945;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1075_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(14790)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {14790, 5069},
/*h(9622)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {9622, 3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1078_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24982)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24982, 6437},
/*h(1493)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1493, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1080_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17840)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17840;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1081_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16853)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16853;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1082_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10698)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10698;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1083_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9711)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9711;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1085_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26058)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26058;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1086_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25071)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25071;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1087_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14735)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14735;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1088_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8580)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8580;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1090_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5619)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5619, 6388},
/*h(30095)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30095, 3893},
/*h(6606)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6606, 5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1091_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(451)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 451;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1093_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21966)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {21966, 6387},
/*h(20979)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20979, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1095_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4488)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4488;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1097_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1527)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1527, 6390},
/*h(2514)=1 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE*/ {2514, 5077},
/*h(26003)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26003, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1100_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17874)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17874;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1101_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16887)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16887, 4430},
/*h(11719)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {11719, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6551)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0  NOEVSR  ZEROING=0 MASK=0 EVEXRR_ONE*/ {5072}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6551;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1103_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(396)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {396, 6440},
/*h(4577)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4577, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1105_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26092)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26092, 6389},
/*h(21911)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21911, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1107_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9601)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9601;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1108_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8614)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(485)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {485, 4430},
/*h(24961)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24961, 6439},
/*h(1472)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1472, 6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1112_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(22000)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 22000;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16832)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16832;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1114_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5509)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5509;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1115_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4522)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4522;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1116_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3535)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3535;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1117_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26037)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {26037, 3893},
/*h(20869)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20869, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1119_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17908)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17908;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1122_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(430)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {430, 6440},
/*h(1417)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1417, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1125_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(15790)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15790, 6166},
/*h(16777)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16777, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1127_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8648)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8648, 4431},
/*h(9635)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9635, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1129_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1506)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24995)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24995;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1132_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16866)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16866, 4433},
/*h(12685)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12685, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1133_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6530)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {6530, 5073},
/*h(10711)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {10711, 5076}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1134_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5543)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5543;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1135_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4556)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4556;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1136_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21890)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21890;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1137_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20903)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20903, 6438},
/*h(26071)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {26071, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1139_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8593)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8593;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2438)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {2438, 5069},
/*h(1451)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1451, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1142_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(464)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 464;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1144_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17798)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {17798, 3888},
/*h(16811)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16811, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1146_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9669)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9669;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1147_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8682)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8682, 4431},
/*h(4501)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4501, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1149_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(26016)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26016, 3894},
/*h(30197)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30197, 6390},
/*h(25029)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25029, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1152_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12719)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12719;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1154_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4590)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4590, 4434},
/*h(5577)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5577, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1156_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21924)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21924;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1157_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20937)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20937;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1158_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9614)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1159_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8627)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8627;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1161_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24974)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24974, 6437},
/*h(1485)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1485, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1162_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(498)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 498;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17832)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17832;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1164_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16845)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16845;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10690)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10690;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1166_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5522)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5522, 3891},
/*h(4535)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4535, 6438},
/*h(9703)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9703, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1168_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26050)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26050;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1169_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20882)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20882, 6443},
/*h(25063)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25063, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1170_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14727)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14727;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1172_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6598)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1173_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(30087)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {30087, 3893},
/*h(5611)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5611, 6388},
/*h(1430)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1430, 3888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1175_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21958)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21958;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1176_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16790)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16790, 6440},
/*h(20971)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20971, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9648)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9648, 3894},
/*h(4480)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4480, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1179_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8661)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8661;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1180_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2506)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2506, 5073},
/*h(1519)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1519, 6390},
/*h(25995)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25995, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1181_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25008)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25008;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17866)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17866, 6386},
/*h(16879)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16879, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1185_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5556)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {5556, 3890},
/*h(6543)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6543, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1186_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(388)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 388;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1188_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20916)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20916, 6442},
/*h(21903)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21903, 3893},
/*h(26084)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26084, 6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21992)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21992, 6388},
/*h(17811)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17811, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1197_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9682)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9682;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1198_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4514)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4514, 6443},
/*h(8695)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8695, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1199_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3527)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3527;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1200_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26029)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26029;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1201_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25042)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25042;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1202_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17900)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {17900, 6385},
/*h(13719)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13719, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1205_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(5590)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5590, 6387},
/*h(422)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {422, 6440},
/*h(1409)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1409, 3889},
/*h(29079)=3 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29079, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1207_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21937)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21937;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1208_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(20950)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20950, 4434},
/*h(15782)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {15782, 6166},
/*h(16769)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16769, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1210_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8640)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8640;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1214_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17845)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17845;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1215_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12677)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12677;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1216_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11690)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11690, 6170},
/*h(10703)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10703, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1217_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9716)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9716;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1218_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4548)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4548;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1219_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26063)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26063;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1220_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25076)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25076;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1222_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8585)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8585;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1223_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7598)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1224_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1443)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1443;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1225_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(456)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1227_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16803)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16803, 6441},
/*h(21971)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21971, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1230_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8674)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8674, 4431},
/*h(4493)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4493, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1231_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2519)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {5076}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2519;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1232_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(30189)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 30189;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1234_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17879)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17879;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1235_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12711)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12711;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1236_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5569)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5569;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1237_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4582)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4582, 4434},
/*h(401)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {401, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1239_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26097)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26097;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1240_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20929)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20929;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1241_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9606)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {3892}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1242_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8619)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8619;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1244_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(490)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {490, 4433},
/*h(24966)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {24966, 6437},
/*h(1477)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1477, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1246_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17824)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17824, 3889},
/*h(22005)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {22005, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16837)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16837;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1248_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15850)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15850;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1249_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5514)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {5514, 3891},
/*h(4527)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4527, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1252_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20874)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20874;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1255_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11758)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1256_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1422)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1422, 3888},
/*h(5603)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5603, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1257_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(435)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 435;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1259_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16782)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {16782, 6440},
/*h(20963)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20963, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1261_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9640)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9640, 3894},
/*h(8653)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8653, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1263_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(25987)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25987, 3894},
/*h(1511)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {1511, 6390},
/*h(2498)=2 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {2498, 5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1264_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25000)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25000;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1266_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17858)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {17858, 6386},
/*h(16871)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16871, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1267_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6535)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6535;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1268_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5548)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5548;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1269_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4561)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4561;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1271_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20908)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20908, 6442},
/*h(21895)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {21895, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8598)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1275_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1456)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1456;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1276_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(469)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 469;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1278_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21984)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21984, 6388},
/*h(17803)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17803, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1279_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16816)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16816;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1280_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9674)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9674;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1281_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8687)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1283_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25034)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25034, 4431},
/*h(26021)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {26021, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1285_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17892)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {17892, 6385},
/*h(13711)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13711, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4595)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4595, 4435},
/*h(29071)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29071, 6438},
/*h(5582)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5582, 6387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1290_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21929)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21929;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1291_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20942)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1292_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9619)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9619;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1295_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1490)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1490;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1296_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(503)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {503, 4430},
/*h(24979)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24979, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1297_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17837)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17837;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1298_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16850)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16850;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1299_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11682)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {11682, 6170},
/*h(10695)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {10695, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1300_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9708)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9708, 6389},
/*h(5527)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5527, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1302_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26055)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26055;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1303_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25068)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25068, 4429},
/*h(20887)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20887, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1305_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8577)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8577;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1306_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7590)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1307_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5616)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5616;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1308_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(448)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 448;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1310_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20976)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20976, 4435},
/*h(21963)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21963, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1312_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9653)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9653;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1313_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3498)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3498, 6170},
/*h(4485)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4485, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1314_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26000)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {26000, 3894},
/*h(2511)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2511, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1315_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1524)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1524, 6385},
/*h(30181)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30181, 6390},
/*h(25013)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25013, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1317_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17871)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17871;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1318_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16884)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16884;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1320_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(393)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 393;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1322_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(21908)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21908, 3890},
/*h(26089)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26089, 6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1324_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14766)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14766;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1325_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8611)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8611;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1327_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(482)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 482;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1329_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21997)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21997;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1330_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15842)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15842;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1331_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5506)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1332_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(9687)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9687, 6390},
/*h(4519)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4519, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1334_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26034)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26034;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1335_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20866)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20866, 6443},
/*h(25047)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {25047, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1337_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17905)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17905;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1338_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11750)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11750;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1339_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1414)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1414, 3888},
/*h(427)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {427, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1341_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21942)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1342_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16774)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16774;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1344_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8645)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8645, 4430},
/*h(13813)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13813, 6390},
/*h(9632)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {9632, 3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1345_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7658)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7658;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1347_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(24992)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24992, 6439},
/*h(29173)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {29173, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1350_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11695)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11695;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1351_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5540)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5540;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1352_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3566)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3566, 6166},
/*h(4553)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4553, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1354_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20900)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {20900, 6442},
/*h(26068)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26068, 6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1357_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8590)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1358_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1448)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1448;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1359_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(461)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 461;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1361_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16808)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16808, 6441},
/*h(17795)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17795, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1363_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9666)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9666;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1364_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4498)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4498, 6443},
/*h(8679)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8679, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1366_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25026)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25026;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1368_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13703)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13703;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1371_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(29063)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {29063, 6438},
/*h(4587)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4587, 4435},
/*h(5574)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5574, 6387},
/*h(406)=3 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {406, 6440}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1373_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26102)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26102, 6389},
/*h(21921)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {21921, 3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1374_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20934)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {20934, 4434},
/*h(15766)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {15766, 6167}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1375_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9611)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9611;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1376_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8624)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8624;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1378_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1482)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1482, 6386},
/*h(24971)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24971, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1379_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(495)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 495;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1380_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17829)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17829;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1381_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16842)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16842;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1382_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15855)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15855;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1383_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(9700)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {9700, 6389},
/*h(4532)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4532, 6442},
/*h(5519)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5519, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1386_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25060)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {25060, 4429},
/*h(20879)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {20879, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1390_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5608)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5608, 6388},
/*h(1427)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1427, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1393_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21955)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21955, 6388},
/*h(20968)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20968, 4435},
/*h(16787)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16787, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1395_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9645)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9645;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1396_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8658)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8658, 4431},
/*h(3490)=1 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {3490, 6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1397_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(25992)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25992, 3894},
/*h(2503)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {2503, 5071}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1398_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1516)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1516, 6385},
/*h(25005)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {25005, 6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1400_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(12695)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12695, 6438},
/*h(17863)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {17863, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1401_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16876)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16876;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1402_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5553)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5553;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1403_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4566)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4566, 4434},
/*h(385)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {385, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1405_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(21900)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {21900, 3890},
/*h(26081)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {26081, 6391},
/*h(20913)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {20913, 6443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1407_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14758)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1410_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1461)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1461;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1412_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17808)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17808, 3889},
/*h(21989)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {21989, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1413_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16821)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16821;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1414_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10666)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10666;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1415_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8692)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {8692, 4429},
/*h(9679)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {9679, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1417_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26026)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26026;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1418_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(25039)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 25039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1419_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17897)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17897;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1421_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6574)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1422_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(419)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {419, 6441},
/*h(5587)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5587, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1424_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(21934)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {3890}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 21934;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1425_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20947)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20947;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1427_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13805)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13805;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1428_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7650)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D()*/ {6170}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7650;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1429_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1495)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1495;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1430_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(29165)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 29165;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1432_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(17842)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {17842, 3889},
/*h(16855)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {16855, 4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1433_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(11687)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 11687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1434_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9713)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9713;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1435_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3558)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {3558, 6166},
/*h(4545)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4545, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1437_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(26060)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {26060, 6389},
/*h(25073)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {25073, 4431}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1439_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8582)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {6437}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8582;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1441_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1440)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1440, 3889},
/*h(5621)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5621, 6390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1442_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(453)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 453;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1444_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(16800)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16800, 6441},
/*h(21968)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {21968, 6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1445_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20981)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20981;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1446_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(14826)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q()*/ {5073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 14826;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1447_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4490)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {4490, 6443},
/*h(3503)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {3503, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1449_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26005)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26005;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1451_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17876)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17876;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1453_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10734)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {5069}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1454_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(398)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {398, 6440},
/*h(4579)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4579, 4435}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1456_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26094)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {6389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26094;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1457_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15758)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64  NOEVSR  ZEROING=0 MASK=0*/ {6166}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1458_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9603)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3894}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9603;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1459_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8616)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8616;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1461_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1474)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {1474, 6386},
/*h(24963)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {24963, 6439}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1462_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(487)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 487;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1463_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(22002)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {6388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 22002;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1464_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(11666)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11666, 6171},
/*h(16834)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {16834, 4433}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1465_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15847)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15847;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1466_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4524)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4524, 6442},
/*h(5511)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {5511, 3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1468_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(26039)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 26039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1469_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(20871)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 20871;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1471_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(17910)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 17910;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1472_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7574)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0  NOEVSR  ZEROING=0 MASK=0  EVEXRR_ONE*/ {6167}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1473_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5600)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5600, 6388},
/*h(1419)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {1419, 3889}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1474_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(432)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 432;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1476_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(20960)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {20960, 4435},
/*h(16779)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {16779, 6441}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1478_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(9637)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {3893}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 9637;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1479_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8650)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8650, 4431},
/*h(7663)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64  NOEVSR  ZEROING=0 MASK=0*/ {7663, 6168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1480_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(30165)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {30165, 6390},
/*h(25984)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {25984, 3894},
/*h(1508)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1508, 6385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1481_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(24997)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 24997;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1483_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12687)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1484_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(16868)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {4432}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 16868;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1485_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5545)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {3891}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5545;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2_1486_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4558)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {4434}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x79_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[1488] = {
/*h(21892)=0 */ {21892, xed3_phash_find_map0x0F_opcode0x79_vv2_0_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8595)=3 */ {8595, xed3_phash_find_map0x0F_opcode0x79_vv2_3_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(466)=5 */ {466, xed3_phash_find_map0x0F_opcode0x79_vv2_5_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17800)=7 */ {17800, xed3_phash_find_map0x0F_opcode0x79_vv2_7_l1},
/*h(15826)=8 */ {15826, xed3_phash_find_map0x0F_opcode0x79_vv2_8_l1},
/*h(9671)=9 */ {9671, xed3_phash_find_map0x0F_opcode0x79_vv2_9_l1},
/*h(8684)=10 */ {8684, xed3_phash_find_map0x0F_opcode0x79_vv2_10_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30199)=12 */ {30199, xed3_phash_find_map0x0F_opcode0x79_vv2_12_l1},
/*h(25031)=13 */ {25031, xed3_phash_find_map0x0F_opcode0x79_vv2_13_l1},
/*h(17889)=14 */ {17889, xed3_phash_find_map0x0F_opcode0x79_vv2_14_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11734)=16 */ {11734, xed3_phash_find_map0x0F_opcode0x79_vv2_16_l1},
/*h(4592)=17 */ {4592, xed3_phash_find_map0x0F_opcode0x79_vv2_17_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21926)=19 */ {21926, xed3_phash_find_map0x0F_opcode0x79_vv2_19_l1},
/*h(20939)=20 */ {20939, xed3_phash_find_map0x0F_opcode0x79_vv2_20_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8629)=22 */ {8629, xed3_phash_find_map0x0F_opcode0x79_vv2_22_l1},
/*h(2474)=23 */ {2474, xed3_phash_find_map0x0F_opcode0x79_vv2_23_l1},
/*h(1487)=24 */ {1487, xed3_phash_find_map0x0F_opcode0x79_vv2_24_l1},
/*h(29157)=25 */ {29157, xed3_phash_find_map0x0F_opcode0x79_vv2_25_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17834)=27 */ {17834, xed3_phash_find_map0x0F_opcode0x79_vv2_27_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5524)=29 */ {5524, xed3_phash_find_map0x0F_opcode0x79_vv2_29_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26052)=31 */ {26052, xed3_phash_find_map0x0F_opcode0x79_vv2_31_l1},
/*h(25065)=32 */ {25065, xed3_phash_find_map0x0F_opcode0x79_vv2_32_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5613)=36 */ {5613, xed3_phash_find_map0x0F_opcode0x79_vv2_36_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20973)=39 */ {20973, xed3_phash_find_map0x0F_opcode0x79_vv2_39_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(14818)=41 */ {14818, xed3_phash_find_map0x0F_opcode0x79_vv2_41_l1},
/*h(3495)=42 */ {3495, xed3_phash_find_map0x0F_opcode0x79_vv2_42_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25010)=44 */ {25010, xed3_phash_find_map0x0F_opcode0x79_vv2_44_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17868)=46 */ {17868, xed3_phash_find_map0x0F_opcode0x79_vv2_46_l1},
/*h(16881)=47 */ {16881, xed3_phash_find_map0x0F_opcode0x79_vv2_47_l1},
/*h(5558)=48 */ {5558, xed3_phash_find_map0x0F_opcode0x79_vv2_48_l1},
/*h(390)=49 */ {390, xed3_phash_find_map0x0F_opcode0x79_vv2_49_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21905)=51 */ {21905, xed3_phash_find_map0x0F_opcode0x79_vv2_51_l1},
/*h(15750)=52 */ {15750, xed3_phash_find_map0x0F_opcode0x79_vv2_52_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8608)=54 */ {8608, xed3_phash_find_map0x0F_opcode0x79_vv2_54_l1},
/*h(6634)=55 */ {6634, xed3_phash_find_map0x0F_opcode0x79_vv2_55_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21994)=58 */ {21994, xed3_phash_find_map0x0F_opcode0x79_vv2_58_l1},
/*h(11658)=59 */ {11658, xed3_phash_find_map0x0F_opcode0x79_vv2_59_l1},
/*h(10671)=60 */ {10671, xed3_phash_find_map0x0F_opcode0x79_vv2_60_l1},
/*h(4516)=61 */ {4516, xed3_phash_find_map0x0F_opcode0x79_vv2_61_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26031)=63 */ {26031, xed3_phash_find_map0x0F_opcode0x79_vv2_63_l1},
/*h(25044)=64 */ {25044, xed3_phash_find_map0x0F_opcode0x79_vv2_64_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17902)=66 */ {17902, xed3_phash_find_map0x0F_opcode0x79_vv2_66_l1},
/*h(7566)=67 */ {7566, xed3_phash_find_map0x0F_opcode0x79_vv2_67_l1},
/*h(1411)=68 */ {1411, xed3_phash_find_map0x0F_opcode0x79_vv2_68_l1},
/*h(424)=69 */ {424, xed3_phash_find_map0x0F_opcode0x79_vv2_69_l1},
/*h(21939)=70 */ {21939, xed3_phash_find_map0x0F_opcode0x79_vv2_70_l1},
/*h(16771)=71 */ {16771, xed3_phash_find_map0x0F_opcode0x79_vv2_71_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8642)=73 */ {8642, xed3_phash_find_map0x0F_opcode0x79_vv2_73_l1},
/*h(7655)=74 */ {7655, xed3_phash_find_map0x0F_opcode0x79_vv2_74_l1},
/*h(30157)=75 */ {30157, xed3_phash_find_map0x0F_opcode0x79_vv2_75_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12679)=78 */ {12679, xed3_phash_find_map0x0F_opcode0x79_vv2_78_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5537)=80 */ {5537, xed3_phash_find_map0x0F_opcode0x79_vv2_80_l1},
/*h(4550)=81 */ {4550, xed3_phash_find_map0x0F_opcode0x79_vv2_81_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25078)=83 */ {25078, xed3_phash_find_map0x0F_opcode0x79_vv2_83_l1},
/*h(14742)=84 */ {14742, xed3_phash_find_map0x0F_opcode0x79_vv2_84_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8587)=86 */ {8587, xed3_phash_find_map0x0F_opcode0x79_vv2_86_l1},
/*h(1445)=87 */ {1445, xed3_phash_find_map0x0F_opcode0x79_vv2_87_l1},
/*h(458)=88 */ {458, xed3_phash_find_map0x0F_opcode0x79_vv2_88_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21973)=90 */ {21973, xed3_phash_find_map0x0F_opcode0x79_vv2_90_l1},
/*h(15818)=91 */ {15818, xed3_phash_find_map0x0F_opcode0x79_vv2_91_l1},
/*h(14831)=92 */ {14831, xed3_phash_find_map0x0F_opcode0x79_vv2_92_l1},
/*h(8676)=93 */ {8676, xed3_phash_find_map0x0F_opcode0x79_vv2_93_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30191)=95 */ {30191, xed3_phash_find_map0x0F_opcode0x79_vv2_95_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11726)=99 */ {11726, xed3_phash_find_map0x0F_opcode0x79_vv2_99_l1},
/*h(4584)=100 */ {4584, xed3_phash_find_map0x0F_opcode0x79_vv2_100_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26099)=102 */ {26099, xed3_phash_find_map0x0F_opcode0x79_vv2_102_l1},
/*h(20931)=103 */ {20931, xed3_phash_find_map0x0F_opcode0x79_vv2_103_l1},
/*h(9608)=104 */ {9608, xed3_phash_find_map0x0F_opcode0x79_vv2_104_l1},
/*h(8621)=105 */ {8621, xed3_phash_find_map0x0F_opcode0x79_vv2_105_l1},
/*h(7634)=106 */ {7634, xed3_phash_find_map0x0F_opcode0x79_vv2_106_l1},
/*h(1479)=107 */ {1479, xed3_phash_find_map0x0F_opcode0x79_vv2_107_l1},
/*h(24968)=108 */ {24968, xed3_phash_find_map0x0F_opcode0x79_vv2_108_l1},
/*h(17826)=109 */ {17826, xed3_phash_find_map0x0F_opcode0x79_vv2_109_l1},
/*h(16839)=110 */ {16839, xed3_phash_find_map0x0F_opcode0x79_vv2_110_l1},
/*h(11671)=111 */ {11671, xed3_phash_find_map0x0F_opcode0x79_vv2_111_l1},
/*h(9697)=112 */ {9697, xed3_phash_find_map0x0F_opcode0x79_vv2_112_l1},
/*h(3542)=113 */ {3542, xed3_phash_find_map0x0F_opcode0x79_vv2_113_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25057)=115 */ {25057, xed3_phash_find_map0x0F_opcode0x79_vv2_115_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5605)=119 */ {5605, xed3_phash_find_map0x0F_opcode0x79_vv2_119_l1},
/*h(437)=120 */ {437, xed3_phash_find_map0x0F_opcode0x79_vv2_120_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20965)=122 */ {20965, xed3_phash_find_map0x0F_opcode0x79_vv2_122_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9642)=124 */ {9642, xed3_phash_find_map0x0F_opcode0x79_vv2_124_l1},
/*h(8655)=125 */ {8655, xed3_phash_find_map0x0F_opcode0x79_vv2_125_l1},
/*h(25989)=126 */ {25989, xed3_phash_find_map0x0F_opcode0x79_vv2_126_l1},
/*h(1513)=127 */ {1513, xed3_phash_find_map0x0F_opcode0x79_vv2_127_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17860)=129 */ {17860, xed3_phash_find_map0x0F_opcode0x79_vv2_129_l1},
/*h(16873)=130 */ {16873, xed3_phash_find_map0x0F_opcode0x79_vv2_130_l1},
/*h(5550)=131 */ {5550, xed3_phash_find_map0x0F_opcode0x79_vv2_131_l1},
/*h(4563)=132 */ {4563, xed3_phash_find_map0x0F_opcode0x79_vv2_132_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21897)=134 */ {21897, xed3_phash_find_map0x0F_opcode0x79_vv2_134_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12781)=137 */ {12781, xed3_phash_find_map0x0F_opcode0x79_vv2_137_l1},
/*h(6626)=138 */ {6626, xed3_phash_find_map0x0F_opcode0x79_vv2_138_l1},
/*h(471)=139 */ {471, xed3_phash_find_map0x0F_opcode0x79_vv2_139_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21986)=141 */ {21986, xed3_phash_find_map0x0F_opcode0x79_vv2_141_l1},
/*h(16818)=142 */ {16818, xed3_phash_find_map0x0F_opcode0x79_vv2_142_l1},
/*h(10663)=143 */ {10663, xed3_phash_find_map0x0F_opcode0x79_vv2_143_l1},
/*h(9676)=144 */ {9676, xed3_phash_find_map0x0F_opcode0x79_vv2_144_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2534)=146 */ {2534, xed3_phash_find_map0x0F_opcode0x79_vv2_146_l1},
/*h(25036)=147 */ {25036, xed3_phash_find_map0x0F_opcode0x79_vv2_147_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17894)=149 */ {17894, xed3_phash_find_map0x0F_opcode0x79_vv2_149_l1},
/*h(7558)=150 */ {7558, xed3_phash_find_map0x0F_opcode0x79_vv2_150_l1},
/*h(5584)=151 */ {5584, xed3_phash_find_map0x0F_opcode0x79_vv2_151_l1},
/*h(4597)=152 */ {4597, xed3_phash_find_map0x0F_opcode0x79_vv2_152_l1},
/*h(21931)=153 */ {21931, xed3_phash_find_map0x0F_opcode0x79_vv2_153_l1},
/*h(20944)=154 */ {20944, xed3_phash_find_map0x0F_opcode0x79_vv2_154_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9621)=156 */ {9621, xed3_phash_find_map0x0F_opcode0x79_vv2_156_l1},
/*h(3466)=157 */ {3466, xed3_phash_find_map0x0F_opcode0x79_vv2_157_l1},
/*h(30149)=158 */ {30149, xed3_phash_find_map0x0F_opcode0x79_vv2_158_l1},
/*h(24981)=159 */ {24981, xed3_phash_find_map0x0F_opcode0x79_vv2_159_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17839)=161 */ {17839, xed3_phash_find_map0x0F_opcode0x79_vv2_161_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9710)=163 */ {9710, xed3_phash_find_map0x0F_opcode0x79_vv2_163_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25070)=166 */ {25070, xed3_phash_find_map0x0F_opcode0x79_vv2_166_l1},
/*h(14734)=167 */ {14734, xed3_phash_find_map0x0F_opcode0x79_vv2_167_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8579)=169 */ {8579, xed3_phash_find_map0x0F_opcode0x79_vv2_169_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5618)=171 */ {5618, xed3_phash_find_map0x0F_opcode0x79_vv2_171_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21965)=173 */ {21965, xed3_phash_find_map0x0F_opcode0x79_vv2_173_l1},
/*h(15810)=174 */ {15810, xed3_phash_find_map0x0F_opcode0x79_vv2_174_l1},
/*h(14823)=175 */ {14823, xed3_phash_find_map0x0F_opcode0x79_vv2_175_l1},
/*h(4487)=176 */ {4487, xed3_phash_find_map0x0F_opcode0x79_vv2_176_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25015)=178 */ {25015, xed3_phash_find_map0x0F_opcode0x79_vv2_178_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17873)=180 */ {17873, xed3_phash_find_map0x0F_opcode0x79_vv2_180_l1},
/*h(16886)=181 */ {16886, xed3_phash_find_map0x0F_opcode0x79_vv2_181_l1},
/*h(6550)=182 */ {6550, xed3_phash_find_map0x0F_opcode0x79_vv2_182_l1},
/*h(4576)=183 */ {4576, xed3_phash_find_map0x0F_opcode0x79_vv2_183_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21910)=185 */ {21910, xed3_phash_find_map0x0F_opcode0x79_vv2_185_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9600)=187 */ {9600, xed3_phash_find_map0x0F_opcode0x79_vv2_187_l1},
/*h(13781)=188 */ {13781, xed3_phash_find_map0x0F_opcode0x79_vv2_188_l1},
/*h(7626)=189 */ {7626, xed3_phash_find_map0x0F_opcode0x79_vv2_189_l1},
/*h(24960)=190 */ {24960, xed3_phash_find_map0x0F_opcode0x79_vv2_190_l1},
/*h(29141)=191 */ {29141, xed3_phash_find_map0x0F_opcode0x79_vv2_191_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21999)=193 */ {21999, xed3_phash_find_map0x0F_opcode0x79_vv2_193_l1},
/*h(11663)=194 */ {11663, xed3_phash_find_map0x0F_opcode0x79_vv2_194_l1},
/*h(4521)=195 */ {4521, xed3_phash_find_map0x0F_opcode0x79_vv2_195_l1},
/*h(3534)=196 */ {3534, xed3_phash_find_map0x0F_opcode0x79_vv2_196_l1},
/*h(26036)=197 */ {26036, xed3_phash_find_map0x0F_opcode0x79_vv2_197_l1},
/*h(20868)=198 */ {20868, xed3_phash_find_map0x0F_opcode0x79_vv2_198_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17907)=200 */ {17907, xed3_phash_find_map0x0F_opcode0x79_vv2_200_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1416)=202 */ {1416, xed3_phash_find_map0x0F_opcode0x79_vv2_202_l1},
/*h(429)=203 */ {429, xed3_phash_find_map0x0F_opcode0x79_vv2_203_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16776)=205 */ {16776, xed3_phash_find_map0x0F_opcode0x79_vv2_205_l1},
/*h(14802)=206 */ {14802, xed3_phash_find_map0x0F_opcode0x79_vv2_206_l1},
/*h(13815)=207 */ {13815, xed3_phash_find_map0x0F_opcode0x79_vv2_207_l1},
/*h(8647)=208 */ {8647, xed3_phash_find_map0x0F_opcode0x79_vv2_208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29175)=210 */ {29175, xed3_phash_find_map0x0F_opcode0x79_vv2_210_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16865)=213 */ {16865, xed3_phash_find_map0x0F_opcode0x79_vv2_213_l1},
/*h(5542)=214 */ {5542, xed3_phash_find_map0x0F_opcode0x79_vv2_214_l1},
/*h(4555)=215 */ {4555, xed3_phash_find_map0x0F_opcode0x79_vv2_215_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21889)=217 */ {21889, xed3_phash_find_map0x0F_opcode0x79_vv2_217_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12773)=220 */ {12773, xed3_phash_find_map0x0F_opcode0x79_vv2_220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(463)=222 */ {463, xed3_phash_find_map0x0F_opcode0x79_vv2_222_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17797)=224 */ {17797, xed3_phash_find_map0x0F_opcode0x79_vv2_224_l1},
/*h(15823)=225 */ {15823, xed3_phash_find_map0x0F_opcode0x79_vv2_225_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4500)=227 */ {4500, xed3_phash_find_map0x0F_opcode0x79_vv2_227_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25028)=230 */ {25028, xed3_phash_find_map0x0F_opcode0x79_vv2_230_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5576)=234 */ {5576, xed3_phash_find_map0x0F_opcode0x79_vv2_234_l1},
/*h(4589)=235 */ {4589, xed3_phash_find_map0x0F_opcode0x79_vv2_235_l1},
/*h(21923)=236 */ {21923, xed3_phash_find_map0x0F_opcode0x79_vv2_236_l1},
/*h(20936)=237 */ {20936, xed3_phash_find_map0x0F_opcode0x79_vv2_237_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9613)=239 */ {9613, xed3_phash_find_map0x0F_opcode0x79_vv2_239_l1},
/*h(7639)=240 */ {7639, xed3_phash_find_map0x0F_opcode0x79_vv2_240_l1},
/*h(2471)=241 */ {2471, xed3_phash_find_map0x0F_opcode0x79_vv2_241_l1},
/*h(497)=242 */ {497, xed3_phash_find_map0x0F_opcode0x79_vv2_242_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17831)=244 */ {17831, xed3_phash_find_map0x0F_opcode0x79_vv2_244_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5521)=246 */ {5521, xed3_phash_find_map0x0F_opcode0x79_vv2_246_l1},
/*h(4534)=247 */ {4534, xed3_phash_find_map0x0F_opcode0x79_vv2_247_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25062)=249 */ {25062, xed3_phash_find_map0x0F_opcode0x79_vv2_249_l1},
/*h(14726)=250 */ {14726, xed3_phash_find_map0x0F_opcode0x79_vv2_250_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5610)=253 */ {5610, xed3_phash_find_map0x0F_opcode0x79_vv2_253_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21957)=256 */ {21957, xed3_phash_find_map0x0F_opcode0x79_vv2_256_l1},
/*h(20970)=257 */ {20970, xed3_phash_find_map0x0F_opcode0x79_vv2_257_l1},
/*h(10634)=258 */ {10634, xed3_phash_find_map0x0F_opcode0x79_vv2_258_l1},
/*h(8660)=259 */ {8660, xed3_phash_find_map0x0F_opcode0x79_vv2_259_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25007)=261 */ {25007, xed3_phash_find_map0x0F_opcode0x79_vv2_261_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17865)=263 */ {17865, xed3_phash_find_map0x0F_opcode0x79_vv2_263_l1},
/*h(16878)=264 */ {16878, xed3_phash_find_map0x0F_opcode0x79_vv2_264_l1},
/*h(6542)=265 */ {6542, xed3_phash_find_map0x0F_opcode0x79_vv2_265_l1},
/*h(5555)=266 */ {5555, xed3_phash_find_map0x0F_opcode0x79_vv2_266_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21902)=268 */ {21902, xed3_phash_find_map0x0F_opcode0x79_vv2_268_l1},
/*h(20915)=269 */ {20915, xed3_phash_find_map0x0F_opcode0x79_vv2_269_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13773)=271 */ {13773, xed3_phash_find_map0x0F_opcode0x79_vv2_271_l1},
/*h(7618)=272 */ {7618, xed3_phash_find_map0x0F_opcode0x79_vv2_272_l1},
/*h(1463)=273 */ {1463, xed3_phash_find_map0x0F_opcode0x79_vv2_273_l1},
/*h(29133)=274 */ {29133, xed3_phash_find_map0x0F_opcode0x79_vv2_274_l1},
/*h(21991)=275 */ {21991, xed3_phash_find_map0x0F_opcode0x79_vv2_275_l1},
/*h(11655)=276 */ {11655, xed3_phash_find_map0x0F_opcode0x79_vv2_276_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4513)=278 */ {4513, xed3_phash_find_map0x0F_opcode0x79_vv2_278_l1},
/*h(3526)=279 */ {3526, xed3_phash_find_map0x0F_opcode0x79_vv2_279_l1},
/*h(26028)=280 */ {26028, xed3_phash_find_map0x0F_opcode0x79_vv2_280_l1},
/*h(25041)=281 */ {25041, xed3_phash_find_map0x0F_opcode0x79_vv2_281_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17899)=283 */ {17899, xed3_phash_find_map0x0F_opcode0x79_vv2_283_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5589)=285 */ {5589, xed3_phash_find_map0x0F_opcode0x79_vv2_285_l1},
/*h(421)=286 */ {421, xed3_phash_find_map0x0F_opcode0x79_vv2_286_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20949)=288 */ {20949, xed3_phash_find_map0x0F_opcode0x79_vv2_288_l1},
/*h(14794)=289 */ {14794, xed3_phash_find_map0x0F_opcode0x79_vv2_289_l1},
/*h(13807)=290 */ {13807, xed3_phash_find_map0x0F_opcode0x79_vv2_290_l1},
/*h(3471)=291 */ {3471, xed3_phash_find_map0x0F_opcode0x79_vv2_291_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29167)=293 */ {29167, xed3_phash_find_map0x0F_opcode0x79_vv2_293_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17844)=295 */ {17844, xed3_phash_find_map0x0F_opcode0x79_vv2_295_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10702)=297 */ {10702, xed3_phash_find_map0x0F_opcode0x79_vv2_297_l1},
/*h(4547)=298 */ {4547, xed3_phash_find_map0x0F_opcode0x79_vv2_298_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25075)=300 */ {25075, xed3_phash_find_map0x0F_opcode0x79_vv2_300_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8584)=303 */ {8584, xed3_phash_find_map0x0F_opcode0x79_vv2_303_l1},
/*h(6610)=304 */ {6610, xed3_phash_find_map0x0F_opcode0x79_vv2_304_l1},
/*h(5623)=305 */ {5623, xed3_phash_find_map0x0F_opcode0x79_vv2_305_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21970)=307 */ {21970, xed3_phash_find_map0x0F_opcode0x79_vv2_307_l1},
/*h(15815)=308 */ {15815, xed3_phash_find_map0x0F_opcode0x79_vv2_308_l1},
/*h(10647)=309 */ {10647, xed3_phash_find_map0x0F_opcode0x79_vv2_309_l1},
/*h(8673)=310 */ {8673, xed3_phash_find_map0x0F_opcode0x79_vv2_310_l1},
/*h(2518)=311 */ {2518, xed3_phash_find_map0x0F_opcode0x79_vv2_311_l1},
/*h(26007)=312 */ {26007, xed3_phash_find_map0x0F_opcode0x79_vv2_312_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17878)=314 */ {17878, xed3_phash_find_map0x0F_opcode0x79_vv2_314_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5568)=317 */ {5568, xed3_phash_find_map0x0F_opcode0x79_vv2_317_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26096)=319 */ {26096, xed3_phash_find_map0x0F_opcode0x79_vv2_319_l1},
/*h(20928)=320 */ {20928, xed3_phash_find_map0x0F_opcode0x79_vv2_320_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8618)=322 */ {8618, xed3_phash_find_map0x0F_opcode0x79_vv2_322_l1},
/*h(7631)=323 */ {7631, xed3_phash_find_map0x0F_opcode0x79_vv2_323_l1},
/*h(30133)=324 */ {30133, xed3_phash_find_map0x0F_opcode0x79_vv2_324_l1},
/*h(489)=325 */ {489, xed3_phash_find_map0x0F_opcode0x79_vv2_325_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16836)=327 */ {16836, xed3_phash_find_map0x0F_opcode0x79_vv2_327_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5513)=329 */ {5513, xed3_phash_find_map0x0F_opcode0x79_vv2_329_l1},
/*h(4526)=330 */ {4526, xed3_phash_find_map0x0F_opcode0x79_vv2_330_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20873)=332 */ {20873, xed3_phash_find_map0x0F_opcode0x79_vv2_332_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5602)=336 */ {5602, xed3_phash_find_map0x0F_opcode0x79_vv2_336_l1},
/*h(434)=337 */ {434, xed3_phash_find_map0x0F_opcode0x79_vv2_337_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20962)=339 */ {20962, xed3_phash_find_map0x0F_opcode0x79_vv2_339_l1},
/*h(10626)=340 */ {10626, xed3_phash_find_map0x0F_opcode0x79_vv2_340_l1},
/*h(14807)=341 */ {14807, xed3_phash_find_map0x0F_opcode0x79_vv2_341_l1},
/*h(8652)=342 */ {8652, xed3_phash_find_map0x0F_opcode0x79_vv2_342_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24999)=344 */ {24999, xed3_phash_find_map0x0F_opcode0x79_vv2_344_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17857)=346 */ {17857, xed3_phash_find_map0x0F_opcode0x79_vv2_346_l1},
/*h(16870)=347 */ {16870, xed3_phash_find_map0x0F_opcode0x79_vv2_347_l1},
/*h(6534)=348 */ {6534, xed3_phash_find_map0x0F_opcode0x79_vv2_348_l1},
/*h(4560)=349 */ {4560, xed3_phash_find_map0x0F_opcode0x79_vv2_349_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21894)=351 */ {21894, xed3_phash_find_map0x0F_opcode0x79_vv2_351_l1},
/*h(20907)=352 */ {20907, xed3_phash_find_map0x0F_opcode0x79_vv2_352_l1},
/*h(13765)=353 */ {13765, xed3_phash_find_map0x0F_opcode0x79_vv2_353_l1},
/*h(8597)=354 */ {8597, xed3_phash_find_map0x0F_opcode0x79_vv2_354_l1},
/*h(2442)=355 */ {2442, xed3_phash_find_map0x0F_opcode0x79_vv2_355_l1},
/*h(468)=356 */ {468, xed3_phash_find_map0x0F_opcode0x79_vv2_356_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17802)=358 */ {17802, xed3_phash_find_map0x0F_opcode0x79_vv2_358_l1},
/*h(16815)=359 */ {16815, xed3_phash_find_map0x0F_opcode0x79_vv2_359_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9673)=361 */ {9673, xed3_phash_find_map0x0F_opcode0x79_vv2_361_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26020)=363 */ {26020, xed3_phash_find_map0x0F_opcode0x79_vv2_363_l1},
/*h(25033)=364 */ {25033, xed3_phash_find_map0x0F_opcode0x79_vv2_364_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17891)=366 */ {17891, xed3_phash_find_map0x0F_opcode0x79_vv2_366_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5581)=368 */ {5581, xed3_phash_find_map0x0F_opcode0x79_vv2_368_l1},
/*h(4594)=369 */ {4594, xed3_phash_find_map0x0F_opcode0x79_vv2_369_l1},
/*h(21928)=370 */ {21928, xed3_phash_find_map0x0F_opcode0x79_vv2_370_l1},
/*h(20941)=371 */ {20941, xed3_phash_find_map0x0F_opcode0x79_vv2_371_l1},
/*h(14786)=372 */ {14786, xed3_phash_find_map0x0F_opcode0x79_vv2_372_l1},
/*h(13799)=373 */ {13799, xed3_phash_find_map0x0F_opcode0x79_vv2_373_l1},
/*h(8631)=374 */ {8631, xed3_phash_find_map0x0F_opcode0x79_vv2_374_l1},
/*h(1489)=375 */ {1489, xed3_phash_find_map0x0F_opcode0x79_vv2_375_l1},
/*h(29159)=376 */ {29159, xed3_phash_find_map0x0F_opcode0x79_vv2_376_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17836)=378 */ {17836, xed3_phash_find_map0x0F_opcode0x79_vv2_378_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9707)=380 */ {9707, xed3_phash_find_map0x0F_opcode0x79_vv2_380_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25067)=383 */ {25067, xed3_phash_find_map0x0F_opcode0x79_vv2_383_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12757)=386 */ {12757, xed3_phash_find_map0x0F_opcode0x79_vv2_386_l1},
/*h(6602)=387 */ {6602, xed3_phash_find_map0x0F_opcode0x79_vv2_387_l1},
/*h(5615)=388 */ {5615, xed3_phash_find_map0x0F_opcode0x79_vv2_388_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21962)=390 */ {21962, xed3_phash_find_map0x0F_opcode0x79_vv2_390_l1},
/*h(20975)=391 */ {20975, xed3_phash_find_map0x0F_opcode0x79_vv2_391_l1},
/*h(9652)=392 */ {9652, xed3_phash_find_map0x0F_opcode0x79_vv2_392_l1},
/*h(4484)=393 */ {4484, xed3_phash_find_map0x0F_opcode0x79_vv2_393_l1},
/*h(2510)=394 */ {2510, xed3_phash_find_map0x0F_opcode0x79_vv2_394_l1},
/*h(25012)=395 */ {25012, xed3_phash_find_map0x0F_opcode0x79_vv2_395_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17870)=397 */ {17870, xed3_phash_find_map0x0F_opcode0x79_vv2_397_l1},
/*h(16883)=398 */ {16883, xed3_phash_find_map0x0F_opcode0x79_vv2_398_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(392)=400 */ {392, xed3_phash_find_map0x0F_opcode0x79_vv2_400_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21907)=402 */ {21907, xed3_phash_find_map0x0F_opcode0x79_vv2_402_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12791)=405 */ {12791, xed3_phash_find_map0x0F_opcode0x79_vv2_405_l1},
/*h(7623)=406 */ {7623, xed3_phash_find_map0x0F_opcode0x79_vv2_406_l1},
/*h(30125)=407 */ {30125, xed3_phash_find_map0x0F_opcode0x79_vv2_407_l1},
/*h(481)=408 */ {481, xed3_phash_find_map0x0F_opcode0x79_vv2_408_l1},
/*h(17815)=409 */ {17815, xed3_phash_find_map0x0F_opcode0x79_vv2_409_l1},
/*h(21996)=410 */ {21996, xed3_phash_find_map0x0F_opcode0x79_vv2_410_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5505)=412 */ {5505, xed3_phash_find_map0x0F_opcode0x79_vv2_412_l1},
/*h(4518)=413 */ {4518, xed3_phash_find_map0x0F_opcode0x79_vv2_413_l1},
/*h(26033)=414 */ {26033, xed3_phash_find_map0x0F_opcode0x79_vv2_414_l1},
/*h(20865)=415 */ {20865, xed3_phash_find_map0x0F_opcode0x79_vv2_415_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17904)=417 */ {17904, xed3_phash_find_map0x0F_opcode0x79_vv2_417_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1413)=419 */ {1413, xed3_phash_find_map0x0F_opcode0x79_vv2_419_l1},
/*h(426)=420 */ {426, xed3_phash_find_map0x0F_opcode0x79_vv2_420_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21941)=422 */ {21941, xed3_phash_find_map0x0F_opcode0x79_vv2_422_l1},
/*h(15786)=423 */ {15786, xed3_phash_find_map0x0F_opcode0x79_vv2_423_l1},
/*h(14799)=424 */ {14799, xed3_phash_find_map0x0F_opcode0x79_vv2_424_l1},
/*h(8644)=425 */ {8644, xed3_phash_find_map0x0F_opcode0x79_vv2_425_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30159)=427 */ {30159, xed3_phash_find_map0x0F_opcode0x79_vv2_427_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11694)=430 */ {11694, xed3_phash_find_map0x0F_opcode0x79_vv2_430_l1},
/*h(5539)=431 */ {5539, xed3_phash_find_map0x0F_opcode0x79_vv2_431_l1},
/*h(4552)=432 */ {4552, xed3_phash_find_map0x0F_opcode0x79_vv2_432_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20899)=434 */ {20899, xed3_phash_find_map0x0F_opcode0x79_vv2_434_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8589)=437 */ {8589, xed3_phash_find_map0x0F_opcode0x79_vv2_437_l1},
/*h(6615)=438 */ {6615, xed3_phash_find_map0x0F_opcode0x79_vv2_438_l1},
/*h(460)=439 */ {460, xed3_phash_find_map0x0F_opcode0x79_vv2_439_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21975)=441 */ {21975, xed3_phash_find_map0x0F_opcode0x79_vv2_441_l1},
/*h(16807)=442 */ {16807, xed3_phash_find_map0x0F_opcode0x79_vv2_442_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4497)=444 */ {4497, xed3_phash_find_map0x0F_opcode0x79_vv2_444_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25025)=447 */ {25025, xed3_phash_find_map0x0F_opcode0x79_vv2_447_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5573)=451 */ {5573, xed3_phash_find_map0x0F_opcode0x79_vv2_451_l1},
/*h(4586)=452 */ {4586, xed3_phash_find_map0x0F_opcode0x79_vv2_452_l1},
/*h(21920)=453 */ {21920, xed3_phash_find_map0x0F_opcode0x79_vv2_453_l1},
/*h(20933)=454 */ {20933, xed3_phash_find_map0x0F_opcode0x79_vv2_454_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9610)=456 */ {9610, xed3_phash_find_map0x0F_opcode0x79_vv2_456_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1481)=458 */ {1481, xed3_phash_find_map0x0F_opcode0x79_vv2_458_l1},
/*h(494)=459 */ {494, xed3_phash_find_map0x0F_opcode0x79_vv2_459_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17828)=461 */ {17828, xed3_phash_find_map0x0F_opcode0x79_vv2_461_l1},
/*h(15854)=462 */ {15854, xed3_phash_find_map0x0F_opcode0x79_vv2_462_l1},
/*h(5518)=463 */ {5518, xed3_phash_find_map0x0F_opcode0x79_vv2_463_l1},
/*h(4531)=464 */ {4531, xed3_phash_find_map0x0F_opcode0x79_vv2_464_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25059)=466 */ {25059, xed3_phash_find_map0x0F_opcode0x79_vv2_466_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12749)=469 */ {12749, xed3_phash_find_map0x0F_opcode0x79_vv2_469_l1},
/*h(6594)=470 */ {6594, xed3_phash_find_map0x0F_opcode0x79_vv2_470_l1},
/*h(5607)=471 */ {5607, xed3_phash_find_map0x0F_opcode0x79_vv2_471_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21954)=473 */ {21954, xed3_phash_find_map0x0F_opcode0x79_vv2_473_l1},
/*h(20967)=474 */ {20967, xed3_phash_find_map0x0F_opcode0x79_vv2_474_l1},
/*h(10631)=475 */ {10631, xed3_phash_find_map0x0F_opcode0x79_vv2_475_l1},
/*h(8657)=476 */ {8657, xed3_phash_find_map0x0F_opcode0x79_vv2_476_l1},
/*h(2502)=477 */ {2502, xed3_phash_find_map0x0F_opcode0x79_vv2_477_l1},
/*h(25004)=478 */ {25004, xed3_phash_find_map0x0F_opcode0x79_vv2_478_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17862)=480 */ {17862, xed3_phash_find_map0x0F_opcode0x79_vv2_480_l1},
/*h(16875)=481 */ {16875, xed3_phash_find_map0x0F_opcode0x79_vv2_481_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5552)=483 */ {5552, xed3_phash_find_map0x0F_opcode0x79_vv2_483_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26080)=485 */ {26080, xed3_phash_find_map0x0F_opcode0x79_vv2_485_l1},
/*h(20912)=486 */ {20912, xed3_phash_find_map0x0F_opcode0x79_vv2_486_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12783)=488 */ {12783, xed3_phash_find_map0x0F_opcode0x79_vv2_488_l1},
/*h(2447)=489 */ {2447, xed3_phash_find_map0x0F_opcode0x79_vv2_489_l1},
/*h(30117)=490 */ {30117, xed3_phash_find_map0x0F_opcode0x79_vv2_490_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17807)=492 */ {17807, xed3_phash_find_map0x0F_opcode0x79_vv2_492_l1},
/*h(16820)=493 */ {16820, xed3_phash_find_map0x0F_opcode0x79_vv2_493_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9678)=495 */ {9678, xed3_phash_find_map0x0F_opcode0x79_vv2_495_l1},
/*h(8691)=496 */ {8691, xed3_phash_find_map0x0F_opcode0x79_vv2_496_l1},
/*h(26025)=497 */ {26025, xed3_phash_find_map0x0F_opcode0x79_vv2_497_l1},
/*h(25038)=498 */ {25038, xed3_phash_find_map0x0F_opcode0x79_vv2_498_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17896)=500 */ {17896, xed3_phash_find_map0x0F_opcode0x79_vv2_500_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5586)=502 */ {5586, xed3_phash_find_map0x0F_opcode0x79_vv2_502_l1},
/*h(4599)=503 */ {4599, xed3_phash_find_map0x0F_opcode0x79_vv2_503_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20946)=505 */ {20946, xed3_phash_find_map0x0F_opcode0x79_vv2_505_l1},
/*h(15778)=506 */ {15778, xed3_phash_find_map0x0F_opcode0x79_vv2_506_l1},
/*h(14791)=507 */ {14791, xed3_phash_find_map0x0F_opcode0x79_vv2_507_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24983)=510 */ {24983, xed3_phash_find_map0x0F_opcode0x79_vv2_510_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17841)=512 */ {17841, xed3_phash_find_map0x0F_opcode0x79_vv2_512_l1},
/*h(11686)=513 */ {11686, xed3_phash_find_map0x0F_opcode0x79_vv2_513_l1},
/*h(9712)=514 */ {9712, xed3_phash_find_map0x0F_opcode0x79_vv2_514_l1},
/*h(4544)=515 */ {4544, xed3_phash_find_map0x0F_opcode0x79_vv2_515_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26059)=517 */ {26059, xed3_phash_find_map0x0F_opcode0x79_vv2_517_l1},
/*h(25072)=518 */ {25072, xed3_phash_find_map0x0F_opcode0x79_vv2_518_l1},
/*h(13749)=519 */ {13749, xed3_phash_find_map0x0F_opcode0x79_vv2_519_l1},
/*h(7594)=520 */ {7594, xed3_phash_find_map0x0F_opcode0x79_vv2_520_l1},
/*h(6607)=521 */ {6607, xed3_phash_find_map0x0F_opcode0x79_vv2_521_l1},
/*h(29109)=522 */ {29109, xed3_phash_find_map0x0F_opcode0x79_vv2_522_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21967)=524 */ {21967, xed3_phash_find_map0x0F_opcode0x79_vv2_524_l1},
/*h(20980)=525 */ {20980, xed3_phash_find_map0x0F_opcode0x79_vv2_525_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4489)=527 */ {4489, xed3_phash_find_map0x0F_opcode0x79_vv2_527_l1},
/*h(3502)=528 */ {3502, xed3_phash_find_map0x0F_opcode0x79_vv2_528_l1},
/*h(26004)=529 */ {26004, xed3_phash_find_map0x0F_opcode0x79_vv2_529_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17875)=532 */ {17875, xed3_phash_find_map0x0F_opcode0x79_vv2_532_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(397)=534 */ {397, xed3_phash_find_map0x0F_opcode0x79_vv2_534_l1},
/*h(4578)=535 */ {4578, xed3_phash_find_map0x0F_opcode0x79_vv2_535_l1},
/*h(26093)=536 */ {26093, xed3_phash_find_map0x0F_opcode0x79_vv2_536_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8615)=539 */ {8615, xed3_phash_find_map0x0F_opcode0x79_vv2_539_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1473)=541 */ {1473, xed3_phash_find_map0x0F_opcode0x79_vv2_541_l1},
/*h(29143)=542 */ {29143, xed3_phash_find_map0x0F_opcode0x79_vv2_542_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(22001)=544 */ {22001, xed3_phash_find_map0x0F_opcode0x79_vv2_544_l1},
/*h(15846)=545 */ {15846, xed3_phash_find_map0x0F_opcode0x79_vv2_545_l1},
/*h(5510)=546 */ {5510, xed3_phash_find_map0x0F_opcode0x79_vv2_546_l1},
/*h(4523)=547 */ {4523, xed3_phash_find_map0x0F_opcode0x79_vv2_547_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20870)=549 */ {20870, xed3_phash_find_map0x0F_opcode0x79_vv2_549_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17909)=551 */ {17909, xed3_phash_find_map0x0F_opcode0x79_vv2_551_l1},
/*h(12741)=552 */ {12741, xed3_phash_find_map0x0F_opcode0x79_vv2_552_l1},
/*h(1418)=553 */ {1418, xed3_phash_find_map0x0F_opcode0x79_vv2_553_l1},
/*h(431)=554 */ {431, xed3_phash_find_map0x0F_opcode0x79_vv2_554_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16778)=556 */ {16778, xed3_phash_find_map0x0F_opcode0x79_vv2_556_l1},
/*h(15791)=557 */ {15791, xed3_phash_find_map0x0F_opcode0x79_vv2_557_l1},
/*h(9636)=558 */ {9636, xed3_phash_find_map0x0F_opcode0x79_vv2_558_l1},
/*h(8649)=559 */ {8649, xed3_phash_find_map0x0F_opcode0x79_vv2_559_l1},
/*h(7662)=560 */ {7662, xed3_phash_find_map0x0F_opcode0x79_vv2_560_l1},
/*h(24996)=561 */ {24996, xed3_phash_find_map0x0F_opcode0x79_vv2_561_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16867)=564 */ {16867, xed3_phash_find_map0x0F_opcode0x79_vv2_564_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4557)=566 */ {4557, xed3_phash_find_map0x0F_opcode0x79_vv2_566_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21891)=568 */ {21891, xed3_phash_find_map0x0F_opcode0x79_vv2_568_l1},
/*h(20904)=569 */ {20904, xed3_phash_find_map0x0F_opcode0x79_vv2_569_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12775)=571 */ {12775, xed3_phash_find_map0x0F_opcode0x79_vv2_571_l1},
/*h(2439)=572 */ {2439, xed3_phash_find_map0x0F_opcode0x79_vv2_572_l1},
/*h(1452)=573 */ {1452, xed3_phash_find_map0x0F_opcode0x79_vv2_573_l1},
/*h(465)=574 */ {465, xed3_phash_find_map0x0F_opcode0x79_vv2_574_l1},
/*h(17799)=575 */ {17799, xed3_phash_find_map0x0F_opcode0x79_vv2_575_l1},
/*h(16812)=576 */ {16812, xed3_phash_find_map0x0F_opcode0x79_vv2_576_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4502)=578 */ {4502, xed3_phash_find_map0x0F_opcode0x79_vv2_578_l1},
/*h(8683)=579 */ {8683, xed3_phash_find_map0x0F_opcode0x79_vv2_579_l1},
/*h(26017)=580 */ {26017, xed3_phash_find_map0x0F_opcode0x79_vv2_580_l1},
/*h(25030)=581 */ {25030, xed3_phash_find_map0x0F_opcode0x79_vv2_581_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17888)=583 */ {17888, xed3_phash_find_map0x0F_opcode0x79_vv2_583_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5578)=585 */ {5578, xed3_phash_find_map0x0F_opcode0x79_vv2_585_l1},
/*h(4591)=586 */ {4591, xed3_phash_find_map0x0F_opcode0x79_vv2_586_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20938)=588 */ {20938, xed3_phash_find_map0x0F_opcode0x79_vv2_588_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9615)=590 */ {9615, xed3_phash_find_map0x0F_opcode0x79_vv2_590_l1},
/*h(8628)=591 */ {8628, xed3_phash_find_map0x0F_opcode0x79_vv2_591_l1},
/*h(1486)=592 */ {1486, xed3_phash_find_map0x0F_opcode0x79_vv2_592_l1},
/*h(24975)=593 */ {24975, xed3_phash_find_map0x0F_opcode0x79_vv2_593_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17833)=595 */ {17833, xed3_phash_find_map0x0F_opcode0x79_vv2_595_l1},
/*h(16846)=596 */ {16846, xed3_phash_find_map0x0F_opcode0x79_vv2_596_l1},
/*h(9704)=597 */ {9704, xed3_phash_find_map0x0F_opcode0x79_vv2_597_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25064)=600 */ {25064, xed3_phash_find_map0x0F_opcode0x79_vv2_600_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13741)=602 */ {13741, xed3_phash_find_map0x0F_opcode0x79_vv2_602_l1},
/*h(7586)=603 */ {7586, xed3_phash_find_map0x0F_opcode0x79_vv2_603_l1},
/*h(6599)=604 */ {6599, xed3_phash_find_map0x0F_opcode0x79_vv2_604_l1},
/*h(5612)=605 */ {5612, xed3_phash_find_map0x0F_opcode0x79_vv2_605_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21959)=607 */ {21959, xed3_phash_find_map0x0F_opcode0x79_vv2_607_l1},
/*h(20972)=608 */ {20972, xed3_phash_find_map0x0F_opcode0x79_vv2_608_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8662)=610 */ {8662, xed3_phash_find_map0x0F_opcode0x79_vv2_610_l1},
/*h(3494)=611 */ {3494, xed3_phash_find_map0x0F_opcode0x79_vv2_611_l1},
/*h(25996)=612 */ {25996, xed3_phash_find_map0x0F_opcode0x79_vv2_612_l1},
/*h(25009)=613 */ {25009, xed3_phash_find_map0x0F_opcode0x79_vv2_613_l1},
/*h(17867)=614 */ {17867, xed3_phash_find_map0x0F_opcode0x79_vv2_614_l1},
/*h(16880)=615 */ {16880, xed3_phash_find_map0x0F_opcode0x79_vv2_615_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(389)=617 */ {389, xed3_phash_find_map0x0F_opcode0x79_vv2_617_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21904)=619 */ {21904, xed3_phash_find_map0x0F_opcode0x79_vv2_619_l1},
/*h(20917)=620 */ {20917, xed3_phash_find_map0x0F_opcode0x79_vv2_620_l1},
/*h(14762)=621 */ {14762, xed3_phash_find_map0x0F_opcode0x79_vv2_621_l1},
/*h(13775)=622 */ {13775, xed3_phash_find_map0x0F_opcode0x79_vv2_622_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29135)=625 */ {29135, xed3_phash_find_map0x0F_opcode0x79_vv2_625_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21993)=627 */ {21993, xed3_phash_find_map0x0F_opcode0x79_vv2_627_l1},
/*h(10670)=628 */ {10670, xed3_phash_find_map0x0F_opcode0x79_vv2_628_l1},
/*h(9683)=629 */ {9683, xed3_phash_find_map0x0F_opcode0x79_vv2_629_l1},
/*h(4515)=630 */ {4515, xed3_phash_find_map0x0F_opcode0x79_vv2_630_l1},
/*h(26030)=631 */ {26030, xed3_phash_find_map0x0F_opcode0x79_vv2_631_l1},
/*h(25043)=632 */ {25043, xed3_phash_find_map0x0F_opcode0x79_vv2_632_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17901)=634 */ {17901, xed3_phash_find_map0x0F_opcode0x79_vv2_634_l1},
/*h(11746)=635 */ {11746, xed3_phash_find_map0x0F_opcode0x79_vv2_635_l1},
/*h(1410)=636 */ {1410, xed3_phash_find_map0x0F_opcode0x79_vv2_636_l1},
/*h(423)=637 */ {423, xed3_phash_find_map0x0F_opcode0x79_vv2_637_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20951)=639 */ {20951, xed3_phash_find_map0x0F_opcode0x79_vv2_639_l1},
/*h(15783)=640 */ {15783, xed3_phash_find_map0x0F_opcode0x79_vv2_640_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8641)=642 */ {8641, xed3_phash_find_map0x0F_opcode0x79_vv2_642_l1},
/*h(7654)=643 */ {7654, xed3_phash_find_map0x0F_opcode0x79_vv2_643_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17846)=646 */ {17846, xed3_phash_find_map0x0F_opcode0x79_vv2_646_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4549)=649 */ {4549, xed3_phash_find_map0x0F_opcode0x79_vv2_649_l1},
/*h(3562)=650 */ {3562, xed3_phash_find_map0x0F_opcode0x79_vv2_650_l1},
/*h(26064)=651 */ {26064, xed3_phash_find_map0x0F_opcode0x79_vv2_651_l1},
/*h(25077)=652 */ {25077, xed3_phash_find_map0x0F_opcode0x79_vv2_652_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8586)=654 */ {8586, xed3_phash_find_map0x0F_opcode0x79_vv2_654_l1},
/*h(7599)=655 */ {7599, xed3_phash_find_map0x0F_opcode0x79_vv2_655_l1},
/*h(30101)=656 */ {30101, xed3_phash_find_map0x0F_opcode0x79_vv2_656_l1},
/*h(457)=657 */ {457, xed3_phash_find_map0x0F_opcode0x79_vv2_657_l1},
/*h(21972)=658 */ {21972, xed3_phash_find_map0x0F_opcode0x79_vv2_658_l1},
/*h(16804)=659 */ {16804, xed3_phash_find_map0x0F_opcode0x79_vv2_659_l1},
/*h(14830)=660 */ {14830, xed3_phash_find_map0x0F_opcode0x79_vv2_660_l1},
/*h(4494)=661 */ {4494, xed3_phash_find_map0x0F_opcode0x79_vv2_661_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5570)=668 */ {5570, xed3_phash_find_map0x0F_opcode0x79_vv2_668_l1},
/*h(402)=669 */ {402, xed3_phash_find_map0x0F_opcode0x79_vv2_669_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20930)=671 */ {20930, xed3_phash_find_map0x0F_opcode0x79_vv2_671_l1},
/*h(15762)=672 */ {15762, xed3_phash_find_map0x0F_opcode0x79_vv2_672_l1},
/*h(9607)=673 */ {9607, xed3_phash_find_map0x0F_opcode0x79_vv2_673_l1},
/*h(8620)=674 */ {8620, xed3_phash_find_map0x0F_opcode0x79_vv2_674_l1},
/*h(30135)=675 */ {30135, xed3_phash_find_map0x0F_opcode0x79_vv2_675_l1},
/*h(24967)=676 */ {24967, xed3_phash_find_map0x0F_opcode0x79_vv2_676_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16838)=678 */ {16838, xed3_phash_find_map0x0F_opcode0x79_vv2_678_l1},
/*h(11670)=679 */ {11670, xed3_phash_find_map0x0F_opcode0x79_vv2_679_l1},
/*h(5515)=680 */ {5515, xed3_phash_find_map0x0F_opcode0x79_vv2_680_l1},
/*h(4528)=681 */ {4528, xed3_phash_find_map0x0F_opcode0x79_vv2_681_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25056)=683 */ {25056, xed3_phash_find_map0x0F_opcode0x79_vv2_683_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13733)=685 */ {13733, xed3_phash_find_map0x0F_opcode0x79_vv2_685_l1},
/*h(11759)=686 */ {11759, xed3_phash_find_map0x0F_opcode0x79_vv2_686_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5604)=688 */ {5604, xed3_phash_find_map0x0F_opcode0x79_vv2_688_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20964)=691 */ {20964, xed3_phash_find_map0x0F_opcode0x79_vv2_691_l1},
/*h(9641)=692 */ {9641, xed3_phash_find_map0x0F_opcode0x79_vv2_692_l1},
/*h(8654)=693 */ {8654, xed3_phash_find_map0x0F_opcode0x79_vv2_693_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1512)=695 */ {1512, xed3_phash_find_map0x0F_opcode0x79_vv2_695_l1},
/*h(25001)=696 */ {25001, xed3_phash_find_map0x0F_opcode0x79_vv2_696_l1},
/*h(17859)=697 */ {17859, xed3_phash_find_map0x0F_opcode0x79_vv2_697_l1},
/*h(16872)=698 */ {16872, xed3_phash_find_map0x0F_opcode0x79_vv2_698_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5549)=700 */ {5549, xed3_phash_find_map0x0F_opcode0x79_vv2_700_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21896)=702 */ {21896, xed3_phash_find_map0x0F_opcode0x79_vv2_702_l1},
/*h(20909)=703 */ {20909, xed3_phash_find_map0x0F_opcode0x79_vv2_703_l1},
/*h(14754)=704 */ {14754, xed3_phash_find_map0x0F_opcode0x79_vv2_704_l1},
/*h(13767)=705 */ {13767, xed3_phash_find_map0x0F_opcode0x79_vv2_705_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1457)=707 */ {1457, xed3_phash_find_map0x0F_opcode0x79_vv2_707_l1},
/*h(29127)=708 */ {29127, xed3_phash_find_map0x0F_opcode0x79_vv2_708_l1},
/*h(17804)=709 */ {17804, xed3_phash_find_map0x0F_opcode0x79_vv2_709_l1},
/*h(21985)=710 */ {21985, xed3_phash_find_map0x0F_opcode0x79_vv2_710_l1},
/*h(15830)=711 */ {15830, xed3_phash_find_map0x0F_opcode0x79_vv2_711_l1},
/*h(9675)=712 */ {9675, xed3_phash_find_map0x0F_opcode0x79_vv2_712_l1},
/*h(8688)=713 */ {8688, xed3_phash_find_map0x0F_opcode0x79_vv2_713_l1},
/*h(26022)=714 */ {26022, xed3_phash_find_map0x0F_opcode0x79_vv2_714_l1},
/*h(25035)=715 */ {25035, xed3_phash_find_map0x0F_opcode0x79_vv2_715_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17893)=717 */ {17893, xed3_phash_find_map0x0F_opcode0x79_vv2_717_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6570)=719 */ {6570, xed3_phash_find_map0x0F_opcode0x79_vv2_719_l1},
/*h(4596)=720 */ {4596, xed3_phash_find_map0x0F_opcode0x79_vv2_720_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21930)=722 */ {21930, xed3_phash_find_map0x0F_opcode0x79_vv2_722_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9620)=724 */ {9620, xed3_phash_find_map0x0F_opcode0x79_vv2_724_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2478)=726 */ {2478, xed3_phash_find_map0x0F_opcode0x79_vv2_726_l1},
/*h(24980)=727 */ {24980, xed3_phash_find_map0x0F_opcode0x79_vv2_727_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17838)=729 */ {17838, xed3_phash_find_map0x0F_opcode0x79_vv2_729_l1},
/*h(16851)=730 */ {16851, xed3_phash_find_map0x0F_opcode0x79_vv2_730_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9709)=732 */ {9709, xed3_phash_find_map0x0F_opcode0x79_vv2_732_l1},
/*h(3554)=733 */ {3554, xed3_phash_find_map0x0F_opcode0x79_vv2_733_l1},
/*h(26056)=734 */ {26056, xed3_phash_find_map0x0F_opcode0x79_vv2_734_l1},
/*h(25069)=735 */ {25069, xed3_phash_find_map0x0F_opcode0x79_vv2_735_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12759)=737 */ {12759, xed3_phash_find_map0x0F_opcode0x79_vv2_737_l1},
/*h(7591)=738 */ {7591, xed3_phash_find_map0x0F_opcode0x79_vv2_738_l1},
/*h(449)=739 */ {449, xed3_phash_find_map0x0F_opcode0x79_vv2_739_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21964)=741 */ {21964, xed3_phash_find_map0x0F_opcode0x79_vv2_741_l1},
/*h(20977)=742 */ {20977, xed3_phash_find_map0x0F_opcode0x79_vv2_742_l1},
/*h(14822)=743 */ {14822, xed3_phash_find_map0x0F_opcode0x79_vv2_743_l1},
/*h(4486)=744 */ {4486, xed3_phash_find_map0x0F_opcode0x79_vv2_744_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1525)=746 */ {1525, xed3_phash_find_map0x0F_opcode0x79_vv2_746_l1},
/*h(25014)=747 */ {25014, xed3_phash_find_map0x0F_opcode0x79_vv2_747_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16885)=749 */ {16885, xed3_phash_find_map0x0F_opcode0x79_vv2_749_l1},
/*h(10730)=750 */ {10730, xed3_phash_find_map0x0F_opcode0x79_vv2_750_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(394)=752 */ {394, xed3_phash_find_map0x0F_opcode0x79_vv2_752_l1},
/*h(21909)=753 */ {21909, xed3_phash_find_map0x0F_opcode0x79_vv2_753_l1},
/*h(26090)=754 */ {26090, xed3_phash_find_map0x0F_opcode0x79_vv2_754_l1},
/*h(15754)=755 */ {15754, xed3_phash_find_map0x0F_opcode0x79_vv2_755_l1},
/*h(8612)=756 */ {8612, xed3_phash_find_map0x0F_opcode0x79_vv2_756_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6638)=758 */ {6638, xed3_phash_find_map0x0F_opcode0x79_vv2_758_l1},
/*h(483)=759 */ {483, xed3_phash_find_map0x0F_opcode0x79_vv2_759_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21998)=761 */ {21998, xed3_phash_find_map0x0F_opcode0x79_vv2_761_l1},
/*h(11662)=762 */ {11662, xed3_phash_find_map0x0F_opcode0x79_vv2_762_l1},
/*h(5507)=763 */ {5507, xed3_phash_find_map0x0F_opcode0x79_vv2_763_l1},
/*h(4520)=764 */ {4520, xed3_phash_find_map0x0F_opcode0x79_vv2_764_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20867)=766 */ {20867, xed3_phash_find_map0x0F_opcode0x79_vv2_766_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17906)=768 */ {17906, xed3_phash_find_map0x0F_opcode0x79_vv2_768_l1},
/*h(7570)=769 */ {7570, xed3_phash_find_map0x0F_opcode0x79_vv2_769_l1},
/*h(1415)=770 */ {1415, xed3_phash_find_map0x0F_opcode0x79_vv2_770_l1},
/*h(428)=771 */ {428, xed3_phash_find_map0x0F_opcode0x79_vv2_771_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16775)=773 */ {16775, xed3_phash_find_map0x0F_opcode0x79_vv2_773_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9633)=775 */ {9633, xed3_phash_find_map0x0F_opcode0x79_vv2_775_l1},
/*h(8646)=776 */ {8646, xed3_phash_find_map0x0F_opcode0x79_vv2_776_l1},
/*h(3478)=777 */ {3478, xed3_phash_find_map0x0F_opcode0x79_vv2_777_l1},
/*h(1504)=778 */ {1504, xed3_phash_find_map0x0F_opcode0x79_vv2_778_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16864)=781 */ {16864, xed3_phash_find_map0x0F_opcode0x79_vv2_781_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4554)=783 */ {4554, xed3_phash_find_map0x0F_opcode0x79_vv2_783_l1},
/*h(3567)=784 */ {3567, xed3_phash_find_map0x0F_opcode0x79_vv2_784_l1},
/*h(21888)=785 */ {21888, xed3_phash_find_map0x0F_opcode0x79_vv2_785_l1},
/*h(20901)=786 */ {20901, xed3_phash_find_map0x0F_opcode0x79_vv2_786_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8591)=788 */ {8591, xed3_phash_find_map0x0F_opcode0x79_vv2_788_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1449)=790 */ {1449, xed3_phash_find_map0x0F_opcode0x79_vv2_790_l1},
/*h(462)=791 */ {462, xed3_phash_find_map0x0F_opcode0x79_vv2_791_l1},
/*h(17796)=792 */ {17796, xed3_phash_find_map0x0F_opcode0x79_vv2_792_l1},
/*h(16809)=793 */ {16809, xed3_phash_find_map0x0F_opcode0x79_vv2_793_l1},
/*h(15822)=794 */ {15822, xed3_phash_find_map0x0F_opcode0x79_vv2_794_l1},
/*h(4499)=795 */ {4499, xed3_phash_find_map0x0F_opcode0x79_vv2_795_l1},
/*h(8680)=796 */ {8680, xed3_phash_find_map0x0F_opcode0x79_vv2_796_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25027)=798 */ {25027, xed3_phash_find_map0x0F_opcode0x79_vv2_798_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12717)=800 */ {12717, xed3_phash_find_map0x0F_opcode0x79_vv2_800_l1},
/*h(11730)=801 */ {11730, xed3_phash_find_map0x0F_opcode0x79_vv2_801_l1},
/*h(6562)=802 */ {6562, xed3_phash_find_map0x0F_opcode0x79_vv2_802_l1},
/*h(407)=803 */ {407, xed3_phash_find_map0x0F_opcode0x79_vv2_803_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20935)=805 */ {20935, xed3_phash_find_map0x0F_opcode0x79_vv2_805_l1},
/*h(15767)=806 */ {15767, xed3_phash_find_map0x0F_opcode0x79_vv2_806_l1},
/*h(9612)=807 */ {9612, xed3_phash_find_map0x0F_opcode0x79_vv2_807_l1},
/*h(7638)=808 */ {7638, xed3_phash_find_map0x0F_opcode0x79_vv2_808_l1},
/*h(2470)=809 */ {2470, xed3_phash_find_map0x0F_opcode0x79_vv2_809_l1},
/*h(1483)=810 */ {1483, xed3_phash_find_map0x0F_opcode0x79_vv2_810_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17830)=812 */ {17830, xed3_phash_find_map0x0F_opcode0x79_vv2_812_l1},
/*h(16843)=813 */ {16843, xed3_phash_find_map0x0F_opcode0x79_vv2_813_l1},
/*h(5520)=814 */ {5520, xed3_phash_find_map0x0F_opcode0x79_vv2_814_l1},
/*h(4533)=815 */ {4533, xed3_phash_find_map0x0F_opcode0x79_vv2_815_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26048)=817 */ {26048, xed3_phash_find_map0x0F_opcode0x79_vv2_817_l1},
/*h(25061)=818 */ {25061, xed3_phash_find_map0x0F_opcode0x79_vv2_818_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12751)=820 */ {12751, xed3_phash_find_map0x0F_opcode0x79_vv2_820_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5609)=822 */ {5609, xed3_phash_find_map0x0F_opcode0x79_vv2_822_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21956)=824 */ {21956, xed3_phash_find_map0x0F_opcode0x79_vv2_824_l1},
/*h(20969)=825 */ {20969, xed3_phash_find_map0x0F_opcode0x79_vv2_825_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8659)=827 */ {8659, xed3_phash_find_map0x0F_opcode0x79_vv2_827_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25993)=829 */ {25993, xed3_phash_find_map0x0F_opcode0x79_vv2_829_l1},
/*h(25006)=830 */ {25006, xed3_phash_find_map0x0F_opcode0x79_vv2_830_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17864)=832 */ {17864, xed3_phash_find_map0x0F_opcode0x79_vv2_832_l1},
/*h(10722)=833 */ {10722, xed3_phash_find_map0x0F_opcode0x79_vv2_833_l1},
/*h(5554)=834 */ {5554, xed3_phash_find_map0x0F_opcode0x79_vv2_834_l1},
/*h(4567)=835 */ {4567, xed3_phash_find_map0x0F_opcode0x79_vv2_835_l1},
/*h(26082)=836 */ {26082, xed3_phash_find_map0x0F_opcode0x79_vv2_836_l1},
/*h(20914)=837 */ {20914, xed3_phash_find_map0x0F_opcode0x79_vv2_837_l1},
/*h(15746)=838 */ {15746, xed3_phash_find_map0x0F_opcode0x79_vv2_838_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30119)=841 */ {30119, xed3_phash_find_map0x0F_opcode0x79_vv2_841_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21990)=844 */ {21990, xed3_phash_find_map0x0F_opcode0x79_vv2_844_l1},
/*h(11654)=845 */ {11654, xed3_phash_find_map0x0F_opcode0x79_vv2_845_l1},
/*h(9680)=846 */ {9680, xed3_phash_find_map0x0F_opcode0x79_vv2_846_l1},
/*h(4512)=847 */ {4512, xed3_phash_find_map0x0F_opcode0x79_vv2_847_l1},
/*h(2538)=848 */ {2538, xed3_phash_find_map0x0F_opcode0x79_vv2_848_l1},
/*h(25040)=849 */ {25040, xed3_phash_find_map0x0F_opcode0x79_vv2_849_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13717)=851 */ {13717, xed3_phash_find_map0x0F_opcode0x79_vv2_851_l1},
/*h(7562)=852 */ {7562, xed3_phash_find_map0x0F_opcode0x79_vv2_852_l1},
/*h(6575)=853 */ {6575, xed3_phash_find_map0x0F_opcode0x79_vv2_853_l1},
/*h(29077)=854 */ {29077, xed3_phash_find_map0x0F_opcode0x79_vv2_854_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21935)=856 */ {21935, xed3_phash_find_map0x0F_opcode0x79_vv2_856_l1},
/*h(20948)=857 */ {20948, xed3_phash_find_map0x0F_opcode0x79_vv2_857_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3470)=859 */ {3470, xed3_phash_find_map0x0F_opcode0x79_vv2_859_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17843)=863 */ {17843, xed3_phash_find_map0x0F_opcode0x79_vv2_863_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9714)=866 */ {9714, xed3_phash_find_map0x0F_opcode0x79_vv2_866_l1},
/*h(3559)=867 */ {3559, xed3_phash_find_map0x0F_opcode0x79_vv2_867_l1},
/*h(26061)=868 */ {26061, xed3_phash_find_map0x0F_opcode0x79_vv2_868_l1},
/*h(25074)=869 */ {25074, xed3_phash_find_map0x0F_opcode0x79_vv2_869_l1},
/*h(14738)=870 */ {14738, xed3_phash_find_map0x0F_opcode0x79_vv2_870_l1},
/*h(13751)=871 */ {13751, xed3_phash_find_map0x0F_opcode0x79_vv2_871_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5622)=873 */ {5622, xed3_phash_find_map0x0F_opcode0x79_vv2_873_l1},
/*h(29111)=874 */ {29111, xed3_phash_find_map0x0F_opcode0x79_vv2_874_l1},
/*h(21969)=875 */ {21969, xed3_phash_find_map0x0F_opcode0x79_vv2_875_l1},
/*h(20982)=876 */ {20982, xed3_phash_find_map0x0F_opcode0x79_vv2_876_l1},
/*h(15814)=877 */ {15814, xed3_phash_find_map0x0F_opcode0x79_vv2_877_l1},
/*h(4491)=878 */ {4491, xed3_phash_find_map0x0F_opcode0x79_vv2_878_l1},
/*h(8672)=879 */ {8672, xed3_phash_find_map0x0F_opcode0x79_vv2_879_l1},
/*h(26006)=880 */ {26006, xed3_phash_find_map0x0F_opcode0x79_vv2_880_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12709)=883 */ {12709, xed3_phash_find_map0x0F_opcode0x79_vv2_883_l1},
/*h(11722)=884 */ {11722, xed3_phash_find_map0x0F_opcode0x79_vv2_884_l1},
/*h(10735)=885 */ {10735, xed3_phash_find_map0x0F_opcode0x79_vv2_885_l1},
/*h(4580)=886 */ {4580, xed3_phash_find_map0x0F_opcode0x79_vv2_886_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26095)=888 */ {26095, xed3_phash_find_map0x0F_opcode0x79_vv2_888_l1},
/*h(15759)=889 */ {15759, xed3_phash_find_map0x0F_opcode0x79_vv2_889_l1},
/*h(9604)=890 */ {9604, xed3_phash_find_map0x0F_opcode0x79_vv2_890_l1},
/*h(7630)=891 */ {7630, xed3_phash_find_map0x0F_opcode0x79_vv2_891_l1},
/*h(1475)=892 */ {1475, xed3_phash_find_map0x0F_opcode0x79_vv2_892_l1},
/*h(24964)=893 */ {24964, xed3_phash_find_map0x0F_opcode0x79_vv2_893_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(22003)=895 */ {22003, xed3_phash_find_map0x0F_opcode0x79_vv2_895_l1},
/*h(16835)=896 */ {16835, xed3_phash_find_map0x0F_opcode0x79_vv2_896_l1},
/*h(5512)=897 */ {5512, xed3_phash_find_map0x0F_opcode0x79_vv2_897_l1},
/*h(4525)=898 */ {4525, xed3_phash_find_map0x0F_opcode0x79_vv2_898_l1},
/*h(3538)=899 */ {3538, xed3_phash_find_map0x0F_opcode0x79_vv2_899_l1},
/*h(20872)=900 */ {20872, xed3_phash_find_map0x0F_opcode0x79_vv2_900_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17911)=902 */ {17911, xed3_phash_find_map0x0F_opcode0x79_vv2_902_l1},
/*h(7575)=903 */ {7575, xed3_phash_find_map0x0F_opcode0x79_vv2_903_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5601)=905 */ {5601, xed3_phash_find_map0x0F_opcode0x79_vv2_905_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20961)=908 */ {20961, xed3_phash_find_map0x0F_opcode0x79_vv2_908_l1},
/*h(14806)=909 */ {14806, xed3_phash_find_map0x0F_opcode0x79_vv2_909_l1},
/*h(8651)=910 */ {8651, xed3_phash_find_map0x0F_opcode0x79_vv2_910_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1509)=912 */ {1509, xed3_phash_find_map0x0F_opcode0x79_vv2_912_l1},
/*h(24998)=913 */ {24998, xed3_phash_find_map0x0F_opcode0x79_vv2_913_l1},
/*h(17856)=914 */ {17856, xed3_phash_find_map0x0F_opcode0x79_vv2_914_l1},
/*h(16869)=915 */ {16869, xed3_phash_find_map0x0F_opcode0x79_vv2_915_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5546)=917 */ {5546, xed3_phash_find_map0x0F_opcode0x79_vv2_917_l1},
/*h(4559)=918 */ {4559, xed3_phash_find_map0x0F_opcode0x79_vv2_918_l1},
/*h(21893)=919 */ {21893, xed3_phash_find_map0x0F_opcode0x79_vv2_919_l1},
/*h(20906)=920 */ {20906, xed3_phash_find_map0x0F_opcode0x79_vv2_920_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8596)=922 */ {8596, xed3_phash_find_map0x0F_opcode0x79_vv2_922_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1454)=924 */ {1454, xed3_phash_find_map0x0F_opcode0x79_vv2_924_l1},
/*h(467)=925 */ {467, xed3_phash_find_map0x0F_opcode0x79_vv2_925_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16814)=927 */ {16814, xed3_phash_find_map0x0F_opcode0x79_vv2_927_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9672)=929 */ {9672, xed3_phash_find_map0x0F_opcode0x79_vv2_929_l1},
/*h(8685)=930 */ {8685, xed3_phash_find_map0x0F_opcode0x79_vv2_930_l1},
/*h(2530)=931 */ {2530, xed3_phash_find_map0x0F_opcode0x79_vv2_931_l1},
/*h(26019)=932 */ {26019, xed3_phash_find_map0x0F_opcode0x79_vv2_932_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13709)=934 */ {13709, xed3_phash_find_map0x0F_opcode0x79_vv2_934_l1},
/*h(7554)=935 */ {7554, xed3_phash_find_map0x0F_opcode0x79_vv2_935_l1},
/*h(6567)=936 */ {6567, xed3_phash_find_map0x0F_opcode0x79_vv2_936_l1},
/*h(4593)=937 */ {4593, xed3_phash_find_map0x0F_opcode0x79_vv2_937_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21927)=939 */ {21927, xed3_phash_find_map0x0F_opcode0x79_vv2_939_l1},
/*h(20940)=940 */ {20940, xed3_phash_find_map0x0F_opcode0x79_vv2_940_l1},
/*h(9617)=941 */ {9617, xed3_phash_find_map0x0F_opcode0x79_vv2_941_l1},
/*h(8630)=942 */ {8630, xed3_phash_find_map0x0F_opcode0x79_vv2_942_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24977)=944 */ {24977, xed3_phash_find_map0x0F_opcode0x79_vv2_944_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17835)=946 */ {17835, xed3_phash_find_map0x0F_opcode0x79_vv2_946_l1},
/*h(16848)=947 */ {16848, xed3_phash_find_map0x0F_opcode0x79_vv2_947_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5525)=949 */ {5525, xed3_phash_find_map0x0F_opcode0x79_vv2_949_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26053)=951 */ {26053, xed3_phash_find_map0x0F_opcode0x79_vv2_951_l1},
/*h(25066)=952 */ {25066, xed3_phash_find_map0x0F_opcode0x79_vv2_952_l1},
/*h(14730)=953 */ {14730, xed3_phash_find_map0x0F_opcode0x79_vv2_953_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5614)=956 */ {5614, xed3_phash_find_map0x0F_opcode0x79_vv2_956_l1},
/*h(29103)=957 */ {29103, xed3_phash_find_map0x0F_opcode0x79_vv2_957_l1},
/*h(21961)=958 */ {21961, xed3_phash_find_map0x0F_opcode0x79_vv2_958_l1},
/*h(20974)=959 */ {20974, xed3_phash_find_map0x0F_opcode0x79_vv2_959_l1},
/*h(10638)=960 */ {10638, xed3_phash_find_map0x0F_opcode0x79_vv2_960_l1},
/*h(4483)=961 */ {4483, xed3_phash_find_map0x0F_opcode0x79_vv2_961_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1522)=963 */ {1522, xed3_phash_find_map0x0F_opcode0x79_vv2_963_l1},
/*h(25011)=964 */ {25011, xed3_phash_find_map0x0F_opcode0x79_vv2_964_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16882)=966 */ {16882, xed3_phash_find_map0x0F_opcode0x79_vv2_966_l1},
/*h(6546)=967 */ {6546, xed3_phash_find_map0x0F_opcode0x79_vv2_967_l1},
/*h(10727)=968 */ {10727, xed3_phash_find_map0x0F_opcode0x79_vv2_968_l1},
/*h(391)=969 */ {391, xed3_phash_find_map0x0F_opcode0x79_vv2_969_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20919)=971 */ {20919, xed3_phash_find_map0x0F_opcode0x79_vv2_971_l1},
/*h(15751)=972 */ {15751, xed3_phash_find_map0x0F_opcode0x79_vv2_972_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7622)=974 */ {7622, xed3_phash_find_map0x0F_opcode0x79_vv2_974_l1},
/*h(2454)=975 */ {2454, xed3_phash_find_map0x0F_opcode0x79_vv2_975_l1},
/*h(480)=976 */ {480, xed3_phash_find_map0x0F_opcode0x79_vv2_976_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21995)=978 */ {21995, xed3_phash_find_map0x0F_opcode0x79_vv2_978_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5504)=980 */ {5504, xed3_phash_find_map0x0F_opcode0x79_vv2_980_l1},
/*h(4517)=981 */ {4517, xed3_phash_find_map0x0F_opcode0x79_vv2_981_l1},
/*h(3530)=982 */ {3530, xed3_phash_find_map0x0F_opcode0x79_vv2_982_l1},
/*h(25045)=983 */ {25045, xed3_phash_find_map0x0F_opcode0x79_vv2_983_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17903)=985 */ {17903, xed3_phash_find_map0x0F_opcode0x79_vv2_985_l1},
/*h(7567)=986 */ {7567, xed3_phash_find_map0x0F_opcode0x79_vv2_986_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1412)=988 */ {1412, xed3_phash_find_map0x0F_opcode0x79_vv2_988_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21940)=990 */ {21940, xed3_phash_find_map0x0F_opcode0x79_vv2_990_l1},
/*h(16772)=991 */ {16772, xed3_phash_find_map0x0F_opcode0x79_vv2_991_l1},
/*h(14798)=992 */ {14798, xed3_phash_find_map0x0F_opcode0x79_vv2_992_l1},
/*h(8643)=993 */ {8643, xed3_phash_find_map0x0F_opcode0x79_vv2_993_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10706)=999 */ {10706, xed3_phash_find_map0x0F_opcode0x79_vv2_999_l1},
/*h(9719)=1000 */ {9719, xed3_phash_find_map0x0F_opcode0x79_vv2_1000_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26066)=1002 */ {26066, xed3_phash_find_map0x0F_opcode0x79_vv2_1002_l1},
/*h(25079)=1003 */ {25079, xed3_phash_find_map0x0F_opcode0x79_vv2_1003_l1},
/*h(14743)=1004 */ {14743, xed3_phash_find_map0x0F_opcode0x79_vv2_1004_l1},
/*h(8588)=1005 */ {8588, xed3_phash_find_map0x0F_opcode0x79_vv2_1005_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30103)=1007 */ {30103, xed3_phash_find_map0x0F_opcode0x79_vv2_1007_l1},
/*h(459)=1008 */ {459, xed3_phash_find_map0x0F_opcode0x79_vv2_1008_l1},
/*h(17793)=1009 */ {17793, xed3_phash_find_map0x0F_opcode0x79_vv2_1009_l1},
/*h(21974)=1010 */ {21974, xed3_phash_find_map0x0F_opcode0x79_vv2_1010_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9664)=1012 */ {9664, xed3_phash_find_map0x0F_opcode0x79_vv2_1012_l1},
/*h(4496)=1013 */ {4496, xed3_phash_find_map0x0F_opcode0x79_vv2_1013_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25024)=1015 */ {25024, xed3_phash_find_map0x0F_opcode0x79_vv2_1015_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13701)=1017 */ {13701, xed3_phash_find_map0x0F_opcode0x79_vv2_1017_l1},
/*h(11727)=1018 */ {11727, xed3_phash_find_map0x0F_opcode0x79_vv2_1018_l1},
/*h(5572)=1019 */ {5572, xed3_phash_find_map0x0F_opcode0x79_vv2_1019_l1},
/*h(4585)=1020 */ {4585, xed3_phash_find_map0x0F_opcode0x79_vv2_1020_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20932)=1022 */ {20932, xed3_phash_find_map0x0F_opcode0x79_vv2_1022_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9609)=1024 */ {9609, xed3_phash_find_map0x0F_opcode0x79_vv2_1024_l1},
/*h(8622)=1025 */ {8622, xed3_phash_find_map0x0F_opcode0x79_vv2_1025_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(493)=1027 */ {493, xed3_phash_find_map0x0F_opcode0x79_vv2_1027_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17827)=1029 */ {17827, xed3_phash_find_map0x0F_opcode0x79_vv2_1029_l1},
/*h(16840)=1030 */ {16840, xed3_phash_find_map0x0F_opcode0x79_vv2_1030_l1},
/*h(5517)=1031 */ {5517, xed3_phash_find_map0x0F_opcode0x79_vv2_1031_l1},
/*h(4530)=1032 */ {4530, xed3_phash_find_map0x0F_opcode0x79_vv2_1032_l1},
/*h(3543)=1033 */ {3543, xed3_phash_find_map0x0F_opcode0x79_vv2_1033_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25058)=1035 */ {25058, xed3_phash_find_map0x0F_opcode0x79_vv2_1035_l1},
/*h(14722)=1036 */ {14722, xed3_phash_find_map0x0F_opcode0x79_vv2_1036_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5606)=1039 */ {5606, xed3_phash_find_map0x0F_opcode0x79_vv2_1039_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21953)=1041 */ {21953, xed3_phash_find_map0x0F_opcode0x79_vv2_1041_l1},
/*h(20966)=1042 */ {20966, xed3_phash_find_map0x0F_opcode0x79_vv2_1042_l1},
/*h(10630)=1043 */ {10630, xed3_phash_find_map0x0F_opcode0x79_vv2_1043_l1},
/*h(8656)=1044 */ {8656, xed3_phash_find_map0x0F_opcode0x79_vv2_1044_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1514)=1046 */ {1514, xed3_phash_find_map0x0F_opcode0x79_vv2_1046_l1},
/*h(25003)=1047 */ {25003, xed3_phash_find_map0x0F_opcode0x79_vv2_1047_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16874)=1049 */ {16874, xed3_phash_find_map0x0F_opcode0x79_vv2_1049_l1},
/*h(6538)=1050 */ {6538, xed3_phash_find_map0x0F_opcode0x79_vv2_1050_l1},
/*h(5551)=1051 */ {5551, xed3_phash_find_map0x0F_opcode0x79_vv2_1051_l1},
/*h(4564)=1052 */ {4564, xed3_phash_find_map0x0F_opcode0x79_vv2_1052_l1},
/*h(21898)=1053 */ {21898, xed3_phash_find_map0x0F_opcode0x79_vv2_1053_l1},
/*h(20911)=1054 */ {20911, xed3_phash_find_map0x0F_opcode0x79_vv2_1054_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2446)=1058 */ {2446, xed3_phash_find_map0x0F_opcode0x79_vv2_1058_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21987)=1061 */ {21987, xed3_phash_find_map0x0F_opcode0x79_vv2_1061_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9677)=1063 */ {9677, xed3_phash_find_map0x0F_opcode0x79_vv2_1063_l1},
/*h(3522)=1064 */ {3522, xed3_phash_find_map0x0F_opcode0x79_vv2_1064_l1},
/*h(2535)=1065 */ {2535, xed3_phash_find_map0x0F_opcode0x79_vv2_1065_l1},
/*h(26024)=1066 */ {26024, xed3_phash_find_map0x0F_opcode0x79_vv2_1066_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17895)=1068 */ {17895, xed3_phash_find_map0x0F_opcode0x79_vv2_1068_l1},
/*h(12727)=1069 */ {12727, xed3_phash_find_map0x0F_opcode0x79_vv2_1069_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4598)=1071 */ {4598, xed3_phash_find_map0x0F_opcode0x79_vv2_1071_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21932)=1073 */ {21932, xed3_phash_find_map0x0F_opcode0x79_vv2_1073_l1},
/*h(20945)=1074 */ {20945, xed3_phash_find_map0x0F_opcode0x79_vv2_1074_l1},
/*h(9622)=1075 */ {9622, xed3_phash_find_map0x0F_opcode0x79_vv2_1075_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24982)=1078 */ {24982, xed3_phash_find_map0x0F_opcode0x79_vv2_1078_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17840)=1080 */ {17840, xed3_phash_find_map0x0F_opcode0x79_vv2_1080_l1},
/*h(16853)=1081 */ {16853, xed3_phash_find_map0x0F_opcode0x79_vv2_1081_l1},
/*h(10698)=1082 */ {10698, xed3_phash_find_map0x0F_opcode0x79_vv2_1082_l1},
/*h(9711)=1083 */ {9711, xed3_phash_find_map0x0F_opcode0x79_vv2_1083_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26058)=1085 */ {26058, xed3_phash_find_map0x0F_opcode0x79_vv2_1085_l1},
/*h(25071)=1086 */ {25071, xed3_phash_find_map0x0F_opcode0x79_vv2_1086_l1},
/*h(14735)=1087 */ {14735, xed3_phash_find_map0x0F_opcode0x79_vv2_1087_l1},
/*h(8580)=1088 */ {8580, xed3_phash_find_map0x0F_opcode0x79_vv2_1088_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6606)=1090 */ {6606, xed3_phash_find_map0x0F_opcode0x79_vv2_1090_l1},
/*h(451)=1091 */ {451, xed3_phash_find_map0x0F_opcode0x79_vv2_1091_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20979)=1093 */ {20979, xed3_phash_find_map0x0F_opcode0x79_vv2_1093_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4488)=1095 */ {4488, xed3_phash_find_map0x0F_opcode0x79_vv2_1095_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26003)=1097 */ {26003, xed3_phash_find_map0x0F_opcode0x79_vv2_1097_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17874)=1100 */ {17874, xed3_phash_find_map0x0F_opcode0x79_vv2_1100_l1},
/*h(16887)=1101 */ {16887, xed3_phash_find_map0x0F_opcode0x79_vv2_1101_l1},
/*h(6551)=1102 */ {6551, xed3_phash_find_map0x0F_opcode0x79_vv2_1102_l1},
/*h(4577)=1103 */ {4577, xed3_phash_find_map0x0F_opcode0x79_vv2_1103_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26092)=1105 */ {26092, xed3_phash_find_map0x0F_opcode0x79_vv2_1105_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9601)=1107 */ {9601, xed3_phash_find_map0x0F_opcode0x79_vv2_1107_l1},
/*h(8614)=1108 */ {8614, xed3_phash_find_map0x0F_opcode0x79_vv2_1108_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(485)=1110 */ {485, xed3_phash_find_map0x0F_opcode0x79_vv2_1110_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(22000)=1112 */ {22000, xed3_phash_find_map0x0F_opcode0x79_vv2_1112_l1},
/*h(16832)=1113 */ {16832, xed3_phash_find_map0x0F_opcode0x79_vv2_1113_l1},
/*h(5509)=1114 */ {5509, xed3_phash_find_map0x0F_opcode0x79_vv2_1114_l1},
/*h(4522)=1115 */ {4522, xed3_phash_find_map0x0F_opcode0x79_vv2_1115_l1},
/*h(3535)=1116 */ {3535, xed3_phash_find_map0x0F_opcode0x79_vv2_1116_l1},
/*h(20869)=1117 */ {20869, xed3_phash_find_map0x0F_opcode0x79_vv2_1117_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17908)=1119 */ {17908, xed3_phash_find_map0x0F_opcode0x79_vv2_1119_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(430)=1122 */ {430, xed3_phash_find_map0x0F_opcode0x79_vv2_1122_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(15790)=1125 */ {15790, xed3_phash_find_map0x0F_opcode0x79_vv2_1125_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8648)=1127 */ {8648, xed3_phash_find_map0x0F_opcode0x79_vv2_1127_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1506)=1129 */ {1506, xed3_phash_find_map0x0F_opcode0x79_vv2_1129_l1},
/*h(24995)=1130 */ {24995, xed3_phash_find_map0x0F_opcode0x79_vv2_1130_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12685)=1132 */ {12685, xed3_phash_find_map0x0F_opcode0x79_vv2_1132_l1},
/*h(6530)=1133 */ {6530, xed3_phash_find_map0x0F_opcode0x79_vv2_1133_l1},
/*h(5543)=1134 */ {5543, xed3_phash_find_map0x0F_opcode0x79_vv2_1134_l1},
/*h(4556)=1135 */ {4556, xed3_phash_find_map0x0F_opcode0x79_vv2_1135_l1},
/*h(21890)=1136 */ {21890, xed3_phash_find_map0x0F_opcode0x79_vv2_1136_l1},
/*h(20903)=1137 */ {20903, xed3_phash_find_map0x0F_opcode0x79_vv2_1137_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8593)=1139 */ {8593, xed3_phash_find_map0x0F_opcode0x79_vv2_1139_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2438)=1141 */ {2438, xed3_phash_find_map0x0F_opcode0x79_vv2_1141_l1},
/*h(464)=1142 */ {464, xed3_phash_find_map0x0F_opcode0x79_vv2_1142_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16811)=1144 */ {16811, xed3_phash_find_map0x0F_opcode0x79_vv2_1144_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9669)=1146 */ {9669, xed3_phash_find_map0x0F_opcode0x79_vv2_1146_l1},
/*h(4501)=1147 */ {4501, xed3_phash_find_map0x0F_opcode0x79_vv2_1147_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(30197)=1149 */ {30197, xed3_phash_find_map0x0F_opcode0x79_vv2_1149_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12719)=1152 */ {12719, xed3_phash_find_map0x0F_opcode0x79_vv2_1152_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4590)=1154 */ {4590, xed3_phash_find_map0x0F_opcode0x79_vv2_1154_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21924)=1156 */ {21924, xed3_phash_find_map0x0F_opcode0x79_vv2_1156_l1},
/*h(20937)=1157 */ {20937, xed3_phash_find_map0x0F_opcode0x79_vv2_1157_l1},
/*h(9614)=1158 */ {9614, xed3_phash_find_map0x0F_opcode0x79_vv2_1158_l1},
/*h(8627)=1159 */ {8627, xed3_phash_find_map0x0F_opcode0x79_vv2_1159_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1485)=1161 */ {1485, xed3_phash_find_map0x0F_opcode0x79_vv2_1161_l1},
/*h(498)=1162 */ {498, xed3_phash_find_map0x0F_opcode0x79_vv2_1162_l1},
/*h(17832)=1163 */ {17832, xed3_phash_find_map0x0F_opcode0x79_vv2_1163_l1},
/*h(16845)=1164 */ {16845, xed3_phash_find_map0x0F_opcode0x79_vv2_1164_l1},
/*h(10690)=1165 */ {10690, xed3_phash_find_map0x0F_opcode0x79_vv2_1165_l1},
/*h(5522)=1166 */ {5522, xed3_phash_find_map0x0F_opcode0x79_vv2_1166_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26050)=1168 */ {26050, xed3_phash_find_map0x0F_opcode0x79_vv2_1168_l1},
/*h(25063)=1169 */ {25063, xed3_phash_find_map0x0F_opcode0x79_vv2_1169_l1},
/*h(14727)=1170 */ {14727, xed3_phash_find_map0x0F_opcode0x79_vv2_1170_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6598)=1172 */ {6598, xed3_phash_find_map0x0F_opcode0x79_vv2_1172_l1},
/*h(5611)=1173 */ {5611, xed3_phash_find_map0x0F_opcode0x79_vv2_1173_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21958)=1175 */ {21958, xed3_phash_find_map0x0F_opcode0x79_vv2_1175_l1},
/*h(16790)=1176 */ {16790, xed3_phash_find_map0x0F_opcode0x79_vv2_1176_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4480)=1178 */ {4480, xed3_phash_find_map0x0F_opcode0x79_vv2_1178_l1},
/*h(8661)=1179 */ {8661, xed3_phash_find_map0x0F_opcode0x79_vv2_1179_l1},
/*h(1519)=1180 */ {1519, xed3_phash_find_map0x0F_opcode0x79_vv2_1180_l1},
/*h(25008)=1181 */ {25008, xed3_phash_find_map0x0F_opcode0x79_vv2_1181_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16879)=1183 */ {16879, xed3_phash_find_map0x0F_opcode0x79_vv2_1183_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6543)=1185 */ {6543, xed3_phash_find_map0x0F_opcode0x79_vv2_1185_l1},
/*h(388)=1186 */ {388, xed3_phash_find_map0x0F_opcode0x79_vv2_1186_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26084)=1188 */ {26084, xed3_phash_find_map0x0F_opcode0x79_vv2_1188_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21992)=1195 */ {21992, xed3_phash_find_map0x0F_opcode0x79_vv2_1195_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9682)=1197 */ {9682, xed3_phash_find_map0x0F_opcode0x79_vv2_1197_l1},
/*h(8695)=1198 */ {8695, xed3_phash_find_map0x0F_opcode0x79_vv2_1198_l1},
/*h(3527)=1199 */ {3527, xed3_phash_find_map0x0F_opcode0x79_vv2_1199_l1},
/*h(26029)=1200 */ {26029, xed3_phash_find_map0x0F_opcode0x79_vv2_1200_l1},
/*h(25042)=1201 */ {25042, xed3_phash_find_map0x0F_opcode0x79_vv2_1201_l1},
/*h(17900)=1202 */ {17900, xed3_phash_find_map0x0F_opcode0x79_vv2_1202_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(422)=1205 */ {422, xed3_phash_find_map0x0F_opcode0x79_vv2_1205_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21937)=1207 */ {21937, xed3_phash_find_map0x0F_opcode0x79_vv2_1207_l1},
/*h(15782)=1208 */ {15782, xed3_phash_find_map0x0F_opcode0x79_vv2_1208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8640)=1210 */ {8640, xed3_phash_find_map0x0F_opcode0x79_vv2_1210_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17845)=1214 */ {17845, xed3_phash_find_map0x0F_opcode0x79_vv2_1214_l1},
/*h(12677)=1215 */ {12677, xed3_phash_find_map0x0F_opcode0x79_vv2_1215_l1},
/*h(11690)=1216 */ {11690, xed3_phash_find_map0x0F_opcode0x79_vv2_1216_l1},
/*h(9716)=1217 */ {9716, xed3_phash_find_map0x0F_opcode0x79_vv2_1217_l1},
/*h(4548)=1218 */ {4548, xed3_phash_find_map0x0F_opcode0x79_vv2_1218_l1},
/*h(26063)=1219 */ {26063, xed3_phash_find_map0x0F_opcode0x79_vv2_1219_l1},
/*h(25076)=1220 */ {25076, xed3_phash_find_map0x0F_opcode0x79_vv2_1220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8585)=1222 */ {8585, xed3_phash_find_map0x0F_opcode0x79_vv2_1222_l1},
/*h(7598)=1223 */ {7598, xed3_phash_find_map0x0F_opcode0x79_vv2_1223_l1},
/*h(1443)=1224 */ {1443, xed3_phash_find_map0x0F_opcode0x79_vv2_1224_l1},
/*h(456)=1225 */ {456, xed3_phash_find_map0x0F_opcode0x79_vv2_1225_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21971)=1227 */ {21971, xed3_phash_find_map0x0F_opcode0x79_vv2_1227_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8674)=1230 */ {8674, xed3_phash_find_map0x0F_opcode0x79_vv2_1230_l1},
/*h(2519)=1231 */ {2519, xed3_phash_find_map0x0F_opcode0x79_vv2_1231_l1},
/*h(30189)=1232 */ {30189, xed3_phash_find_map0x0F_opcode0x79_vv2_1232_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17879)=1234 */ {17879, xed3_phash_find_map0x0F_opcode0x79_vv2_1234_l1},
/*h(12711)=1235 */ {12711, xed3_phash_find_map0x0F_opcode0x79_vv2_1235_l1},
/*h(5569)=1236 */ {5569, xed3_phash_find_map0x0F_opcode0x79_vv2_1236_l1},
/*h(4582)=1237 */ {4582, xed3_phash_find_map0x0F_opcode0x79_vv2_1237_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26097)=1239 */ {26097, xed3_phash_find_map0x0F_opcode0x79_vv2_1239_l1},
/*h(20929)=1240 */ {20929, xed3_phash_find_map0x0F_opcode0x79_vv2_1240_l1},
/*h(9606)=1241 */ {9606, xed3_phash_find_map0x0F_opcode0x79_vv2_1241_l1},
/*h(8619)=1242 */ {8619, xed3_phash_find_map0x0F_opcode0x79_vv2_1242_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1477)=1244 */ {1477, xed3_phash_find_map0x0F_opcode0x79_vv2_1244_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17824)=1246 */ {17824, xed3_phash_find_map0x0F_opcode0x79_vv2_1246_l1},
/*h(16837)=1247 */ {16837, xed3_phash_find_map0x0F_opcode0x79_vv2_1247_l1},
/*h(15850)=1248 */ {15850, xed3_phash_find_map0x0F_opcode0x79_vv2_1248_l1},
/*h(5514)=1249 */ {5514, xed3_phash_find_map0x0F_opcode0x79_vv2_1249_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20874)=1252 */ {20874, xed3_phash_find_map0x0F_opcode0x79_vv2_1252_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11758)=1255 */ {11758, xed3_phash_find_map0x0F_opcode0x79_vv2_1255_l1},
/*h(5603)=1256 */ {5603, xed3_phash_find_map0x0F_opcode0x79_vv2_1256_l1},
/*h(435)=1257 */ {435, xed3_phash_find_map0x0F_opcode0x79_vv2_1257_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20963)=1259 */ {20963, xed3_phash_find_map0x0F_opcode0x79_vv2_1259_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8653)=1261 */ {8653, xed3_phash_find_map0x0F_opcode0x79_vv2_1261_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2498)=1263 */ {2498, xed3_phash_find_map0x0F_opcode0x79_vv2_1263_l1},
/*h(25000)=1264 */ {25000, xed3_phash_find_map0x0F_opcode0x79_vv2_1264_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16871)=1266 */ {16871, xed3_phash_find_map0x0F_opcode0x79_vv2_1266_l1},
/*h(6535)=1267 */ {6535, xed3_phash_find_map0x0F_opcode0x79_vv2_1267_l1},
/*h(5548)=1268 */ {5548, xed3_phash_find_map0x0F_opcode0x79_vv2_1268_l1},
/*h(4561)=1269 */ {4561, xed3_phash_find_map0x0F_opcode0x79_vv2_1269_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21895)=1271 */ {21895, xed3_phash_find_map0x0F_opcode0x79_vv2_1271_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8598)=1274 */ {8598, xed3_phash_find_map0x0F_opcode0x79_vv2_1274_l1},
/*h(1456)=1275 */ {1456, xed3_phash_find_map0x0F_opcode0x79_vv2_1275_l1},
/*h(469)=1276 */ {469, xed3_phash_find_map0x0F_opcode0x79_vv2_1276_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21984)=1278 */ {21984, xed3_phash_find_map0x0F_opcode0x79_vv2_1278_l1},
/*h(16816)=1279 */ {16816, xed3_phash_find_map0x0F_opcode0x79_vv2_1279_l1},
/*h(9674)=1280 */ {9674, xed3_phash_find_map0x0F_opcode0x79_vv2_1280_l1},
/*h(8687)=1281 */ {8687, xed3_phash_find_map0x0F_opcode0x79_vv2_1281_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25034)=1283 */ {25034, xed3_phash_find_map0x0F_opcode0x79_vv2_1283_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17892)=1285 */ {17892, xed3_phash_find_map0x0F_opcode0x79_vv2_1285_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29071)=1288 */ {29071, xed3_phash_find_map0x0F_opcode0x79_vv2_1288_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21929)=1290 */ {21929, xed3_phash_find_map0x0F_opcode0x79_vv2_1290_l1},
/*h(20942)=1291 */ {20942, xed3_phash_find_map0x0F_opcode0x79_vv2_1291_l1},
/*h(9619)=1292 */ {9619, xed3_phash_find_map0x0F_opcode0x79_vv2_1292_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1490)=1295 */ {1490, xed3_phash_find_map0x0F_opcode0x79_vv2_1295_l1},
/*h(24979)=1296 */ {24979, xed3_phash_find_map0x0F_opcode0x79_vv2_1296_l1},
/*h(17837)=1297 */ {17837, xed3_phash_find_map0x0F_opcode0x79_vv2_1297_l1},
/*h(16850)=1298 */ {16850, xed3_phash_find_map0x0F_opcode0x79_vv2_1298_l1},
/*h(11682)=1299 */ {11682, xed3_phash_find_map0x0F_opcode0x79_vv2_1299_l1},
/*h(5527)=1300 */ {5527, xed3_phash_find_map0x0F_opcode0x79_vv2_1300_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26055)=1302 */ {26055, xed3_phash_find_map0x0F_opcode0x79_vv2_1302_l1},
/*h(25068)=1303 */ {25068, xed3_phash_find_map0x0F_opcode0x79_vv2_1303_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8577)=1305 */ {8577, xed3_phash_find_map0x0F_opcode0x79_vv2_1305_l1},
/*h(7590)=1306 */ {7590, xed3_phash_find_map0x0F_opcode0x79_vv2_1306_l1},
/*h(5616)=1307 */ {5616, xed3_phash_find_map0x0F_opcode0x79_vv2_1307_l1},
/*h(448)=1308 */ {448, xed3_phash_find_map0x0F_opcode0x79_vv2_1308_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20976)=1310 */ {20976, xed3_phash_find_map0x0F_opcode0x79_vv2_1310_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9653)=1312 */ {9653, xed3_phash_find_map0x0F_opcode0x79_vv2_1312_l1},
/*h(3498)=1313 */ {3498, xed3_phash_find_map0x0F_opcode0x79_vv2_1313_l1},
/*h(2511)=1314 */ {2511, xed3_phash_find_map0x0F_opcode0x79_vv2_1314_l1},
/*h(25013)=1315 */ {25013, xed3_phash_find_map0x0F_opcode0x79_vv2_1315_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17871)=1317 */ {17871, xed3_phash_find_map0x0F_opcode0x79_vv2_1317_l1},
/*h(16884)=1318 */ {16884, xed3_phash_find_map0x0F_opcode0x79_vv2_1318_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(393)=1320 */ {393, xed3_phash_find_map0x0F_opcode0x79_vv2_1320_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26089)=1322 */ {26089, xed3_phash_find_map0x0F_opcode0x79_vv2_1322_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(14766)=1324 */ {14766, xed3_phash_find_map0x0F_opcode0x79_vv2_1324_l1},
/*h(8611)=1325 */ {8611, xed3_phash_find_map0x0F_opcode0x79_vv2_1325_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(482)=1327 */ {482, xed3_phash_find_map0x0F_opcode0x79_vv2_1327_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21997)=1329 */ {21997, xed3_phash_find_map0x0F_opcode0x79_vv2_1329_l1},
/*h(15842)=1330 */ {15842, xed3_phash_find_map0x0F_opcode0x79_vv2_1330_l1},
/*h(5506)=1331 */ {5506, xed3_phash_find_map0x0F_opcode0x79_vv2_1331_l1},
/*h(4519)=1332 */ {4519, xed3_phash_find_map0x0F_opcode0x79_vv2_1332_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26034)=1334 */ {26034, xed3_phash_find_map0x0F_opcode0x79_vv2_1334_l1},
/*h(25047)=1335 */ {25047, xed3_phash_find_map0x0F_opcode0x79_vv2_1335_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17905)=1337 */ {17905, xed3_phash_find_map0x0F_opcode0x79_vv2_1337_l1},
/*h(11750)=1338 */ {11750, xed3_phash_find_map0x0F_opcode0x79_vv2_1338_l1},
/*h(1414)=1339 */ {1414, xed3_phash_find_map0x0F_opcode0x79_vv2_1339_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21942)=1341 */ {21942, xed3_phash_find_map0x0F_opcode0x79_vv2_1341_l1},
/*h(16774)=1342 */ {16774, xed3_phash_find_map0x0F_opcode0x79_vv2_1342_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8645)=1344 */ {8645, xed3_phash_find_map0x0F_opcode0x79_vv2_1344_l1},
/*h(7658)=1345 */ {7658, xed3_phash_find_map0x0F_opcode0x79_vv2_1345_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(29173)=1347 */ {29173, xed3_phash_find_map0x0F_opcode0x79_vv2_1347_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(11695)=1350 */ {11695, xed3_phash_find_map0x0F_opcode0x79_vv2_1350_l1},
/*h(5540)=1351 */ {5540, xed3_phash_find_map0x0F_opcode0x79_vv2_1351_l1},
/*h(4553)=1352 */ {4553, xed3_phash_find_map0x0F_opcode0x79_vv2_1352_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20900)=1354 */ {20900, xed3_phash_find_map0x0F_opcode0x79_vv2_1354_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8590)=1357 */ {8590, xed3_phash_find_map0x0F_opcode0x79_vv2_1357_l1},
/*h(1448)=1358 */ {1448, xed3_phash_find_map0x0F_opcode0x79_vv2_1358_l1},
/*h(461)=1359 */ {461, xed3_phash_find_map0x0F_opcode0x79_vv2_1359_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16808)=1361 */ {16808, xed3_phash_find_map0x0F_opcode0x79_vv2_1361_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9666)=1363 */ {9666, xed3_phash_find_map0x0F_opcode0x79_vv2_1363_l1},
/*h(4498)=1364 */ {4498, xed3_phash_find_map0x0F_opcode0x79_vv2_1364_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25026)=1366 */ {25026, xed3_phash_find_map0x0F_opcode0x79_vv2_1366_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13703)=1368 */ {13703, xed3_phash_find_map0x0F_opcode0x79_vv2_1368_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4587)=1371 */ {4587, xed3_phash_find_map0x0F_opcode0x79_vv2_1371_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26102)=1373 */ {26102, xed3_phash_find_map0x0F_opcode0x79_vv2_1373_l1},
/*h(15766)=1374 */ {15766, xed3_phash_find_map0x0F_opcode0x79_vv2_1374_l1},
/*h(9611)=1375 */ {9611, xed3_phash_find_map0x0F_opcode0x79_vv2_1375_l1},
/*h(8624)=1376 */ {8624, xed3_phash_find_map0x0F_opcode0x79_vv2_1376_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(24971)=1378 */ {24971, xed3_phash_find_map0x0F_opcode0x79_vv2_1378_l1},
/*h(495)=1379 */ {495, xed3_phash_find_map0x0F_opcode0x79_vv2_1379_l1},
/*h(17829)=1380 */ {17829, xed3_phash_find_map0x0F_opcode0x79_vv2_1380_l1},
/*h(16842)=1381 */ {16842, xed3_phash_find_map0x0F_opcode0x79_vv2_1381_l1},
/*h(15855)=1382 */ {15855, xed3_phash_find_map0x0F_opcode0x79_vv2_1382_l1},
/*h(4532)=1383 */ {4532, xed3_phash_find_map0x0F_opcode0x79_vv2_1383_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25060)=1386 */ {25060, xed3_phash_find_map0x0F_opcode0x79_vv2_1386_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5608)=1390 */ {5608, xed3_phash_find_map0x0F_opcode0x79_vv2_1390_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(20968)=1393 */ {20968, xed3_phash_find_map0x0F_opcode0x79_vv2_1393_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9645)=1395 */ {9645, xed3_phash_find_map0x0F_opcode0x79_vv2_1395_l1},
/*h(8658)=1396 */ {8658, xed3_phash_find_map0x0F_opcode0x79_vv2_1396_l1},
/*h(2503)=1397 */ {2503, xed3_phash_find_map0x0F_opcode0x79_vv2_1397_l1},
/*h(25005)=1398 */ {25005, xed3_phash_find_map0x0F_opcode0x79_vv2_1398_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12695)=1400 */ {12695, xed3_phash_find_map0x0F_opcode0x79_vv2_1400_l1},
/*h(16876)=1401 */ {16876, xed3_phash_find_map0x0F_opcode0x79_vv2_1401_l1},
/*h(5553)=1402 */ {5553, xed3_phash_find_map0x0F_opcode0x79_vv2_1402_l1},
/*h(4566)=1403 */ {4566, xed3_phash_find_map0x0F_opcode0x79_vv2_1403_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21900)=1405 */ {21900, xed3_phash_find_map0x0F_opcode0x79_vv2_1405_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(14758)=1407 */ {14758, xed3_phash_find_map0x0F_opcode0x79_vv2_1407_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1461)=1410 */ {1461, xed3_phash_find_map0x0F_opcode0x79_vv2_1410_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21989)=1412 */ {21989, xed3_phash_find_map0x0F_opcode0x79_vv2_1412_l1},
/*h(16821)=1413 */ {16821, xed3_phash_find_map0x0F_opcode0x79_vv2_1413_l1},
/*h(10666)=1414 */ {10666, xed3_phash_find_map0x0F_opcode0x79_vv2_1414_l1},
/*h(8692)=1415 */ {8692, xed3_phash_find_map0x0F_opcode0x79_vv2_1415_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26026)=1417 */ {26026, xed3_phash_find_map0x0F_opcode0x79_vv2_1417_l1},
/*h(25039)=1418 */ {25039, xed3_phash_find_map0x0F_opcode0x79_vv2_1418_l1},
/*h(17897)=1419 */ {17897, xed3_phash_find_map0x0F_opcode0x79_vv2_1419_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6574)=1421 */ {6574, xed3_phash_find_map0x0F_opcode0x79_vv2_1421_l1},
/*h(5587)=1422 */ {5587, xed3_phash_find_map0x0F_opcode0x79_vv2_1422_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21934)=1424 */ {21934, xed3_phash_find_map0x0F_opcode0x79_vv2_1424_l1},
/*h(20947)=1425 */ {20947, xed3_phash_find_map0x0F_opcode0x79_vv2_1425_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13805)=1427 */ {13805, xed3_phash_find_map0x0F_opcode0x79_vv2_1427_l1},
/*h(7650)=1428 */ {7650, xed3_phash_find_map0x0F_opcode0x79_vv2_1428_l1},
/*h(1495)=1429 */ {1495, xed3_phash_find_map0x0F_opcode0x79_vv2_1429_l1},
/*h(29165)=1430 */ {29165, xed3_phash_find_map0x0F_opcode0x79_vv2_1430_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17842)=1432 */ {17842, xed3_phash_find_map0x0F_opcode0x79_vv2_1432_l1},
/*h(11687)=1433 */ {11687, xed3_phash_find_map0x0F_opcode0x79_vv2_1433_l1},
/*h(9713)=1434 */ {9713, xed3_phash_find_map0x0F_opcode0x79_vv2_1434_l1},
/*h(4545)=1435 */ {4545, xed3_phash_find_map0x0F_opcode0x79_vv2_1435_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(25073)=1437 */ {25073, xed3_phash_find_map0x0F_opcode0x79_vv2_1437_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8582)=1439 */ {8582, xed3_phash_find_map0x0F_opcode0x79_vv2_1439_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5621)=1441 */ {5621, xed3_phash_find_map0x0F_opcode0x79_vv2_1441_l1},
/*h(453)=1442 */ {453, xed3_phash_find_map0x0F_opcode0x79_vv2_1442_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(21968)=1444 */ {21968, xed3_phash_find_map0x0F_opcode0x79_vv2_1444_l1},
/*h(20981)=1445 */ {20981, xed3_phash_find_map0x0F_opcode0x79_vv2_1445_l1},
/*h(14826)=1446 */ {14826, xed3_phash_find_map0x0F_opcode0x79_vv2_1446_l1},
/*h(4490)=1447 */ {4490, xed3_phash_find_map0x0F_opcode0x79_vv2_1447_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26005)=1449 */ {26005, xed3_phash_find_map0x0F_opcode0x79_vv2_1449_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17876)=1451 */ {17876, xed3_phash_find_map0x0F_opcode0x79_vv2_1451_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10734)=1453 */ {10734, xed3_phash_find_map0x0F_opcode0x79_vv2_1453_l1},
/*h(4579)=1454 */ {4579, xed3_phash_find_map0x0F_opcode0x79_vv2_1454_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26094)=1456 */ {26094, xed3_phash_find_map0x0F_opcode0x79_vv2_1456_l1},
/*h(15758)=1457 */ {15758, xed3_phash_find_map0x0F_opcode0x79_vv2_1457_l1},
/*h(9603)=1458 */ {9603, xed3_phash_find_map0x0F_opcode0x79_vv2_1458_l1},
/*h(8616)=1459 */ {8616, xed3_phash_find_map0x0F_opcode0x79_vv2_1459_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1474)=1461 */ {1474, xed3_phash_find_map0x0F_opcode0x79_vv2_1461_l1},
/*h(487)=1462 */ {487, xed3_phash_find_map0x0F_opcode0x79_vv2_1462_l1},
/*h(22002)=1463 */ {22002, xed3_phash_find_map0x0F_opcode0x79_vv2_1463_l1},
/*h(16834)=1464 */ {16834, xed3_phash_find_map0x0F_opcode0x79_vv2_1464_l1},
/*h(15847)=1465 */ {15847, xed3_phash_find_map0x0F_opcode0x79_vv2_1465_l1},
/*h(4524)=1466 */ {4524, xed3_phash_find_map0x0F_opcode0x79_vv2_1466_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(26039)=1468 */ {26039, xed3_phash_find_map0x0F_opcode0x79_vv2_1468_l1},
/*h(20871)=1469 */ {20871, xed3_phash_find_map0x0F_opcode0x79_vv2_1469_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(17910)=1471 */ {17910, xed3_phash_find_map0x0F_opcode0x79_vv2_1471_l1},
/*h(7574)=1472 */ {7574, xed3_phash_find_map0x0F_opcode0x79_vv2_1472_l1},
/*h(5600)=1473 */ {5600, xed3_phash_find_map0x0F_opcode0x79_vv2_1473_l1},
/*h(432)=1474 */ {432, xed3_phash_find_map0x0F_opcode0x79_vv2_1474_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(16779)=1476 */ {16779, xed3_phash_find_map0x0F_opcode0x79_vv2_1476_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(9637)=1478 */ {9637, xed3_phash_find_map0x0F_opcode0x79_vv2_1478_l1},
/*h(7663)=1479 */ {7663, xed3_phash_find_map0x0F_opcode0x79_vv2_1479_l1},
/*h(30165)=1480 */ {30165, xed3_phash_find_map0x0F_opcode0x79_vv2_1480_l1},
/*h(24997)=1481 */ {24997, xed3_phash_find_map0x0F_opcode0x79_vv2_1481_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(12687)=1483 */ {12687, xed3_phash_find_map0x0F_opcode0x79_vv2_1483_l1},
/*h(16868)=1484 */ {16868, xed3_phash_find_map0x0F_opcode0x79_vv2_1484_l1},
/*h(5545)=1485 */ {5545, xed3_phash_find_map0x0F_opcode0x79_vv2_1485_l1},
/*h(4558)=1486 */ {4558, xed3_phash_find_map0x0F_opcode0x79_vv2_1486_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 1488ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[137] = {
/*h(411)=0 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {411, 5989},
/*empty slot1 */ {0,0},
/*h(92)=2 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 6564},
/*h(412)=3 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {412, 5287},
/*h(732)=4 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {732, 5243},
/*h(93)=5 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 6564},
/*h(413)=6 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {413, 5287},
/*h(733)=7 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {733, 5243},
/*h(94)=8 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 6563},
/*h(414)=9 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {414, 5286},
/*h(734)=10 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {734, 5241},
/*h(95)=11 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {95, 6568},
/*h(415)=12 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {415, 5289},
/*h(735)=13 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {735, 5242},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=19 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {600, 4056},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(601)=22 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {601, 4056},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(602)=25 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(603)=28 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {603, 4055},
/*h(923)=29 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {923, 5989},
/*empty slot1 */ {0,0},
/*h(604)=31 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 6569},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(605)=34 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 6569},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=37 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 6567},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(607)=40 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {607, 6568},
/*h(927)=41 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {927, 5289},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(152)=45 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {152, 5992},
/*h(472)=46 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {472, 6038},
/*empty slot1 */ {0,0},
/*h(153)=48 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {153, 5992},
/*h(473)=49 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {473, 6038},
/*empty slot1 */ {0,0},
/*h(154)=51 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {154, 5991},
/*h(474)=52 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6037},
/*empty slot1 */ {0,0},
/*h(155)=54 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {155, 5989},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(156)=57 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {156, 5285},
/*h(476)=58 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {476, 5240},
/*empty slot1 */ {0,0},
/*h(157)=60 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {157, 5285},
/*h(477)=61 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {477, 5240},
/*empty slot1 */ {0,0},
/*h(158)=63 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {158, 5284},
/*h(478)=64 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {478, 5239},
/*empty slot1 */ {0,0},
/*h(159)=66 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {159, 5289},
/*h(479)=67 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {479, 5242},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(344)=73 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {344, 4053},
/*h(664)=74 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {664, 5990},
/*empty slot1 */ {0,0},
/*h(345)=76 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {345, 4053},
/*h(665)=77 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {665, 5990},
/*empty slot1 */ {0,0},
/*h(346)=79 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4052},
/*h(666)=80 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {666, 5988},
/*empty slot1 */ {0,0},
/*h(347)=82 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {347, 4055},
/*h(667)=83 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {667, 5989},
/*empty slot1 */ {0,0},
/*h(348)=85 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 6566},
/*h(668)=86 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {668, 5290},
/*empty slot1 */ {0,0},
/*h(349)=88 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 6566},
/*h(669)=89 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {669, 5290},
/*empty slot1 */ {0,0},
/*h(350)=91 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 6565},
/*h(670)=92 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {670, 5288},
/*empty slot1 */ {0,0},
/*h(351)=94 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {351, 6568},
/*h(671)=95 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {671, 5289},
/*h(991)=96 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {991, 5242},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=100 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {216, 6036},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(217)=103 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {217, 6036},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(218)=106 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6035},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(859)=111 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {859, 4055},
/*h(220)=112 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {220, 5238},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(221)=115 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {221, 5238},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(222)=118 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {222, 5237},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(223)=121 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {223, 5242},
/*empty slot1 */ {0,0},
/*h(863)=123 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {863, 6568},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(88)=127 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {88, 4051},
/*h(408)=128 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {408, 5994},
/*h(728)=129 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {728, 6034},
/*h(89)=130 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {89, 4051},
/*h(409)=131 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {409, 5994},
/*h(729)=132 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {729, 6034},
/*h(90)=133 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4050},
/*h(410)=134 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {410, 5993},
/*h(730)=135 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6033},
/*h(91)=136 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {91, 4055}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 137);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5778)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5778, 4519},
/*h(10946)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10946, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_2_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1830;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_4_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5634)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5634;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13009)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13009;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_6_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5490)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5490, 4552},
/*h(8074)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8074, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1542)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8917)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8917;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5346, 4548},
/*h(2762)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2762, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1775)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1775;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_14_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3982)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3982;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_15_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1398)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1398;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5202)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5202, 4549},
/*h(7786)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7786, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_17_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10980)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10980;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1254)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1254;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4071)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4071;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_22_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3694)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3694, 4514},
/*h(13043)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {13043, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1110)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1110;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7498)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7498;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3927)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3927;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_26_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6134)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6134;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8951)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8951;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_29_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3783)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3783;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2796)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {2796, 5634},
/*h(3406)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3406, 4546},
/*h(5990)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5990, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_32_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7210)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3639)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3639;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_37_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1898)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1898;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5702;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3118)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3118, 4546},
/*h(8896)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8896, 4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_41_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5935)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5935;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8142)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8142, 4514},
/*h(5558)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5558, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10959)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10959;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_45_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1610)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1610;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5414, 4546},
/*h(4804)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4804, 4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_49_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4050)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4050, 4519},
/*h(5647)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5647, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_50_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7854)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7854;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_51_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5270)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5270;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_52_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(712)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_53_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3906)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3906, 4518},
/*h(1322)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1322, 4548},
/*h(8087)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {8087, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_55_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5126)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5126, 4546},
/*h(15085)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {15085, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_56_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8930)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8930;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_57_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3762, 4522},
/*h(2775)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {2775, 4390},
/*h(7943)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7943, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7566)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7566;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_61_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7799, 4521},
/*h(3618)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3618, 4518},
/*h(1034)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1034, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_62_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10993)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10993;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4838)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4838;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_65_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3474, 4549},
/*h(6058)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6058, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7278)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7278;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6901)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6901;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3330)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3330, 4548},
/*h(746)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {746, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1966)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1966;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3186)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3186, 4552},
/*h(5770)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5770, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_77_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7223)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7223;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_78_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13001)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13001;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_79_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1678)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1678;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8066)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8066, 4518},
/*h(5482)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5482, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_82_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1911)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_84_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8909)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8909;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_85_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2754)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2754, 4388},
/*h(7922)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {7922, 4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1767)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1767;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_87_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3974, 4514},
/*h(1390)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1390, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_89_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7778)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7778, 4518},
/*h(5194)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5194, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_90_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1623)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {1623, 4517},
/*h(4817)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4817, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_91_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3830;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7634)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7634;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(13035)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {13035, 5638},
/*h(1102)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1102, 4546},
/*h(3686)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3686, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_97_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7490)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7490, 4548},
/*h(725)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {725, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_98_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1335)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1335, 4551},
/*h(3919)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3919, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6126)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6126, 4514},
/*h(3542)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3542, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_101_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {7346, 4552},
/*h(8943)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8943, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2788)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2788;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_103_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3398)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3398;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {2034, 4522},
/*h(7202)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7202, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3631)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3631;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_107_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5838)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5838, 4514},
/*h(3254)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3254, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_108_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4851)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4851;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_109_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1890)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1890, 4518},
/*h(6071)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {6071, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_111_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3110)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3110;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1746)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_114_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(759)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {759, 5637},
/*h(5927)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5927, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_115_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5550)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5550, 4546},
/*h(8134)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8134, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_117_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1602)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1602, 4518},
/*h(10951)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {10951, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_118_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5783)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5783;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_119_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7990;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_121_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1458, 4552},
/*h(4042)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4042, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5639)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5639;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_123_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7846, 4514},
/*h(5262)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5262, 4546},
/*h(13014)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {13014, 4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(704)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {704, 4386},
/*h(8079)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8079, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_126_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1314)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1314, 4548},
/*h(5495)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5495, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_127_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7702;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_128_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15077)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15077;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3754)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3754;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1170, 4549},
/*h(2767)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {2767, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_131_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7558)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7791)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7791, 4516},
/*h(10985)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {10985, 5635},
/*h(1026)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1026, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_135_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7414;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6050)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6050, 4518},
/*h(3466)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3466, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_139_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7270)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7270;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5906)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5906, 4519},
/*h(6893)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6893, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_142_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(738)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1958)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1958;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_145_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3178)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3178;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_147_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2801)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2801;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_148_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1814;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5618)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5618;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_150_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12993)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12993;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_152_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1670)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5474;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_154_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1903)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1903;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_156_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_157_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7914)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7914, 4518},
/*h(8901)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8901, 4390},
/*h(5330)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5330, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_160_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1382)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1382;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_162_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(10964)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {10964, 4387},
/*h(1615)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1615, 4516},
/*h(5186)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5186, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4809)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4809;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_164_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3822)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3822, 4514},
/*h(1238)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {1238, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7626)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7626;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_166_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4055)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4055;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13027)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13027;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_168_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1094)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1094;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_170_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(717)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {717, 4390},
/*h(3911)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3911, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_172_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3534)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3534, 4546},
/*h(6118)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6118, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7338)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7338;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_174_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3767)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3767, 4521},
/*h(8935)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8935, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_176_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5974;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2026)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {2026, 4518},
/*h(3623)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3623, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_179_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10998)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_180_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5830, 4514},
/*h(3246)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3246, 4546},
/*h(4843)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4843, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6063)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6063;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_184_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_186_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1738)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1738;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_187_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(751)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 751;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5542)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5775)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5775, 4516},
/*h(3191)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3191, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_192_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7982)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7982, 4514},
/*h(5398)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5398, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_194_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4034, 4518},
/*h(1450)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1450, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13006)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_196_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5254)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5254;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3890)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3890, 4522},
/*h(8071)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8071, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_200_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7694)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7694;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(3746)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3746, 4518},
/*h(7927)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7927, 4521},
/*h(8914)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8914, 4386},
/*h(1162)=3 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1162, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_203_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2759)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2759;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_206_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3602)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3602, 4519},
/*h(7783)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7783, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_207_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10977)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10977;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7406)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7406, 4546},
/*h(4822)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4822, 4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_210_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3458;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_212_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13040)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13040;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_213_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6885)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6885;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_214_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5898)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5898, 4518},
/*h(3314)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3314, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_218_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3170, 4548},
/*h(7351)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7351, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_219_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8948)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8948;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_220_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1806)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1806, 4514},
/*h(2793)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2793, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_222_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5610)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5610;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_223_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2039)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_226_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8050)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8050;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_227_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1895)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1895;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_228_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1518)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1518;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_230_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5322)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5322, 4548},
/*h(7906)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7906, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_231_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1751)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1751;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_232_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3958)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3958;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_234_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_235_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10956)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {10956, 4387},
/*h(1607)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1607, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_236_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3814, 4514},
/*h(4801)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4801, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_237_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1230)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1230;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_238_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7618)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7618;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_239_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4047)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4047, 4516},
/*h(1463)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1463, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_240_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3670)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_242_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {7474, 4552},
/*h(709)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {709, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_244_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_246_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7330)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7330;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3759)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3759;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_248_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2772)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {2772, 4387},
/*h(3382)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3382, 4550},
/*h(5966)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5966, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_250_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7186)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7186;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_251_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2018;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_252_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10990)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10990;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_253_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3238)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3238, 4546},
/*h(4835)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4835, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_255_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1874)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1874, 4519},
/*h(6055)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {6055, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_256_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5678)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5678;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_257_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3094)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3094;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_259_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1730, 4518},
/*h(5911)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {5911, 4517},
/*h(743)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {743, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_260_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8118)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8118;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_263_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1586)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1586, 4522},
/*h(5767)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5767, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_264_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7974, 4514},
/*h(5390)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5390, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_265_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2806)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2806;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_267_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1442)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1442, 4548},
/*h(5623)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5623, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_268_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {7830, 4515},
/*h(12998)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {12998, 4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_271_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3882)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3882, 4518},
/*h(1298)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1298, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_272_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7686;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_273_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15061)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15061;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8906)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8906;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_275_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1154)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1154, 4548},
/*h(7919)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7919, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_276_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7542)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7542;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_279_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3594)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3594;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_280_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7398)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7398;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_281_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4814)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4814;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_283_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6034;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_284_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7254)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7254;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_285_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13032)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13032;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_287_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3306)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3306, 4548},
/*h(5890)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5890, 4518},
/*h(722)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {722, 4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_289_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1942)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_290_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15095)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15095;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_291_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8940)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {8940, 5632},
/*h(5746)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5746, 4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_292_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2785)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2785;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_293_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1798)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1798;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_295_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5602)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5602;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_296_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2031)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2031;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_297_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1654)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_298_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4848)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4848;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_299_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8042)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8042, 4518},
/*h(5458)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5458, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_301_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1510;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_303_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5314)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5314;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_304_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(756)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {756, 5632},
/*h(1743)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1743, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_305_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3950)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3950, 4514},
/*h(1366)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {1366, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_307_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5170, 4552},
/*h(10948)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {10948, 4387},
/*h(7754)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7754, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_309_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1222)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1222;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_312_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4039)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_313_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(13011)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {13011, 4391},
/*h(1078)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1078, 4550},
/*h(3662)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3662, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_315_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7466)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7466;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_316_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3895)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3895;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_317_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6102)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6102;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_319_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8919)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8919;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_320_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2764)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {2764, 4387},
/*h(3751)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3751, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_321_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5958)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5958, 4514},
/*h(3374)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3374, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_323_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7178)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7178;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_324_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3607)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3607;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_325_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5814, 4520},
/*h(10982)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {10982, 5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_327_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1866)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1866;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_329_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5670)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5670, 4514},
/*h(3086)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3086, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_330_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13045)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13045;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_332_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5903)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5903, 4516},
/*h(3319)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3319, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_333_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5526, 4547},
/*h(8110)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8110, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_335_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1578)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1578;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_337_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5382)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5382, 4546},
/*h(2798)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {2798, 5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_339_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4018;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_341_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5238)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5238, 4550},
/*h(7822)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7822, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_343_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3874)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3874, 4518},
/*h(8055)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {8055, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_344_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1290)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1290;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_346_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15053)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15053;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_347_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8898)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8898, 4386},
/*h(3730)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3730, 4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_348_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7911)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_349_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7534)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7534;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_351_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3586)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_352_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7767)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {7767, 4517},
/*h(10961)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10961, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_353_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4806)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4806;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_355_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6026)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6026, 4518},
/*h(3442)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3442, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_357_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7246)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7246;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_358_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13024)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13024;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_359_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6869)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6869;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_360_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(714)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {714, 4386},
/*h(3298)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3298, 4548},
/*h(7479)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7479, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_362_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1934)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1934;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_363_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5738)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5738, 4518},
/*h(15087)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {15087, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_364_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3154)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3154, 4549},
/*h(8932)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {8932, 5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_367_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8178)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8178;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_368_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2023)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2023;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_369_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10995)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10995;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_370_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1646)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1646, 4514},
/*h(4840)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4840, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_371_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8034, 4518},
/*h(5450)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5450, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_372_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1879)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1879;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_374_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4086)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4086;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_375_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7890)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7890;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_376_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6903)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6903, 5637},
/*h(1735)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1735, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_377_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(748)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 748;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_378_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3942)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3942, 4514},
/*h(1358)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1358, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_379_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7746)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_380_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5162)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5162, 4548},
/*h(1591)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1591, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_382_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3798)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3798;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_383_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7602)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7602;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_385_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13003)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13003;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_386_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3654)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3654, 4514},
/*h(1070)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1070, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_387_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7458;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_388_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3887)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3887;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_390_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3510, 4550},
/*h(6094)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6094, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_391_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7314)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7314;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_392_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8911)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8911;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_393_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2756)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2756;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_394_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3366)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3366;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_396_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7170, 4548},
/*h(2002)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {2002, 4519},
/*h(3599)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3599, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_398_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5806)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5806, 4514},
/*h(3222)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3222, 4547},
/*h(4819)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4819, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_400_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1858, 4518},
/*h(6039)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {6039, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_402_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3078)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3078;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_403_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13037)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13037;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_404_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1714)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1714, 4522},
/*h(5895)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5895, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_405_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(727)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 727;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_406_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8102)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8102, 4514},
/*h(5518)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5518, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_408_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1570)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1570, 4518},
/*h(5751)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5751, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_409_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8945)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8945;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_410_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2790)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {2790, 5634},
/*h(7958)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {7958, 4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_412_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4010)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4010, 4518},
/*h(1426)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1426, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_414_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7814, 4514},
/*h(5230)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5230, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_415_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4853)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4853;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_416_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1282, 4548},
/*h(8047)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8047, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_418_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7670)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7670;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_419_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15045)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15045;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_420_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3722)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3722, 4518},
/*h(1138)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1138, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_422_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7526;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_424_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5175)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5175, 4551},
/*h(7759)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7759, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_425_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10953)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10953;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_426_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7382)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7382;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_428_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6018, 4518},
/*h(3434)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3434, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_430_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7238)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7238;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_431_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6861)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6861;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_432_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5874)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5874, 4522},
/*h(706)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {706, 4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_434_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1926)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1926;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_436_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5730, 4518},
/*h(15079)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {15079, 5637},
/*h(3146)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3146, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_438_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1782)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1782, 4520},
/*h(2769)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2769, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_440_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5586)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5586, 4549},
/*h(8170)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8170, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_442_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1638)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1638, 4514},
/*h(10987)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {10987, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_443_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4832)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4832;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_444_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5442)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5442;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_445_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1871)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1871;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_446_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1494)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {1494, 4547},
/*h(4078)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4078, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_448_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5298)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5298, 4552},
/*h(7882)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7882, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_449_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6895)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6895;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_450_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(740)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 740;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_451_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1350)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1350;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_452_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5154)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5154;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_453_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1583)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1583;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_454_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3790)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3790;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_455_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1206)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1206, 4550},
/*h(2803)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2803, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_456_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7594)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7594;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_457_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4023)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4023;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_458_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12995)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12995;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_459_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1062)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1062;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_461_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3879)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3879;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_462_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6086)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6086, 4514},
/*h(3502)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3502, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_464_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7306)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7306;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_465_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3735)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {3735, 4517},
/*h(8903)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {8903, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_466_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5942)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_469_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1994)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1994, 4518},
/*h(3591)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3591, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_470_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5798)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5798, 4514},
/*h(10966)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {10966, 4387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_471_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3214)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3214, 4546},
/*h(4811)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4811, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_473_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3447)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3447, 4551},
/*h(6031)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {6031, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_474_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5654)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_475_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13029)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13029;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_477_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1706)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1706, 4518},
/*h(719)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {719, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_478_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5510;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_481_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5743)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5743;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_482_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7950)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7950, 4514},
/*h(5366)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5366, 4550},
/*h(8937)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8937, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_485_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8183)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {8183, 4521},
/*h(4002)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4002, 4518},
/*h(1418)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1418, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_487_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5222)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5222;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_488_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4845)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4845;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_489_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3858, 4519},
/*h(8039)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8039, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_490_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7662)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7662;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_493_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3714)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3714, 4518},
/*h(1130)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1130, 4548},
/*h(7895)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {7895, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_494_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(753)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 753;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_497_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3570)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3570, 4552},
/*h(7751)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7751, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_498_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7374)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7374, 4546},
/*h(10945)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10945, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_501_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3426)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3426, 4548},
/*h(7607)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7607, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_503_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13008)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13008;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_504_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6853)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6853;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_505_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3282, 4549},
/*h(5866)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5866, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_509_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3138)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3138, 4548},
/*h(8916)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {8916, 4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_510_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2761)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2761;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_511_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1774)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1774;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_513_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8162)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8162, 4518},
/*h(5578)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5578, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_514_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2007)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2007;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_515_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10979)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10979;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_517_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8018;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_518_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1863)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1863;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_519_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4070)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4070, 4514},
/*h(1486)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1486, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_520_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13042)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13042;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_521_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5290)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5290, 4548},
/*h(6887)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {6887, 5637},
/*h(7874)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7874, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_522_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1719)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1719;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_523_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3926)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3926;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_525_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_526_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1575)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1575;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_527_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1198)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1198, 4546},
/*h(3782)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3782, 4514},
/*h(8950)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {8950, 5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_528_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2795)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2795;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_529_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7586)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7586;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_530_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4015)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4015;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_531_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3638)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3638;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_533_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7442)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7442;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_535_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3494)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3494;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_537_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7298)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7298;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_538_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1143)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1143, 4551},
/*h(3727)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3727, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_539_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5934)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5934, 4514},
/*h(3350)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3350, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_541_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1986)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1986;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_543_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10958)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {10958, 4387},
/*h(3206)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3206, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_544_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4803)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4803;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_545_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1842)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1842;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_546_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6023)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6023;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_547_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5646)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5646;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_549_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1698)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1698;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_550_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(711)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {711, 4390},
/*h(5879)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5879, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_551_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8086)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8086;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_553_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1554)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1554;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_554_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5735)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5735, 4516},
/*h(8929)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8929, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_555_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5358)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5358, 4546},
/*h(7942)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7942, 4514},
/*h(2774)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {2774, 4387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_557_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8175)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8175;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_558_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1410)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1410;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_559_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7798)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7798;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_560_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10992)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10992;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_561_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3850)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3850, 4518},
/*h(4837)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4837, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_562_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1266;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_563_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7654)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7654;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_566_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1122)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1122, 4548},
/*h(7887)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7887, 4516},
/*h(5303)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5303, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_567_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {7510, 4547},
/*h(745)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {745, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_569_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3562)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_571_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7366)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7366;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_573_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6002)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6002;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_575_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7222)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7222;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_576_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13000)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13000;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_577_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5858;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_578_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3274)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_580_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1910)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1910;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_581_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5714)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5714, 4519},
/*h(15063)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {15063, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_582_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8908)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8908;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_583_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2753)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2753;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_584_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1766;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_585_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5570)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5570;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_586_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1999)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1999;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_588_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1622)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1622;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_589_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8010)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8010, 4518},
/*h(4816)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4816, 4391},
/*h(5426)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5426, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_592_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1478)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1478;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_593_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13034)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13034;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_594_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5282, 4548},
/*h(1711)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1711, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_595_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(724)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 724;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_596_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3918)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3918, 4514},
/*h(1334)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1334, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_597_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7722)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_598_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5138)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5138;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_599_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8942)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8942;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_600_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1190)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1190, 4546},
/*h(2787)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2787, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_602_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4007)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4007;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_604_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3630)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3630, 4514},
/*h(1046)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {1046, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_605_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7434)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7434;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_606_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4850)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4850, 5638},
/*h(3863)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {3863, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_608_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6070)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6070;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_610_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3719)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3719;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_612_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3342)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3342, 4546},
/*h(5926)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5926, 4514},
/*h(758)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {758, 5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_614_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3575)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3575;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_615_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10950)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10950;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_616_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5782)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5782;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_618_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1834)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1834;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_620_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5638)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5638;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_621_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13013)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13013;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_622_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5871)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5871;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_624_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8078)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8078, 4514},
/*h(5494)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5494, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_626_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1546)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1546;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_628_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2766)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {2766, 4387},
/*h(5350)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5350, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_630_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3986)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3986, 4519},
/*h(8167)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8167, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_632_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(10984)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {10984, 5635},
/*h(7790)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7790, 4514},
/*h(5206)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5206, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_634_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8023)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {8023, 4517},
/*h(3842)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3842, 4518},
/*h(1258)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1258, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_638_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(13047)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13047, 5637},
/*h(7879)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7879, 4516},
/*h(3698)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3698, 4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_640_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7502)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7502, 4546},
/*h(737)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {737, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_642_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3554)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3554, 4548},
/*h(7735)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7735, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_645_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2800)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2800;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_646_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5994)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5994, 4518},
/*h(3410)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3410, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_648_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7214)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7214, 4546},
/*h(12992)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {12992, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_650_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3266;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_652_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1902)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1902;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_654_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5706)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5706, 4518},
/*h(15055)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {15055, 4390},
/*h(3122)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3122, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_655_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8900)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8900;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_658_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8146)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8146;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_659_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1991;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_660_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1614)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1614, 4514},
/*h(10963)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10963, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_661_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4808)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4808;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_662_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5418)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5418, 4548},
/*h(8002)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8002, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_663_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1847)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1847;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_664_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4054)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4054;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_665_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13026)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13026;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_666_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7858;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_667_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1703)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1703, 4516},
/*h(6871)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6871, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_668_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(716)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {716, 4385},
/*h(3910)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3910, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_669_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1326)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1326;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_670_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5130)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5130, 4548},
/*h(7714)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7714, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_671_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1559)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1559;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_672_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8934)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {8934, 5632},
/*h(3766)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3766, 4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_674_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7570)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7570;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_676_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3622)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3622;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_677_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1038)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1038, 4546},
/*h(10997)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {10997, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_678_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4842)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4842, 5638},
/*h(7426)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7426, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_679_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3855)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3855, 4516},
/*h(1271)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1271, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_680_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6062)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6062, 4514},
/*h(3478)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3478, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_682_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7282;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_685_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(750)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {750, 5632},
/*h(3334)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3334, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_687_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1970)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_688_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5774)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5774;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_689_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3190)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_691_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1826)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1826, 4518},
/*h(6007)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {6007, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_693_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13005)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13005;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_695_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1682, 4519},
/*h(5863)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5863, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_696_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8070)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8070, 4514},
/*h(5486)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5486, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_699_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1538)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1538, 4518},
/*h(5719)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {5719, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_700_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7926)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {7926, 4520},
/*h(8913)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8913, 4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_701_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2758)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {4387}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_703_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3978)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3978, 4518},
/*h(1394)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1394, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_704_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7782)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7782;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_705_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5198)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5198, 4546},
/*h(10976)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {10976, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_706_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4821)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4821;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_707_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8015)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8015, 4516},
/*h(5431)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5431, 4551},
/*h(1250)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1250, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_708_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7638)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7638;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_710_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13039)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13039;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_711_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3690)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3690, 4518},
/*h(1106)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1106, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_712_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7494)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7494;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_715_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6130)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {6130, 4522},
/*h(7727)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7727, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_716_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7350)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7350;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_717_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8947)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8947;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_718_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2792)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2792;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_719_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3402)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3402, 4548},
/*h(5986)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5986, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_721_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7206)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7206, 4546},
/*h(2038)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {2038, 4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_723_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5842)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5842, 4519},
/*h(4855)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4855, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_725_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_726_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15047)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15047;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_727_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3114)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3114, 4548},
/*h(5698)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5698, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_729_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1750)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1750;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_731_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8138)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8138, 4518},
/*h(5554)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5554, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_733_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1606)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1606, 4514},
/*h(10955)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10955, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_734_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4800)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4800;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_735_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5410)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5410;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_736_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1839)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1839;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_737_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4046)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4046, 4514},
/*h(1462)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1462, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_739_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7850)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7850, 4518},
/*h(5266)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5266, 4549},
/*h(6863)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6863, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_740_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(708)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 708;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_741_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1318;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_743_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5122)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5122;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_744_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1551)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1551;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_745_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3758)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3758, 4514},
/*h(1174)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {1174, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_746_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2771)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2771;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_747_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7562)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7562;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_748_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3991;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_749_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1030)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_750_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10989)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10989;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_751_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4834)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4834;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_752_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3847)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3847;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_753_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6054)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6054, 4514},
/*h(3470)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3470, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_755_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7274)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_756_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3703)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3703;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_757_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5910)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5910, 4515},
/*h(742)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {742, 5632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_759_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1962)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_761_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5766, 4514},
/*h(3182)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3182, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_763_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2805)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2805;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_764_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5999)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5999;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_765_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5622)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5622;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_766_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12997)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12997;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_767_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1674)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1674;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_769_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5478)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5478;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_772_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8905)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8905, 4386},
/*h(5711)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5711, 4516},
/*h(3127)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3127, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_773_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5334)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5334, 4547},
/*h(7918)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7918, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_775_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3970)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3970, 4518},
/*h(8151)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {8151, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_776_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1386)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1386;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_777_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5190)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_779_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8007)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8007, 4516},
/*h(3826)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3826, 4522},
/*h(4813)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4813, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_781_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7630)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7630;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_783_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3682, 4518},
/*h(13031)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {13031, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_784_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1098)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1098, 4548},
/*h(7863)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7863, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_785_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(721)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 721;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_787_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6122)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6122, 4518},
/*h(3538)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3538, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_788_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7719)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7719;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_789_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7342)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7342, 4546},
/*h(8939)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8939, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_791_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2784)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2784, 5635},
/*h(3394)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3394, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_794_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2030)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_795_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5834)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5834;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_796_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3250)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3250, 4552},
/*h(4847)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {4847, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_800_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3106)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3106, 4548},
/*h(7287)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7287, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_802_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1742)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1742, 4514},
/*h(755)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {755, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_803_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8130)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8130, 4518},
/*h(5546)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5546, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_804_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1975)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1975;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_805_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10947)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10947;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_807_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7986)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7986;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_808_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1831)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1831;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_810_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4038)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4038, 4514},
/*h(1454)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1454, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_811_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7842)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7842, 4518},
/*h(13010)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {13010, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_812_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(6855)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {6855, 4390},
/*h(1687)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {1687, 4517},
/*h(5258)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5258, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_814_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_815_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7698)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7698;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_816_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1543)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1543;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_817_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8918)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8918;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_818_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3750)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3750, 4514},
/*h(1166)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1166, 4546},
/*h(2763)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2763, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_819_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7554)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7554;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_820_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3983)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3983, 4516},
/*h(1399)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1399, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_822_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3606)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_823_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7410)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {7410, 4552},
/*h(10981)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {10981, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_826_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3462)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3462;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_827_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7266;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_828_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(13044)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {13044, 5636},
/*h(3695)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3695, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_830_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3318, 4550},
/*h(5902)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5902, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_832_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1954)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1954, 4518},
/*h(6135)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {6135, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_834_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3174)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_835_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2797)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2797;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_836_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1810)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1810, 4519},
/*h(5991)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5991, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_838_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5614)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5614;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_840_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1666)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1666, 4518},
/*h(5847)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {5847, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_842_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8054)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8054;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_844_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1522)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1522, 4552},
/*h(5703)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5703, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_845_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8897)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8897;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_846_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7910)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7910, 4514},
/*h(5326)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5326, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_848_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5559)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5559, 4551},
/*h(1378)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1378, 4548},
/*h(8143)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8143, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_850_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {7766, 4515},
/*h(10960)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10960, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_851_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4805)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4805;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_852_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3818)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3818, 4518},
/*h(1234)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1234, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_854_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7622)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7622;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_856_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1090)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1090, 4548},
/*h(7855)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7855, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_858_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7478)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {7478, 4550},
/*h(713)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {713, 4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_860_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6114)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6114, 4518},
/*h(3530)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3530, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_862_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7334)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7334, 4546},
/*h(8931)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8931, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_864_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5970)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5970;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_866_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2022)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {2022, 4514},
/*h(7190)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {7190, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_868_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5826)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5826, 4518},
/*h(3242)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3242, 4548},
/*h(10994)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {10994, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_869_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4839)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4839;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_870_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1878;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_872_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5682;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_874_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1734)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_875_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(747)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 747;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_876_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5538)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_877_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1967)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1967;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_878_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1590)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_880_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5394)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5394, 4549},
/*h(7978)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7978, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_883_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1446)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1446;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_884_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5250)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5250, 4548},
/*h(13002)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {13002, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_885_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1679)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1679;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_886_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3886)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3886;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_887_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1302)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1302;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_888_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7690)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7690;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_890_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8910)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8910;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_891_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1158)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1158, 4546},
/*h(2755)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2755, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_893_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3975)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3975;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_894_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3598)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_896_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4818)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4818, 4391},
/*h(7402)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7402, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_897_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3831)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3831;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_898_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6038)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6038;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_901_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(13036)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {13036, 5636},
/*h(3687)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3687, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_902_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_903_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(726)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {726, 4385},
/*h(3310)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3310, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_905_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6127)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6127;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_906_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5750)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5750;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_907_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8944)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8944;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_908_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2789)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2789;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_909_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1802)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1802;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_910_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5606)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_913_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3255)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3255, 4551},
/*h(4852)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4852, 5636},
/*h(5839)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5839, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_914_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8046)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8046, 4514},
/*h(5462)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5462, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_917_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1514)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1514;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_918_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5318;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_921_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3954)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3954, 4522},
/*h(8135)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8135, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_922_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7758)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_923_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5174)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5174, 4550},
/*h(10952)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {10952, 4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_925_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7991, 4521},
/*h(1226)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1226, 4548},
/*h(3810)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3810, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_928_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13015)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13015;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_929_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3666)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3666, 4519},
/*h(7847)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7847, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_930_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7470)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7470;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_931_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(705)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 705;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_933_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3522)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3522, 4548},
/*h(7703)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {7703, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_936_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2768)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2768;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_937_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3378)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3378, 4552},
/*h(5962)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5962, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_939_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7182)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7182;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_940_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10986)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10986;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_941_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3234)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3234, 4548},
/*h(7415)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7415, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_943_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1870)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1870;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_945_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3090)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3090, 4549},
/*h(5674)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5674, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_948_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(739)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 739;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_949_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8114)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8114;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_950_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1959)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1959;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_951_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1582)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1582;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_953_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2802)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2802, 5635},
/*h(5386)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5386, 4548},
/*h(7970)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7970, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_954_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1815)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_955_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4022)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4022;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_956_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(12994)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 12994;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_957_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7826)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7826;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_958_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1671)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_959_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3878, 4514},
/*h(1294)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1294, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_961_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7682;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_962_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1527)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1527;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_963_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3734)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3734, 4515},
/*h(8902)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {8902, 4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_965_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7538)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7538;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_967_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3590)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_968_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10965)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10965;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_969_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7394)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7394, 4548},
/*h(4810)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4810, 4391}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_970_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3823)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3823;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_971_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(6030)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6030, 4514},
/*h(3446)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3446, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_973_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7250)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7250, 4549},
/*h(13028)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {13028, 5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_975_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3302)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3302, 4546},
/*h(718)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {718, 4385}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_977_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1938, 4519},
/*h(6119)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {6119, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_979_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5742)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5742, 4514},
/*h(3158)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3158, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_980_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8936)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8936;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_981_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1794)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1794;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_982_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5975)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5975;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_983_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8182)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8182;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_985_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1650)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1650, 4522},
/*h(10999)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {10999, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_986_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4844)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4844, 5636},
/*h(5831)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5831, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_987_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5454)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5454, 4546},
/*h(8038)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8038, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_989_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1506)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_990_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5687)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5687;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_991_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7894;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_993_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(752)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {752, 5633},
/*h(3946)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3946, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_994_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1362;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_995_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5166)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5166, 4546},
/*h(7750)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7750, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_996_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10944)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10944;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_997_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7983)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7983;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_998_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1218)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1218;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_999_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7606)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7606;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1001_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3658)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3658, 4518},
/*h(13007)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {13007, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1002_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1074)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1074;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1003_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7462)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7462;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1005_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6098)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6098;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1006_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7695)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7695;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1007_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7318;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1008_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8915)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8915;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1009_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2760)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2760, 4388},
/*h(5954)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5954, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1010_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3370)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3370;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1011_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7174)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1012_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1013_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5810)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5810, 4522},
/*h(10978)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {10978, 5635}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1014_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4823)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4823;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1016_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1862;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1017_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5666)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5666;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1018_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3082)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3082, 4548},
/*h(13041)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {13041, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1020_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1718;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1021_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8106)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8106, 4518},
/*h(5522)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5522, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1024_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1574)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1025_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5378)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5378, 4548},
/*h(8949)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {8949, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1026_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2794)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2794, 5635},
/*h(1807)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1807, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1028_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4014)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4014, 4514},
/*h(1430)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {1430, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1029_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7818)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7818;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1030_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5234)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5234;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1032_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1286;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1036_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3726)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3726, 4514},
/*h(1142)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1142, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1037_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7530)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7530;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1038_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3959)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3959;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1041_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10957)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10957;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1042_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4802)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4802, 4391},
/*h(3815)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3815, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1044_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3438)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3438, 4546},
/*h(6022)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {6022, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1045_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7242)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1046_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3671)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1048_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(710)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {710, 4385},
/*h(5878)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5878, 4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1050_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1930)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1930;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1052_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3150)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3150, 4546},
/*h(8928)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8928, 5633},
/*h(5734)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5734, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1053_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2773)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2773;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1054_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5967)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5967, 4516},
/*h(3383)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {3383, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1056_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8174)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8174, 4514},
/*h(5590)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5590, 4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1058_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1642)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1642, 4518},
/*h(10991)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {10991, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1059_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4836)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4836;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1060_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5446)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5446;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1062_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4082)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4082, 4522},
/*h(5679)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5679, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1064_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7886)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7886, 4514},
/*h(5302)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5302, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1065_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(744)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 744;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1066_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3938, 4518},
/*h(1354)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1354, 4548},
/*h(8119)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {8119, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1068_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5158)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5158;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1070_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3794)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3794, 4519},
/*h(7975)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7975, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1071_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2807)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2807;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1072_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7598)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7598;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1074_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(12999)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {12999, 4390},
/*h(7831)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {7831, 4517},
/*h(1066)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1066, 4548},
/*h(3650)=3 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3650, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((8*key % 7) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1078_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(6090)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6090, 4518},
/*h(7687)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7687, 4516},
/*h(3506)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {3506, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1080_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7310)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7310, 4546},
/*h(8907)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8907, 4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1081_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2752)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2752;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1082_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3362, 4548},
/*h(7543)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {7543, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1084_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1998)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1998;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1086_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5802)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5802, 4518},
/*h(3218)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3218, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1087_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4815)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1090_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3074)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3074;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1091_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13033)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13033;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1092_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1710)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1710;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1093_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(723)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 723;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1094_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5514)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5514, 4548},
/*h(8098)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {8098, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1095_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1943)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1943;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1097_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8941)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8941;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1098_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2786)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {2786, 5635},
/*h(7954)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7954, 4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1099_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1799;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1100_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1101_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1422)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1422;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1102_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5226)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5226, 4548},
/*h(7810)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7810, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1103_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1655)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1655;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1104_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3862, 4515},
/*h(4849)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4849, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1106_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7666)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7666;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1108_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3718;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1109_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1134)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1134;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7522)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7522, 4548},
/*h(757)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {757, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1111_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3951)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3951;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1112_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3574)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10949)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10949;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1114_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7378)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7378;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1116_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3430)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3430;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1118_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7234)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7234;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1119_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3663)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3663, 4516},
/*h(13012)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {13012, 4389},
/*h(1079)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1079, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1120_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5870)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5870;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1121_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3286;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1123_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1922)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1922, 4518},
/*h(6103)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {6103, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1125_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3142)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3142;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1126_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2765)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2765;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1127_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1778)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1778, 4522},
/*h(5959)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5959, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1128_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8166)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8166, 4514},
/*h(5582)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5582, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10983)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10983;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1131_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1634)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1634, 4518},
/*h(5815)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5815, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8022)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8022;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1135_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(4074)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4074, 4518},
/*h(5671)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5671, 4516},
/*h(1490)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1490, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1136_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7878, 4514},
/*h(13046)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {13046, 5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5294)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5294;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1138_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(736)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 736;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1139_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1346, 4548},
/*h(8111)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8111, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1140_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7734)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1143_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3786)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3786, 4518},
/*h(1202)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1202, 4552},
/*h(2799)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {2799, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1144_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7590)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7590;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1147_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7823)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7823, 4516},
/*h(5239)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5239, 4551},
/*h(1058)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1058, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1148_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7446)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7446;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1151_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3498)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3498, 4548},
/*h(6082)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {6082, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1152_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7302)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7302;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1153_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8899)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8899;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1155_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5938;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1157_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1990;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1158_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10962)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10962;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1159_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3210)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3210, 4548},
/*h(4807)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {4807, 4390},
/*h(5794)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5794, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1161_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1846;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5650)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5650;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1164_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13025)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13025;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1702;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1166_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(715)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 715;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5506)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5506;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1168_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1935)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1935;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1169_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1558)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1170_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8933)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8933;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1171_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7946)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7946, 4518},
/*h(5362)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {5362, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1414;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1175_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5218)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5218, 4548},
/*h(10996)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {10996, 5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1176_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1647)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1647, 4516},
/*h(4841)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {4841, 5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1177_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3854)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3854, 4514},
/*h(1270)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {1270, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1179_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7658)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7658;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1180_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4087)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4087;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1181_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1126)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1126;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1183_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(749)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 749;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1184_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3943)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3943;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1185_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3566)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3566;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1187_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7370)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7370;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1188_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3799;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1189_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6006;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1191_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13004)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13004;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1192_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3655)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3655;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1193_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5862, 4514},
/*h(3278)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3278, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1195_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6095)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6095;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1196_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3511)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3511;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1197_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5718;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1198_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8912)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8912;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1199_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1770)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1770, 4518},
/*h(2757)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {2757, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1201_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5574)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1204_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4820)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4820, 4389},
/*h(5807)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5807, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1205_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5430)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {5430, 4550},
/*h(8014)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8014, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1207_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1482)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1482, 4548},
/*h(4066)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4066, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1208_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13038)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13038;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1209_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5286;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1211_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3922)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3922, 4519},
/*h(8103)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {8103, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1213_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(5142)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {5142, 4547},
/*h(7726)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7726, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1215_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8946)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8946, 5633},
/*h(3778)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3778, 4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1216_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(7959)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {7959, 4517},
/*h(2791)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {2791, 5637},
/*h(1194)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1194, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1219_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3634)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3634;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1220_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7815)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7815;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1221_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(4854)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4854, 5636},
/*h(7438)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7438, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1223_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3490)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3490;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1224_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7671)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7671;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1227_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5930)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5930;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1228_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3346;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1231_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(10954)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4388}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 10954;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1232_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3202)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3202;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1234_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1838)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1838;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1235_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(5642)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4518}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 5642;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1238_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(707)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 707;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1239_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8082)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8082;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1240_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1927)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1927;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1242_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1550)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1550;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1243_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7938, 4518},
/*h(5354)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5354, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1244_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2770)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {2770, 4388},
/*h(1783)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1783, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1246_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3990;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7794)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7794;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1248_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10988)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {10988, 5634},
/*h(1639)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {1639, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1249_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4833)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {5638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4833;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1250_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {3846, 4514},
/*h(1262)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {1262, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1251_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7650)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7650;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1252_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4079)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4079;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1254_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3702;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1255_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7506)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {7506, 4549},
/*h(741)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {741, 5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1258_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3558)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3558;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1259_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7362;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1260_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3791)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {3791, 4516},
/*h(1207)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {1207, 4551}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1261_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2804)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {5634}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2804;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1262_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {3414, 4547},
/*h(5998)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5998, 4514}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1264_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7218)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {7218, 4552},
/*h(12996)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {12996, 4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1266_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3270)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3270;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1268_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1906)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1906, 4522},
/*h(6087)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {6087, 4516}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1270_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(8904)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {8904, 4386},
/*h(5710)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5710, 4514},
/*h(3126)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {3126, 4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 7) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1272_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1762, 4518},
/*h(5943)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5943, 4521}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(8150)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4515}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 8150;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1276_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {5799, 4516},
/*h(1618)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1618, 4519},
/*h(10967)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0  NOEVSR*/ {10967, 4390}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1277_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(4812)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {4389}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 4812;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1278_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(8006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {8006, 4514},
/*h(5422)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5422, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1280_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1474, 4548},
/*h(5655)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64 W0    ZEROING=0 MASK=0*/ {5655, 4517}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1281_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(13030)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 13030;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1282_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7862;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1283_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(720)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {4386}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 720;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1284_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3914)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3914, 4518},
/*h(1330)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {1330, 4552}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1286_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7718, 4514},
/*h(5134)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {5134, 4546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1287_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(15093)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {5637}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 15093;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(1186)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1186, 4548},
/*h(5367)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  mode64  W1    ZEROING=0 MASK=0*/ {5367, 4551},
/*h(7951)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  not64    ZEROING=0 MASK=0*/ {7951, 4516},
/*h(8938)=3 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {8938, 5633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 23) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1290_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7574)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64 W0    ZEROING=0 MASK=0*/ {4547}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7574;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1292_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3626)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3626, 4518},
/*h(1042)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64 W0    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {1042, 4549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1294_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(7430)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  not64    ZEROING=0 MASK=0*/ {7430, 4546},
/*h(4846)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {4846, 5636}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1296_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(6066)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  mode64  W1    ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_READER()*/ {4522}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 6066;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1298_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(7286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4550}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 7286;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1300_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(5922)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {5922, 4518},
/*h(754)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {754, 5633},
/*h(3338)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  not64    ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_READER()*/ {3338, 4548}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2_1302_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  mode64  W1    ZEROING=0 MASK=0*/ {4520}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1974;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7b_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[1304] = {
/*h(10946)=0 */ {10946, xed3_phash_find_map0x0F_opcode0x7b_vv2_0_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1830)=2 */ {1830, xed3_phash_find_map0x0F_opcode0x7b_vv2_2_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5634)=4 */ {5634, xed3_phash_find_map0x0F_opcode0x7b_vv2_4_l1},
/*h(13009)=5 */ {13009, xed3_phash_find_map0x0F_opcode0x7b_vv2_5_l1},
/*h(1686)=6 */ {1686, xed3_phash_find_map0x0F_opcode0x7b_vv2_6_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8074)=8 */ {8074, xed3_phash_find_map0x0F_opcode0x7b_vv2_8_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1542)=10 */ {1542, xed3_phash_find_map0x0F_opcode0x7b_vv2_10_l1},
/*h(8917)=11 */ {8917, xed3_phash_find_map0x0F_opcode0x7b_vv2_11_l1},
/*h(5346)=12 */ {5346, xed3_phash_find_map0x0F_opcode0x7b_vv2_12_l1},
/*h(1775)=13 */ {1775, xed3_phash_find_map0x0F_opcode0x7b_vv2_13_l1},
/*h(3982)=14 */ {3982, xed3_phash_find_map0x0F_opcode0x7b_vv2_14_l1},
/*h(1398)=15 */ {1398, xed3_phash_find_map0x0F_opcode0x7b_vv2_15_l1},
/*h(7786)=16 */ {7786, xed3_phash_find_map0x0F_opcode0x7b_vv2_16_l1},
/*h(10980)=17 */ {10980, xed3_phash_find_map0x0F_opcode0x7b_vv2_17_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1254)=19 */ {1254, xed3_phash_find_map0x0F_opcode0x7b_vv2_19_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4071)=21 */ {4071, xed3_phash_find_map0x0F_opcode0x7b_vv2_21_l1},
/*h(13043)=22 */ {13043, xed3_phash_find_map0x0F_opcode0x7b_vv2_22_l1},
/*h(1110)=23 */ {1110, xed3_phash_find_map0x0F_opcode0x7b_vv2_23_l1},
/*h(7498)=24 */ {7498, xed3_phash_find_map0x0F_opcode0x7b_vv2_24_l1},
/*h(3927)=25 */ {3927, xed3_phash_find_map0x0F_opcode0x7b_vv2_25_l1},
/*h(6134)=26 */ {6134, xed3_phash_find_map0x0F_opcode0x7b_vv2_26_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8951)=28 */ {8951, xed3_phash_find_map0x0F_opcode0x7b_vv2_28_l1},
/*h(3783)=29 */ {3783, xed3_phash_find_map0x0F_opcode0x7b_vv2_29_l1},
/*h(3406)=30 */ {3406, xed3_phash_find_map0x0F_opcode0x7b_vv2_30_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7210)=32 */ {7210, xed3_phash_find_map0x0F_opcode0x7b_vv2_32_l1},
/*h(3639)=33 */ {3639, xed3_phash_find_map0x0F_opcode0x7b_vv2_33_l1},
/*h(5846)=34 */ {5846, xed3_phash_find_map0x0F_opcode0x7b_vv2_34_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1898)=37 */ {1898, xed3_phash_find_map0x0F_opcode0x7b_vv2_37_l1},
/*h(5702)=38 */ {5702, xed3_phash_find_map0x0F_opcode0x7b_vv2_38_l1},
/*h(3118)=39 */ {3118, xed3_phash_find_map0x0F_opcode0x7b_vv2_39_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5935)=41 */ {5935, xed3_phash_find_map0x0F_opcode0x7b_vv2_41_l1},
/*h(5558)=42 */ {5558, xed3_phash_find_map0x0F_opcode0x7b_vv2_42_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10959)=44 */ {10959, xed3_phash_find_map0x0F_opcode0x7b_vv2_44_l1},
/*h(1610)=45 */ {1610, xed3_phash_find_map0x0F_opcode0x7b_vv2_45_l1},
/*h(5414)=46 */ {5414, xed3_phash_find_map0x0F_opcode0x7b_vv2_46_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5647)=49 */ {5647, xed3_phash_find_map0x0F_opcode0x7b_vv2_49_l1},
/*h(7854)=50 */ {7854, xed3_phash_find_map0x0F_opcode0x7b_vv2_50_l1},
/*h(5270)=51 */ {5270, xed3_phash_find_map0x0F_opcode0x7b_vv2_51_l1},
/*h(712)=52 */ {712, xed3_phash_find_map0x0F_opcode0x7b_vv2_52_l1},
/*h(8087)=53 */ {8087, xed3_phash_find_map0x0F_opcode0x7b_vv2_53_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5126)=55 */ {5126, xed3_phash_find_map0x0F_opcode0x7b_vv2_55_l1},
/*h(8930)=56 */ {8930, xed3_phash_find_map0x0F_opcode0x7b_vv2_56_l1},
/*h(3762)=57 */ {3762, xed3_phash_find_map0x0F_opcode0x7b_vv2_57_l1},
/*h(7566)=58 */ {7566, xed3_phash_find_map0x0F_opcode0x7b_vv2_58_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7799)=61 */ {7799, xed3_phash_find_map0x0F_opcode0x7b_vv2_61_l1},
/*h(10993)=62 */ {10993, xed3_phash_find_map0x0F_opcode0x7b_vv2_62_l1},
/*h(4838)=63 */ {4838, xed3_phash_find_map0x0F_opcode0x7b_vv2_63_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3474)=65 */ {3474, xed3_phash_find_map0x0F_opcode0x7b_vv2_65_l1},
/*h(7278)=66 */ {7278, xed3_phash_find_map0x0F_opcode0x7b_vv2_66_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6901)=68 */ {6901, xed3_phash_find_map0x0F_opcode0x7b_vv2_68_l1},
/*h(746)=69 */ {746, xed3_phash_find_map0x0F_opcode0x7b_vv2_69_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1966)=71 */ {1966, xed3_phash_find_map0x0F_opcode0x7b_vv2_71_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5770)=73 */ {5770, xed3_phash_find_map0x0F_opcode0x7b_vv2_73_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7223)=77 */ {7223, xed3_phash_find_map0x0F_opcode0x7b_vv2_77_l1},
/*h(13001)=78 */ {13001, xed3_phash_find_map0x0F_opcode0x7b_vv2_78_l1},
/*h(1678)=79 */ {1678, xed3_phash_find_map0x0F_opcode0x7b_vv2_79_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8066)=81 */ {8066, xed3_phash_find_map0x0F_opcode0x7b_vv2_81_l1},
/*h(1911)=82 */ {1911, xed3_phash_find_map0x0F_opcode0x7b_vv2_82_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8909)=84 */ {8909, xed3_phash_find_map0x0F_opcode0x7b_vv2_84_l1},
/*h(2754)=85 */ {2754, xed3_phash_find_map0x0F_opcode0x7b_vv2_85_l1},
/*h(1767)=86 */ {1767, xed3_phash_find_map0x0F_opcode0x7b_vv2_86_l1},
/*h(1390)=87 */ {1390, xed3_phash_find_map0x0F_opcode0x7b_vv2_87_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7778)=89 */ {7778, xed3_phash_find_map0x0F_opcode0x7b_vv2_89_l1},
/*h(1623)=90 */ {1623, xed3_phash_find_map0x0F_opcode0x7b_vv2_90_l1},
/*h(3830)=91 */ {3830, xed3_phash_find_map0x0F_opcode0x7b_vv2_91_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7634)=93 */ {7634, xed3_phash_find_map0x0F_opcode0x7b_vv2_93_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3686)=95 */ {3686, xed3_phash_find_map0x0F_opcode0x7b_vv2_95_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7490)=97 */ {7490, xed3_phash_find_map0x0F_opcode0x7b_vv2_97_l1},
/*h(3919)=98 */ {3919, xed3_phash_find_map0x0F_opcode0x7b_vv2_98_l1},
/*h(6126)=99 */ {6126, xed3_phash_find_map0x0F_opcode0x7b_vv2_99_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7346)=101 */ {7346, xed3_phash_find_map0x0F_opcode0x7b_vv2_101_l1},
/*h(2788)=102 */ {2788, xed3_phash_find_map0x0F_opcode0x7b_vv2_102_l1},
/*h(3398)=103 */ {3398, xed3_phash_find_map0x0F_opcode0x7b_vv2_103_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2034)=105 */ {2034, xed3_phash_find_map0x0F_opcode0x7b_vv2_105_l1},
/*h(3631)=106 */ {3631, xed3_phash_find_map0x0F_opcode0x7b_vv2_106_l1},
/*h(5838)=107 */ {5838, xed3_phash_find_map0x0F_opcode0x7b_vv2_107_l1},
/*h(4851)=108 */ {4851, xed3_phash_find_map0x0F_opcode0x7b_vv2_108_l1},
/*h(1890)=109 */ {1890, xed3_phash_find_map0x0F_opcode0x7b_vv2_109_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3110)=111 */ {3110, xed3_phash_find_map0x0F_opcode0x7b_vv2_111_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1746)=113 */ {1746, xed3_phash_find_map0x0F_opcode0x7b_vv2_113_l1},
/*h(5927)=114 */ {5927, xed3_phash_find_map0x0F_opcode0x7b_vv2_114_l1},
/*h(8134)=115 */ {8134, xed3_phash_find_map0x0F_opcode0x7b_vv2_115_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1602)=117 */ {1602, xed3_phash_find_map0x0F_opcode0x7b_vv2_117_l1},
/*h(5783)=118 */ {5783, xed3_phash_find_map0x0F_opcode0x7b_vv2_118_l1},
/*h(7990)=119 */ {7990, xed3_phash_find_map0x0F_opcode0x7b_vv2_119_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4042)=121 */ {4042, xed3_phash_find_map0x0F_opcode0x7b_vv2_121_l1},
/*h(5639)=122 */ {5639, xed3_phash_find_map0x0F_opcode0x7b_vv2_122_l1},
/*h(13014)=123 */ {13014, xed3_phash_find_map0x0F_opcode0x7b_vv2_123_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8079)=125 */ {8079, xed3_phash_find_map0x0F_opcode0x7b_vv2_125_l1},
/*h(5495)=126 */ {5495, xed3_phash_find_map0x0F_opcode0x7b_vv2_126_l1},
/*h(7702)=127 */ {7702, xed3_phash_find_map0x0F_opcode0x7b_vv2_127_l1},
/*h(15077)=128 */ {15077, xed3_phash_find_map0x0F_opcode0x7b_vv2_128_l1},
/*h(3754)=129 */ {3754, xed3_phash_find_map0x0F_opcode0x7b_vv2_129_l1},
/*h(1170)=130 */ {1170, xed3_phash_find_map0x0F_opcode0x7b_vv2_130_l1},
/*h(7558)=131 */ {7558, xed3_phash_find_map0x0F_opcode0x7b_vv2_131_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7791)=134 */ {7791, xed3_phash_find_map0x0F_opcode0x7b_vv2_134_l1},
/*h(7414)=135 */ {7414, xed3_phash_find_map0x0F_opcode0x7b_vv2_135_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6050)=137 */ {6050, xed3_phash_find_map0x0F_opcode0x7b_vv2_137_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7270)=139 */ {7270, xed3_phash_find_map0x0F_opcode0x7b_vv2_139_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5906)=141 */ {5906, xed3_phash_find_map0x0F_opcode0x7b_vv2_141_l1},
/*h(738)=142 */ {738, xed3_phash_find_map0x0F_opcode0x7b_vv2_142_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1958)=144 */ {1958, xed3_phash_find_map0x0F_opcode0x7b_vv2_144_l1},
/*h(5762)=145 */ {5762, xed3_phash_find_map0x0F_opcode0x7b_vv2_145_l1},
/*h(3178)=146 */ {3178, xed3_phash_find_map0x0F_opcode0x7b_vv2_146_l1},
/*h(2801)=147 */ {2801, xed3_phash_find_map0x0F_opcode0x7b_vv2_147_l1},
/*h(1814)=148 */ {1814, xed3_phash_find_map0x0F_opcode0x7b_vv2_148_l1},
/*h(5618)=149 */ {5618, xed3_phash_find_map0x0F_opcode0x7b_vv2_149_l1},
/*h(12993)=150 */ {12993, xed3_phash_find_map0x0F_opcode0x7b_vv2_150_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1670)=152 */ {1670, xed3_phash_find_map0x0F_opcode0x7b_vv2_152_l1},
/*h(5474)=153 */ {5474, xed3_phash_find_map0x0F_opcode0x7b_vv2_153_l1},
/*h(1903)=154 */ {1903, xed3_phash_find_map0x0F_opcode0x7b_vv2_154_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1526)=156 */ {1526, xed3_phash_find_map0x0F_opcode0x7b_vv2_156_l1},
/*h(7914)=157 */ {7914, xed3_phash_find_map0x0F_opcode0x7b_vv2_157_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1382)=160 */ {1382, xed3_phash_find_map0x0F_opcode0x7b_vv2_160_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1615)=162 */ {1615, xed3_phash_find_map0x0F_opcode0x7b_vv2_162_l1},
/*h(4809)=163 */ {4809, xed3_phash_find_map0x0F_opcode0x7b_vv2_163_l1},
/*h(1238)=164 */ {1238, xed3_phash_find_map0x0F_opcode0x7b_vv2_164_l1},
/*h(7626)=165 */ {7626, xed3_phash_find_map0x0F_opcode0x7b_vv2_165_l1},
/*h(4055)=166 */ {4055, xed3_phash_find_map0x0F_opcode0x7b_vv2_166_l1},
/*h(13027)=167 */ {13027, xed3_phash_find_map0x0F_opcode0x7b_vv2_167_l1},
/*h(1094)=168 */ {1094, xed3_phash_find_map0x0F_opcode0x7b_vv2_168_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(717)=170 */ {717, xed3_phash_find_map0x0F_opcode0x7b_vv2_170_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3534)=172 */ {3534, xed3_phash_find_map0x0F_opcode0x7b_vv2_172_l1},
/*h(7338)=173 */ {7338, xed3_phash_find_map0x0F_opcode0x7b_vv2_173_l1},
/*h(3767)=174 */ {3767, xed3_phash_find_map0x0F_opcode0x7b_vv2_174_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5974)=176 */ {5974, xed3_phash_find_map0x0F_opcode0x7b_vv2_176_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2026)=178 */ {2026, xed3_phash_find_map0x0F_opcode0x7b_vv2_178_l1},
/*h(10998)=179 */ {10998, xed3_phash_find_map0x0F_opcode0x7b_vv2_179_l1},
/*h(5830)=180 */ {5830, xed3_phash_find_map0x0F_opcode0x7b_vv2_180_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6063)=182 */ {6063, xed3_phash_find_map0x0F_opcode0x7b_vv2_182_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5686)=184 */ {5686, xed3_phash_find_map0x0F_opcode0x7b_vv2_184_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1738)=186 */ {1738, xed3_phash_find_map0x0F_opcode0x7b_vv2_186_l1},
/*h(751)=187 */ {751, xed3_phash_find_map0x0F_opcode0x7b_vv2_187_l1},
/*h(5542)=188 */ {5542, xed3_phash_find_map0x0F_opcode0x7b_vv2_188_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5775)=190 */ {5775, xed3_phash_find_map0x0F_opcode0x7b_vv2_190_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7982)=192 */ {7982, xed3_phash_find_map0x0F_opcode0x7b_vv2_192_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4034)=194 */ {4034, xed3_phash_find_map0x0F_opcode0x7b_vv2_194_l1},
/*h(13006)=195 */ {13006, xed3_phash_find_map0x0F_opcode0x7b_vv2_195_l1},
/*h(5254)=196 */ {5254, xed3_phash_find_map0x0F_opcode0x7b_vv2_196_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8071)=198 */ {8071, xed3_phash_find_map0x0F_opcode0x7b_vv2_198_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7694)=200 */ {7694, xed3_phash_find_map0x0F_opcode0x7b_vv2_200_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8914)=202 */ {8914, xed3_phash_find_map0x0F_opcode0x7b_vv2_202_l1},
/*h(2759)=203 */ {2759, xed3_phash_find_map0x0F_opcode0x7b_vv2_203_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7783)=206 */ {7783, xed3_phash_find_map0x0F_opcode0x7b_vv2_206_l1},
/*h(10977)=207 */ {10977, xed3_phash_find_map0x0F_opcode0x7b_vv2_207_l1},
/*h(7406)=208 */ {7406, xed3_phash_find_map0x0F_opcode0x7b_vv2_208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3458)=210 */ {3458, xed3_phash_find_map0x0F_opcode0x7b_vv2_210_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13040)=212 */ {13040, xed3_phash_find_map0x0F_opcode0x7b_vv2_212_l1},
/*h(6885)=213 */ {6885, xed3_phash_find_map0x0F_opcode0x7b_vv2_213_l1},
/*h(3314)=214 */ {3314, xed3_phash_find_map0x0F_opcode0x7b_vv2_214_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7351)=218 */ {7351, xed3_phash_find_map0x0F_opcode0x7b_vv2_218_l1},
/*h(8948)=219 */ {8948, xed3_phash_find_map0x0F_opcode0x7b_vv2_219_l1},
/*h(1806)=220 */ {1806, xed3_phash_find_map0x0F_opcode0x7b_vv2_220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5610)=222 */ {5610, xed3_phash_find_map0x0F_opcode0x7b_vv2_222_l1},
/*h(2039)=223 */ {2039, xed3_phash_find_map0x0F_opcode0x7b_vv2_223_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8050)=226 */ {8050, xed3_phash_find_map0x0F_opcode0x7b_vv2_226_l1},
/*h(1895)=227 */ {1895, xed3_phash_find_map0x0F_opcode0x7b_vv2_227_l1},
/*h(1518)=228 */ {1518, xed3_phash_find_map0x0F_opcode0x7b_vv2_228_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7906)=230 */ {7906, xed3_phash_find_map0x0F_opcode0x7b_vv2_230_l1},
/*h(1751)=231 */ {1751, xed3_phash_find_map0x0F_opcode0x7b_vv2_231_l1},
/*h(3958)=232 */ {3958, xed3_phash_find_map0x0F_opcode0x7b_vv2_232_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7762)=234 */ {7762, xed3_phash_find_map0x0F_opcode0x7b_vv2_234_l1},
/*h(1607)=235 */ {1607, xed3_phash_find_map0x0F_opcode0x7b_vv2_235_l1},
/*h(3814)=236 */ {3814, xed3_phash_find_map0x0F_opcode0x7b_vv2_236_l1},
/*h(1230)=237 */ {1230, xed3_phash_find_map0x0F_opcode0x7b_vv2_237_l1},
/*h(7618)=238 */ {7618, xed3_phash_find_map0x0F_opcode0x7b_vv2_238_l1},
/*h(4047)=239 */ {4047, xed3_phash_find_map0x0F_opcode0x7b_vv2_239_l1},
/*h(3670)=240 */ {3670, xed3_phash_find_map0x0F_opcode0x7b_vv2_240_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7474)=242 */ {7474, xed3_phash_find_map0x0F_opcode0x7b_vv2_242_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3526)=244 */ {3526, xed3_phash_find_map0x0F_opcode0x7b_vv2_244_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7330)=246 */ {7330, xed3_phash_find_map0x0F_opcode0x7b_vv2_246_l1},
/*h(3759)=247 */ {3759, xed3_phash_find_map0x0F_opcode0x7b_vv2_247_l1},
/*h(2772)=248 */ {2772, xed3_phash_find_map0x0F_opcode0x7b_vv2_248_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7186)=250 */ {7186, xed3_phash_find_map0x0F_opcode0x7b_vv2_250_l1},
/*h(2018)=251 */ {2018, xed3_phash_find_map0x0F_opcode0x7b_vv2_251_l1},
/*h(10990)=252 */ {10990, xed3_phash_find_map0x0F_opcode0x7b_vv2_252_l1},
/*h(4835)=253 */ {4835, xed3_phash_find_map0x0F_opcode0x7b_vv2_253_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1874)=255 */ {1874, xed3_phash_find_map0x0F_opcode0x7b_vv2_255_l1},
/*h(5678)=256 */ {5678, xed3_phash_find_map0x0F_opcode0x7b_vv2_256_l1},
/*h(3094)=257 */ {3094, xed3_phash_find_map0x0F_opcode0x7b_vv2_257_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1730)=259 */ {1730, xed3_phash_find_map0x0F_opcode0x7b_vv2_259_l1},
/*h(8118)=260 */ {8118, xed3_phash_find_map0x0F_opcode0x7b_vv2_260_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1586)=263 */ {1586, xed3_phash_find_map0x0F_opcode0x7b_vv2_263_l1},
/*h(5390)=264 */ {5390, xed3_phash_find_map0x0F_opcode0x7b_vv2_264_l1},
/*h(2806)=265 */ {2806, xed3_phash_find_map0x0F_opcode0x7b_vv2_265_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5623)=267 */ {5623, xed3_phash_find_map0x0F_opcode0x7b_vv2_267_l1},
/*h(7830)=268 */ {7830, xed3_phash_find_map0x0F_opcode0x7b_vv2_268_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3882)=271 */ {3882, xed3_phash_find_map0x0F_opcode0x7b_vv2_271_l1},
/*h(7686)=272 */ {7686, xed3_phash_find_map0x0F_opcode0x7b_vv2_272_l1},
/*h(15061)=273 */ {15061, xed3_phash_find_map0x0F_opcode0x7b_vv2_273_l1},
/*h(8906)=274 */ {8906, xed3_phash_find_map0x0F_opcode0x7b_vv2_274_l1},
/*h(7919)=275 */ {7919, xed3_phash_find_map0x0F_opcode0x7b_vv2_275_l1},
/*h(7542)=276 */ {7542, xed3_phash_find_map0x0F_opcode0x7b_vv2_276_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3594)=279 */ {3594, xed3_phash_find_map0x0F_opcode0x7b_vv2_279_l1},
/*h(7398)=280 */ {7398, xed3_phash_find_map0x0F_opcode0x7b_vv2_280_l1},
/*h(4814)=281 */ {4814, xed3_phash_find_map0x0F_opcode0x7b_vv2_281_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6034)=283 */ {6034, xed3_phash_find_map0x0F_opcode0x7b_vv2_283_l1},
/*h(7254)=284 */ {7254, xed3_phash_find_map0x0F_opcode0x7b_vv2_284_l1},
/*h(13032)=285 */ {13032, xed3_phash_find_map0x0F_opcode0x7b_vv2_285_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5890)=287 */ {5890, xed3_phash_find_map0x0F_opcode0x7b_vv2_287_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1942)=289 */ {1942, xed3_phash_find_map0x0F_opcode0x7b_vv2_289_l1},
/*h(15095)=290 */ {15095, xed3_phash_find_map0x0F_opcode0x7b_vv2_290_l1},
/*h(8940)=291 */ {8940, xed3_phash_find_map0x0F_opcode0x7b_vv2_291_l1},
/*h(2785)=292 */ {2785, xed3_phash_find_map0x0F_opcode0x7b_vv2_292_l1},
/*h(1798)=293 */ {1798, xed3_phash_find_map0x0F_opcode0x7b_vv2_293_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5602)=295 */ {5602, xed3_phash_find_map0x0F_opcode0x7b_vv2_295_l1},
/*h(2031)=296 */ {2031, xed3_phash_find_map0x0F_opcode0x7b_vv2_296_l1},
/*h(1654)=297 */ {1654, xed3_phash_find_map0x0F_opcode0x7b_vv2_297_l1},
/*h(4848)=298 */ {4848, xed3_phash_find_map0x0F_opcode0x7b_vv2_298_l1},
/*h(8042)=299 */ {8042, xed3_phash_find_map0x0F_opcode0x7b_vv2_299_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1510)=301 */ {1510, xed3_phash_find_map0x0F_opcode0x7b_vv2_301_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5314)=303 */ {5314, xed3_phash_find_map0x0F_opcode0x7b_vv2_303_l1},
/*h(1743)=304 */ {1743, xed3_phash_find_map0x0F_opcode0x7b_vv2_304_l1},
/*h(3950)=305 */ {3950, xed3_phash_find_map0x0F_opcode0x7b_vv2_305_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7754)=307 */ {7754, xed3_phash_find_map0x0F_opcode0x7b_vv2_307_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1222)=309 */ {1222, xed3_phash_find_map0x0F_opcode0x7b_vv2_309_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4039)=312 */ {4039, xed3_phash_find_map0x0F_opcode0x7b_vv2_312_l1},
/*h(13011)=313 */ {13011, xed3_phash_find_map0x0F_opcode0x7b_vv2_313_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7466)=315 */ {7466, xed3_phash_find_map0x0F_opcode0x7b_vv2_315_l1},
/*h(3895)=316 */ {3895, xed3_phash_find_map0x0F_opcode0x7b_vv2_316_l1},
/*h(6102)=317 */ {6102, xed3_phash_find_map0x0F_opcode0x7b_vv2_317_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8919)=319 */ {8919, xed3_phash_find_map0x0F_opcode0x7b_vv2_319_l1},
/*h(2764)=320 */ {2764, xed3_phash_find_map0x0F_opcode0x7b_vv2_320_l1},
/*h(3374)=321 */ {3374, xed3_phash_find_map0x0F_opcode0x7b_vv2_321_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7178)=323 */ {7178, xed3_phash_find_map0x0F_opcode0x7b_vv2_323_l1},
/*h(3607)=324 */ {3607, xed3_phash_find_map0x0F_opcode0x7b_vv2_324_l1},
/*h(5814)=325 */ {5814, xed3_phash_find_map0x0F_opcode0x7b_vv2_325_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1866)=327 */ {1866, xed3_phash_find_map0x0F_opcode0x7b_vv2_327_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3086)=329 */ {3086, xed3_phash_find_map0x0F_opcode0x7b_vv2_329_l1},
/*h(13045)=330 */ {13045, xed3_phash_find_map0x0F_opcode0x7b_vv2_330_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3319)=332 */ {3319, xed3_phash_find_map0x0F_opcode0x7b_vv2_332_l1},
/*h(8110)=333 */ {8110, xed3_phash_find_map0x0F_opcode0x7b_vv2_333_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1578)=335 */ {1578, xed3_phash_find_map0x0F_opcode0x7b_vv2_335_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5382)=337 */ {5382, xed3_phash_find_map0x0F_opcode0x7b_vv2_337_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4018)=339 */ {4018, xed3_phash_find_map0x0F_opcode0x7b_vv2_339_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7822)=341 */ {7822, xed3_phash_find_map0x0F_opcode0x7b_vv2_341_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8055)=343 */ {8055, xed3_phash_find_map0x0F_opcode0x7b_vv2_343_l1},
/*h(1290)=344 */ {1290, xed3_phash_find_map0x0F_opcode0x7b_vv2_344_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(15053)=346 */ {15053, xed3_phash_find_map0x0F_opcode0x7b_vv2_346_l1},
/*h(3730)=347 */ {3730, xed3_phash_find_map0x0F_opcode0x7b_vv2_347_l1},
/*h(7911)=348 */ {7911, xed3_phash_find_map0x0F_opcode0x7b_vv2_348_l1},
/*h(7534)=349 */ {7534, xed3_phash_find_map0x0F_opcode0x7b_vv2_349_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3586)=351 */ {3586, xed3_phash_find_map0x0F_opcode0x7b_vv2_351_l1},
/*h(7767)=352 */ {7767, xed3_phash_find_map0x0F_opcode0x7b_vv2_352_l1},
/*h(4806)=353 */ {4806, xed3_phash_find_map0x0F_opcode0x7b_vv2_353_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6026)=355 */ {6026, xed3_phash_find_map0x0F_opcode0x7b_vv2_355_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7246)=357 */ {7246, xed3_phash_find_map0x0F_opcode0x7b_vv2_357_l1},
/*h(13024)=358 */ {13024, xed3_phash_find_map0x0F_opcode0x7b_vv2_358_l1},
/*h(6869)=359 */ {6869, xed3_phash_find_map0x0F_opcode0x7b_vv2_359_l1},
/*h(3298)=360 */ {3298, xed3_phash_find_map0x0F_opcode0x7b_vv2_360_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1934)=362 */ {1934, xed3_phash_find_map0x0F_opcode0x7b_vv2_362_l1},
/*h(5738)=363 */ {5738, xed3_phash_find_map0x0F_opcode0x7b_vv2_363_l1},
/*h(8932)=364 */ {8932, xed3_phash_find_map0x0F_opcode0x7b_vv2_364_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8178)=367 */ {8178, xed3_phash_find_map0x0F_opcode0x7b_vv2_367_l1},
/*h(2023)=368 */ {2023, xed3_phash_find_map0x0F_opcode0x7b_vv2_368_l1},
/*h(10995)=369 */ {10995, xed3_phash_find_map0x0F_opcode0x7b_vv2_369_l1},
/*h(4840)=370 */ {4840, xed3_phash_find_map0x0F_opcode0x7b_vv2_370_l1},
/*h(8034)=371 */ {8034, xed3_phash_find_map0x0F_opcode0x7b_vv2_371_l1},
/*h(1879)=372 */ {1879, xed3_phash_find_map0x0F_opcode0x7b_vv2_372_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4086)=374 */ {4086, xed3_phash_find_map0x0F_opcode0x7b_vv2_374_l1},
/*h(7890)=375 */ {7890, xed3_phash_find_map0x0F_opcode0x7b_vv2_375_l1},
/*h(1735)=376 */ {1735, xed3_phash_find_map0x0F_opcode0x7b_vv2_376_l1},
/*h(748)=377 */ {748, xed3_phash_find_map0x0F_opcode0x7b_vv2_377_l1},
/*h(3942)=378 */ {3942, xed3_phash_find_map0x0F_opcode0x7b_vv2_378_l1},
/*h(7746)=379 */ {7746, xed3_phash_find_map0x0F_opcode0x7b_vv2_379_l1},
/*h(5162)=380 */ {5162, xed3_phash_find_map0x0F_opcode0x7b_vv2_380_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3798)=382 */ {3798, xed3_phash_find_map0x0F_opcode0x7b_vv2_382_l1},
/*h(7602)=383 */ {7602, xed3_phash_find_map0x0F_opcode0x7b_vv2_383_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13003)=385 */ {13003, xed3_phash_find_map0x0F_opcode0x7b_vv2_385_l1},
/*h(3654)=386 */ {3654, xed3_phash_find_map0x0F_opcode0x7b_vv2_386_l1},
/*h(7458)=387 */ {7458, xed3_phash_find_map0x0F_opcode0x7b_vv2_387_l1},
/*h(3887)=388 */ {3887, xed3_phash_find_map0x0F_opcode0x7b_vv2_388_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3510)=390 */ {3510, xed3_phash_find_map0x0F_opcode0x7b_vv2_390_l1},
/*h(7314)=391 */ {7314, xed3_phash_find_map0x0F_opcode0x7b_vv2_391_l1},
/*h(8911)=392 */ {8911, xed3_phash_find_map0x0F_opcode0x7b_vv2_392_l1},
/*h(2756)=393 */ {2756, xed3_phash_find_map0x0F_opcode0x7b_vv2_393_l1},
/*h(3366)=394 */ {3366, xed3_phash_find_map0x0F_opcode0x7b_vv2_394_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3599)=396 */ {3599, xed3_phash_find_map0x0F_opcode0x7b_vv2_396_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4819)=398 */ {4819, xed3_phash_find_map0x0F_opcode0x7b_vv2_398_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6039)=400 */ {6039, xed3_phash_find_map0x0F_opcode0x7b_vv2_400_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3078)=402 */ {3078, xed3_phash_find_map0x0F_opcode0x7b_vv2_402_l1},
/*h(13037)=403 */ {13037, xed3_phash_find_map0x0F_opcode0x7b_vv2_403_l1},
/*h(5895)=404 */ {5895, xed3_phash_find_map0x0F_opcode0x7b_vv2_404_l1},
/*h(727)=405 */ {727, xed3_phash_find_map0x0F_opcode0x7b_vv2_405_l1},
/*h(8102)=406 */ {8102, xed3_phash_find_map0x0F_opcode0x7b_vv2_406_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5751)=408 */ {5751, xed3_phash_find_map0x0F_opcode0x7b_vv2_408_l1},
/*h(8945)=409 */ {8945, xed3_phash_find_map0x0F_opcode0x7b_vv2_409_l1},
/*h(2790)=410 */ {2790, xed3_phash_find_map0x0F_opcode0x7b_vv2_410_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1426)=412 */ {1426, xed3_phash_find_map0x0F_opcode0x7b_vv2_412_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7814)=414 */ {7814, xed3_phash_find_map0x0F_opcode0x7b_vv2_414_l1},
/*h(4853)=415 */ {4853, xed3_phash_find_map0x0F_opcode0x7b_vv2_415_l1},
/*h(1282)=416 */ {1282, xed3_phash_find_map0x0F_opcode0x7b_vv2_416_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7670)=418 */ {7670, xed3_phash_find_map0x0F_opcode0x7b_vv2_418_l1},
/*h(15045)=419 */ {15045, xed3_phash_find_map0x0F_opcode0x7b_vv2_419_l1},
/*h(3722)=420 */ {3722, xed3_phash_find_map0x0F_opcode0x7b_vv2_420_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7526)=422 */ {7526, xed3_phash_find_map0x0F_opcode0x7b_vv2_422_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7759)=424 */ {7759, xed3_phash_find_map0x0F_opcode0x7b_vv2_424_l1},
/*h(10953)=425 */ {10953, xed3_phash_find_map0x0F_opcode0x7b_vv2_425_l1},
/*h(7382)=426 */ {7382, xed3_phash_find_map0x0F_opcode0x7b_vv2_426_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3434)=428 */ {3434, xed3_phash_find_map0x0F_opcode0x7b_vv2_428_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7238)=430 */ {7238, xed3_phash_find_map0x0F_opcode0x7b_vv2_430_l1},
/*h(6861)=431 */ {6861, xed3_phash_find_map0x0F_opcode0x7b_vv2_431_l1},
/*h(706)=432 */ {706, xed3_phash_find_map0x0F_opcode0x7b_vv2_432_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1926)=434 */ {1926, xed3_phash_find_map0x0F_opcode0x7b_vv2_434_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5730)=436 */ {5730, xed3_phash_find_map0x0F_opcode0x7b_vv2_436_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1782)=438 */ {1782, xed3_phash_find_map0x0F_opcode0x7b_vv2_438_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8170)=440 */ {8170, xed3_phash_find_map0x0F_opcode0x7b_vv2_440_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10987)=442 */ {10987, xed3_phash_find_map0x0F_opcode0x7b_vv2_442_l1},
/*h(4832)=443 */ {4832, xed3_phash_find_map0x0F_opcode0x7b_vv2_443_l1},
/*h(5442)=444 */ {5442, xed3_phash_find_map0x0F_opcode0x7b_vv2_444_l1},
/*h(1871)=445 */ {1871, xed3_phash_find_map0x0F_opcode0x7b_vv2_445_l1},
/*h(4078)=446 */ {4078, xed3_phash_find_map0x0F_opcode0x7b_vv2_446_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7882)=448 */ {7882, xed3_phash_find_map0x0F_opcode0x7b_vv2_448_l1},
/*h(6895)=449 */ {6895, xed3_phash_find_map0x0F_opcode0x7b_vv2_449_l1},
/*h(740)=450 */ {740, xed3_phash_find_map0x0F_opcode0x7b_vv2_450_l1},
/*h(1350)=451 */ {1350, xed3_phash_find_map0x0F_opcode0x7b_vv2_451_l1},
/*h(5154)=452 */ {5154, xed3_phash_find_map0x0F_opcode0x7b_vv2_452_l1},
/*h(1583)=453 */ {1583, xed3_phash_find_map0x0F_opcode0x7b_vv2_453_l1},
/*h(3790)=454 */ {3790, xed3_phash_find_map0x0F_opcode0x7b_vv2_454_l1},
/*h(1206)=455 */ {1206, xed3_phash_find_map0x0F_opcode0x7b_vv2_455_l1},
/*h(7594)=456 */ {7594, xed3_phash_find_map0x0F_opcode0x7b_vv2_456_l1},
/*h(4023)=457 */ {4023, xed3_phash_find_map0x0F_opcode0x7b_vv2_457_l1},
/*h(12995)=458 */ {12995, xed3_phash_find_map0x0F_opcode0x7b_vv2_458_l1},
/*h(1062)=459 */ {1062, xed3_phash_find_map0x0F_opcode0x7b_vv2_459_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3879)=461 */ {3879, xed3_phash_find_map0x0F_opcode0x7b_vv2_461_l1},
/*h(3502)=462 */ {3502, xed3_phash_find_map0x0F_opcode0x7b_vv2_462_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7306)=464 */ {7306, xed3_phash_find_map0x0F_opcode0x7b_vv2_464_l1},
/*h(3735)=465 */ {3735, xed3_phash_find_map0x0F_opcode0x7b_vv2_465_l1},
/*h(5942)=466 */ {5942, xed3_phash_find_map0x0F_opcode0x7b_vv2_466_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1994)=469 */ {1994, xed3_phash_find_map0x0F_opcode0x7b_vv2_469_l1},
/*h(5798)=470 */ {5798, xed3_phash_find_map0x0F_opcode0x7b_vv2_470_l1},
/*h(4811)=471 */ {4811, xed3_phash_find_map0x0F_opcode0x7b_vv2_471_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3447)=473 */ {3447, xed3_phash_find_map0x0F_opcode0x7b_vv2_473_l1},
/*h(5654)=474 */ {5654, xed3_phash_find_map0x0F_opcode0x7b_vv2_474_l1},
/*h(13029)=475 */ {13029, xed3_phash_find_map0x0F_opcode0x7b_vv2_475_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1706)=477 */ {1706, xed3_phash_find_map0x0F_opcode0x7b_vv2_477_l1},
/*h(5510)=478 */ {5510, xed3_phash_find_map0x0F_opcode0x7b_vv2_478_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5743)=481 */ {5743, xed3_phash_find_map0x0F_opcode0x7b_vv2_481_l1},
/*h(5366)=482 */ {5366, xed3_phash_find_map0x0F_opcode0x7b_vv2_482_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8183)=485 */ {8183, xed3_phash_find_map0x0F_opcode0x7b_vv2_485_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5222)=487 */ {5222, xed3_phash_find_map0x0F_opcode0x7b_vv2_487_l1},
/*h(4845)=488 */ {4845, xed3_phash_find_map0x0F_opcode0x7b_vv2_488_l1},
/*h(3858)=489 */ {3858, xed3_phash_find_map0x0F_opcode0x7b_vv2_489_l1},
/*h(7662)=490 */ {7662, xed3_phash_find_map0x0F_opcode0x7b_vv2_490_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3714)=493 */ {3714, xed3_phash_find_map0x0F_opcode0x7b_vv2_493_l1},
/*h(753)=494 */ {753, xed3_phash_find_map0x0F_opcode0x7b_vv2_494_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3570)=497 */ {3570, xed3_phash_find_map0x0F_opcode0x7b_vv2_497_l1},
/*h(7374)=498 */ {7374, xed3_phash_find_map0x0F_opcode0x7b_vv2_498_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7607)=501 */ {7607, xed3_phash_find_map0x0F_opcode0x7b_vv2_501_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13008)=503 */ {13008, xed3_phash_find_map0x0F_opcode0x7b_vv2_503_l1},
/*h(6853)=504 */ {6853, xed3_phash_find_map0x0F_opcode0x7b_vv2_504_l1},
/*h(5866)=505 */ {5866, xed3_phash_find_map0x0F_opcode0x7b_vv2_505_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8916)=509 */ {8916, xed3_phash_find_map0x0F_opcode0x7b_vv2_509_l1},
/*h(2761)=510 */ {2761, xed3_phash_find_map0x0F_opcode0x7b_vv2_510_l1},
/*h(1774)=511 */ {1774, xed3_phash_find_map0x0F_opcode0x7b_vv2_511_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5578)=513 */ {5578, xed3_phash_find_map0x0F_opcode0x7b_vv2_513_l1},
/*h(2007)=514 */ {2007, xed3_phash_find_map0x0F_opcode0x7b_vv2_514_l1},
/*h(10979)=515 */ {10979, xed3_phash_find_map0x0F_opcode0x7b_vv2_515_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8018)=517 */ {8018, xed3_phash_find_map0x0F_opcode0x7b_vv2_517_l1},
/*h(1863)=518 */ {1863, xed3_phash_find_map0x0F_opcode0x7b_vv2_518_l1},
/*h(4070)=519 */ {4070, xed3_phash_find_map0x0F_opcode0x7b_vv2_519_l1},
/*h(13042)=520 */ {13042, xed3_phash_find_map0x0F_opcode0x7b_vv2_520_l1},
/*h(7874)=521 */ {7874, xed3_phash_find_map0x0F_opcode0x7b_vv2_521_l1},
/*h(1719)=522 */ {1719, xed3_phash_find_map0x0F_opcode0x7b_vv2_522_l1},
/*h(3926)=523 */ {3926, xed3_phash_find_map0x0F_opcode0x7b_vv2_523_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7730)=525 */ {7730, xed3_phash_find_map0x0F_opcode0x7b_vv2_525_l1},
/*h(1575)=526 */ {1575, xed3_phash_find_map0x0F_opcode0x7b_vv2_526_l1},
/*h(1198)=527 */ {1198, xed3_phash_find_map0x0F_opcode0x7b_vv2_527_l1},
/*h(2795)=528 */ {2795, xed3_phash_find_map0x0F_opcode0x7b_vv2_528_l1},
/*h(7586)=529 */ {7586, xed3_phash_find_map0x0F_opcode0x7b_vv2_529_l1},
/*h(4015)=530 */ {4015, xed3_phash_find_map0x0F_opcode0x7b_vv2_530_l1},
/*h(3638)=531 */ {3638, xed3_phash_find_map0x0F_opcode0x7b_vv2_531_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7442)=533 */ {7442, xed3_phash_find_map0x0F_opcode0x7b_vv2_533_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3494)=535 */ {3494, xed3_phash_find_map0x0F_opcode0x7b_vv2_535_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7298)=537 */ {7298, xed3_phash_find_map0x0F_opcode0x7b_vv2_537_l1},
/*h(3727)=538 */ {3727, xed3_phash_find_map0x0F_opcode0x7b_vv2_538_l1},
/*h(3350)=539 */ {3350, xed3_phash_find_map0x0F_opcode0x7b_vv2_539_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1986)=541 */ {1986, xed3_phash_find_map0x0F_opcode0x7b_vv2_541_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10958)=543 */ {10958, xed3_phash_find_map0x0F_opcode0x7b_vv2_543_l1},
/*h(4803)=544 */ {4803, xed3_phash_find_map0x0F_opcode0x7b_vv2_544_l1},
/*h(1842)=545 */ {1842, xed3_phash_find_map0x0F_opcode0x7b_vv2_545_l1},
/*h(6023)=546 */ {6023, xed3_phash_find_map0x0F_opcode0x7b_vv2_546_l1},
/*h(5646)=547 */ {5646, xed3_phash_find_map0x0F_opcode0x7b_vv2_547_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1698)=549 */ {1698, xed3_phash_find_map0x0F_opcode0x7b_vv2_549_l1},
/*h(711)=550 */ {711, xed3_phash_find_map0x0F_opcode0x7b_vv2_550_l1},
/*h(8086)=551 */ {8086, xed3_phash_find_map0x0F_opcode0x7b_vv2_551_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1554)=553 */ {1554, xed3_phash_find_map0x0F_opcode0x7b_vv2_553_l1},
/*h(8929)=554 */ {8929, xed3_phash_find_map0x0F_opcode0x7b_vv2_554_l1},
/*h(2774)=555 */ {2774, xed3_phash_find_map0x0F_opcode0x7b_vv2_555_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8175)=557 */ {8175, xed3_phash_find_map0x0F_opcode0x7b_vv2_557_l1},
/*h(1410)=558 */ {1410, xed3_phash_find_map0x0F_opcode0x7b_vv2_558_l1},
/*h(7798)=559 */ {7798, xed3_phash_find_map0x0F_opcode0x7b_vv2_559_l1},
/*h(10992)=560 */ {10992, xed3_phash_find_map0x0F_opcode0x7b_vv2_560_l1},
/*h(3850)=561 */ {3850, xed3_phash_find_map0x0F_opcode0x7b_vv2_561_l1},
/*h(1266)=562 */ {1266, xed3_phash_find_map0x0F_opcode0x7b_vv2_562_l1},
/*h(7654)=563 */ {7654, xed3_phash_find_map0x0F_opcode0x7b_vv2_563_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7887)=566 */ {7887, xed3_phash_find_map0x0F_opcode0x7b_vv2_566_l1},
/*h(7510)=567 */ {7510, xed3_phash_find_map0x0F_opcode0x7b_vv2_567_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3562)=569 */ {3562, xed3_phash_find_map0x0F_opcode0x7b_vv2_569_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7366)=571 */ {7366, xed3_phash_find_map0x0F_opcode0x7b_vv2_571_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6002)=573 */ {6002, xed3_phash_find_map0x0F_opcode0x7b_vv2_573_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7222)=575 */ {7222, xed3_phash_find_map0x0F_opcode0x7b_vv2_575_l1},
/*h(13000)=576 */ {13000, xed3_phash_find_map0x0F_opcode0x7b_vv2_576_l1},
/*h(5858)=577 */ {5858, xed3_phash_find_map0x0F_opcode0x7b_vv2_577_l1},
/*h(3274)=578 */ {3274, xed3_phash_find_map0x0F_opcode0x7b_vv2_578_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1910)=580 */ {1910, xed3_phash_find_map0x0F_opcode0x7b_vv2_580_l1},
/*h(5714)=581 */ {5714, xed3_phash_find_map0x0F_opcode0x7b_vv2_581_l1},
/*h(8908)=582 */ {8908, xed3_phash_find_map0x0F_opcode0x7b_vv2_582_l1},
/*h(2753)=583 */ {2753, xed3_phash_find_map0x0F_opcode0x7b_vv2_583_l1},
/*h(1766)=584 */ {1766, xed3_phash_find_map0x0F_opcode0x7b_vv2_584_l1},
/*h(5570)=585 */ {5570, xed3_phash_find_map0x0F_opcode0x7b_vv2_585_l1},
/*h(1999)=586 */ {1999, xed3_phash_find_map0x0F_opcode0x7b_vv2_586_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1622)=588 */ {1622, xed3_phash_find_map0x0F_opcode0x7b_vv2_588_l1},
/*h(4816)=589 */ {4816, xed3_phash_find_map0x0F_opcode0x7b_vv2_589_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1478)=592 */ {1478, xed3_phash_find_map0x0F_opcode0x7b_vv2_592_l1},
/*h(13034)=593 */ {13034, xed3_phash_find_map0x0F_opcode0x7b_vv2_593_l1},
/*h(1711)=594 */ {1711, xed3_phash_find_map0x0F_opcode0x7b_vv2_594_l1},
/*h(724)=595 */ {724, xed3_phash_find_map0x0F_opcode0x7b_vv2_595_l1},
/*h(1334)=596 */ {1334, xed3_phash_find_map0x0F_opcode0x7b_vv2_596_l1},
/*h(7722)=597 */ {7722, xed3_phash_find_map0x0F_opcode0x7b_vv2_597_l1},
/*h(5138)=598 */ {5138, xed3_phash_find_map0x0F_opcode0x7b_vv2_598_l1},
/*h(8942)=599 */ {8942, xed3_phash_find_map0x0F_opcode0x7b_vv2_599_l1},
/*h(2787)=600 */ {2787, xed3_phash_find_map0x0F_opcode0x7b_vv2_600_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4007)=602 */ {4007, xed3_phash_find_map0x0F_opcode0x7b_vv2_602_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3630)=604 */ {3630, xed3_phash_find_map0x0F_opcode0x7b_vv2_604_l1},
/*h(7434)=605 */ {7434, xed3_phash_find_map0x0F_opcode0x7b_vv2_605_l1},
/*h(3863)=606 */ {3863, xed3_phash_find_map0x0F_opcode0x7b_vv2_606_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6070)=608 */ {6070, xed3_phash_find_map0x0F_opcode0x7b_vv2_608_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3719)=610 */ {3719, xed3_phash_find_map0x0F_opcode0x7b_vv2_610_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5926)=612 */ {5926, xed3_phash_find_map0x0F_opcode0x7b_vv2_612_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3575)=614 */ {3575, xed3_phash_find_map0x0F_opcode0x7b_vv2_614_l1},
/*h(10950)=615 */ {10950, xed3_phash_find_map0x0F_opcode0x7b_vv2_615_l1},
/*h(5782)=616 */ {5782, xed3_phash_find_map0x0F_opcode0x7b_vv2_616_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1834)=618 */ {1834, xed3_phash_find_map0x0F_opcode0x7b_vv2_618_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5638)=620 */ {5638, xed3_phash_find_map0x0F_opcode0x7b_vv2_620_l1},
/*h(13013)=621 */ {13013, xed3_phash_find_map0x0F_opcode0x7b_vv2_621_l1},
/*h(5871)=622 */ {5871, xed3_phash_find_map0x0F_opcode0x7b_vv2_622_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8078)=624 */ {8078, xed3_phash_find_map0x0F_opcode0x7b_vv2_624_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1546)=626 */ {1546, xed3_phash_find_map0x0F_opcode0x7b_vv2_626_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2766)=628 */ {2766, xed3_phash_find_map0x0F_opcode0x7b_vv2_628_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3986)=630 */ {3986, xed3_phash_find_map0x0F_opcode0x7b_vv2_630_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7790)=632 */ {7790, xed3_phash_find_map0x0F_opcode0x7b_vv2_632_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8023)=634 */ {8023, xed3_phash_find_map0x0F_opcode0x7b_vv2_634_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7879)=638 */ {7879, xed3_phash_find_map0x0F_opcode0x7b_vv2_638_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(737)=640 */ {737, xed3_phash_find_map0x0F_opcode0x7b_vv2_640_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3554)=642 */ {3554, xed3_phash_find_map0x0F_opcode0x7b_vv2_642_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2800)=645 */ {2800, xed3_phash_find_map0x0F_opcode0x7b_vv2_645_l1},
/*h(3410)=646 */ {3410, xed3_phash_find_map0x0F_opcode0x7b_vv2_646_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7214)=648 */ {7214, xed3_phash_find_map0x0F_opcode0x7b_vv2_648_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3266)=650 */ {3266, xed3_phash_find_map0x0F_opcode0x7b_vv2_650_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1902)=652 */ {1902, xed3_phash_find_map0x0F_opcode0x7b_vv2_652_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5706)=654 */ {5706, xed3_phash_find_map0x0F_opcode0x7b_vv2_654_l1},
/*h(8900)=655 */ {8900, xed3_phash_find_map0x0F_opcode0x7b_vv2_655_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8146)=658 */ {8146, xed3_phash_find_map0x0F_opcode0x7b_vv2_658_l1},
/*h(1991)=659 */ {1991, xed3_phash_find_map0x0F_opcode0x7b_vv2_659_l1},
/*h(10963)=660 */ {10963, xed3_phash_find_map0x0F_opcode0x7b_vv2_660_l1},
/*h(4808)=661 */ {4808, xed3_phash_find_map0x0F_opcode0x7b_vv2_661_l1},
/*h(8002)=662 */ {8002, xed3_phash_find_map0x0F_opcode0x7b_vv2_662_l1},
/*h(1847)=663 */ {1847, xed3_phash_find_map0x0F_opcode0x7b_vv2_663_l1},
/*h(4054)=664 */ {4054, xed3_phash_find_map0x0F_opcode0x7b_vv2_664_l1},
/*h(13026)=665 */ {13026, xed3_phash_find_map0x0F_opcode0x7b_vv2_665_l1},
/*h(7858)=666 */ {7858, xed3_phash_find_map0x0F_opcode0x7b_vv2_666_l1},
/*h(1703)=667 */ {1703, xed3_phash_find_map0x0F_opcode0x7b_vv2_667_l1},
/*h(3910)=668 */ {3910, xed3_phash_find_map0x0F_opcode0x7b_vv2_668_l1},
/*h(1326)=669 */ {1326, xed3_phash_find_map0x0F_opcode0x7b_vv2_669_l1},
/*h(7714)=670 */ {7714, xed3_phash_find_map0x0F_opcode0x7b_vv2_670_l1},
/*h(1559)=671 */ {1559, xed3_phash_find_map0x0F_opcode0x7b_vv2_671_l1},
/*h(3766)=672 */ {3766, xed3_phash_find_map0x0F_opcode0x7b_vv2_672_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7570)=674 */ {7570, xed3_phash_find_map0x0F_opcode0x7b_vv2_674_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3622)=676 */ {3622, xed3_phash_find_map0x0F_opcode0x7b_vv2_676_l1},
/*h(10997)=677 */ {10997, xed3_phash_find_map0x0F_opcode0x7b_vv2_677_l1},
/*h(7426)=678 */ {7426, xed3_phash_find_map0x0F_opcode0x7b_vv2_678_l1},
/*h(1271)=679 */ {1271, xed3_phash_find_map0x0F_opcode0x7b_vv2_679_l1},
/*h(6062)=680 */ {6062, xed3_phash_find_map0x0F_opcode0x7b_vv2_680_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7282)=682 */ {7282, xed3_phash_find_map0x0F_opcode0x7b_vv2_682_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3334)=685 */ {3334, xed3_phash_find_map0x0F_opcode0x7b_vv2_685_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1970)=687 */ {1970, xed3_phash_find_map0x0F_opcode0x7b_vv2_687_l1},
/*h(5774)=688 */ {5774, xed3_phash_find_map0x0F_opcode0x7b_vv2_688_l1},
/*h(3190)=689 */ {3190, xed3_phash_find_map0x0F_opcode0x7b_vv2_689_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1826)=691 */ {1826, xed3_phash_find_map0x0F_opcode0x7b_vv2_691_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13005)=693 */ {13005, xed3_phash_find_map0x0F_opcode0x7b_vv2_693_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1682)=695 */ {1682, xed3_phash_find_map0x0F_opcode0x7b_vv2_695_l1},
/*h(5486)=696 */ {5486, xed3_phash_find_map0x0F_opcode0x7b_vv2_696_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5719)=699 */ {5719, xed3_phash_find_map0x0F_opcode0x7b_vv2_699_l1},
/*h(8913)=700 */ {8913, xed3_phash_find_map0x0F_opcode0x7b_vv2_700_l1},
/*h(2758)=701 */ {2758, xed3_phash_find_map0x0F_opcode0x7b_vv2_701_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3978)=703 */ {3978, xed3_phash_find_map0x0F_opcode0x7b_vv2_703_l1},
/*h(7782)=704 */ {7782, xed3_phash_find_map0x0F_opcode0x7b_vv2_704_l1},
/*h(10976)=705 */ {10976, xed3_phash_find_map0x0F_opcode0x7b_vv2_705_l1},
/*h(4821)=706 */ {4821, xed3_phash_find_map0x0F_opcode0x7b_vv2_706_l1},
/*h(1250)=707 */ {1250, xed3_phash_find_map0x0F_opcode0x7b_vv2_707_l1},
/*h(7638)=708 */ {7638, xed3_phash_find_map0x0F_opcode0x7b_vv2_708_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13039)=710 */ {13039, xed3_phash_find_map0x0F_opcode0x7b_vv2_710_l1},
/*h(1106)=711 */ {1106, xed3_phash_find_map0x0F_opcode0x7b_vv2_711_l1},
/*h(7494)=712 */ {7494, xed3_phash_find_map0x0F_opcode0x7b_vv2_712_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6130)=715 */ {6130, xed3_phash_find_map0x0F_opcode0x7b_vv2_715_l1},
/*h(7350)=716 */ {7350, xed3_phash_find_map0x0F_opcode0x7b_vv2_716_l1},
/*h(8947)=717 */ {8947, xed3_phash_find_map0x0F_opcode0x7b_vv2_717_l1},
/*h(2792)=718 */ {2792, xed3_phash_find_map0x0F_opcode0x7b_vv2_718_l1},
/*h(5986)=719 */ {5986, xed3_phash_find_map0x0F_opcode0x7b_vv2_719_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2038)=721 */ {2038, xed3_phash_find_map0x0F_opcode0x7b_vv2_721_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4855)=723 */ {4855, xed3_phash_find_map0x0F_opcode0x7b_vv2_723_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1894)=725 */ {1894, xed3_phash_find_map0x0F_opcode0x7b_vv2_725_l1},
/*h(15047)=726 */ {15047, xed3_phash_find_map0x0F_opcode0x7b_vv2_726_l1},
/*h(5698)=727 */ {5698, xed3_phash_find_map0x0F_opcode0x7b_vv2_727_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1750)=729 */ {1750, xed3_phash_find_map0x0F_opcode0x7b_vv2_729_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5554)=731 */ {5554, xed3_phash_find_map0x0F_opcode0x7b_vv2_731_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1606)=733 */ {1606, xed3_phash_find_map0x0F_opcode0x7b_vv2_733_l1},
/*h(4800)=734 */ {4800, xed3_phash_find_map0x0F_opcode0x7b_vv2_734_l1},
/*h(5410)=735 */ {5410, xed3_phash_find_map0x0F_opcode0x7b_vv2_735_l1},
/*h(1839)=736 */ {1839, xed3_phash_find_map0x0F_opcode0x7b_vv2_736_l1},
/*h(4046)=737 */ {4046, xed3_phash_find_map0x0F_opcode0x7b_vv2_737_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6863)=739 */ {6863, xed3_phash_find_map0x0F_opcode0x7b_vv2_739_l1},
/*h(708)=740 */ {708, xed3_phash_find_map0x0F_opcode0x7b_vv2_740_l1},
/*h(1318)=741 */ {1318, xed3_phash_find_map0x0F_opcode0x7b_vv2_741_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5122)=743 */ {5122, xed3_phash_find_map0x0F_opcode0x7b_vv2_743_l1},
/*h(1551)=744 */ {1551, xed3_phash_find_map0x0F_opcode0x7b_vv2_744_l1},
/*h(1174)=745 */ {1174, xed3_phash_find_map0x0F_opcode0x7b_vv2_745_l1},
/*h(2771)=746 */ {2771, xed3_phash_find_map0x0F_opcode0x7b_vv2_746_l1},
/*h(7562)=747 */ {7562, xed3_phash_find_map0x0F_opcode0x7b_vv2_747_l1},
/*h(3991)=748 */ {3991, xed3_phash_find_map0x0F_opcode0x7b_vv2_748_l1},
/*h(1030)=749 */ {1030, xed3_phash_find_map0x0F_opcode0x7b_vv2_749_l1},
/*h(10989)=750 */ {10989, xed3_phash_find_map0x0F_opcode0x7b_vv2_750_l1},
/*h(4834)=751 */ {4834, xed3_phash_find_map0x0F_opcode0x7b_vv2_751_l1},
/*h(3847)=752 */ {3847, xed3_phash_find_map0x0F_opcode0x7b_vv2_752_l1},
/*h(6054)=753 */ {6054, xed3_phash_find_map0x0F_opcode0x7b_vv2_753_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7274)=755 */ {7274, xed3_phash_find_map0x0F_opcode0x7b_vv2_755_l1},
/*h(3703)=756 */ {3703, xed3_phash_find_map0x0F_opcode0x7b_vv2_756_l1},
/*h(5910)=757 */ {5910, xed3_phash_find_map0x0F_opcode0x7b_vv2_757_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1962)=759 */ {1962, xed3_phash_find_map0x0F_opcode0x7b_vv2_759_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5766)=761 */ {5766, xed3_phash_find_map0x0F_opcode0x7b_vv2_761_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2805)=763 */ {2805, xed3_phash_find_map0x0F_opcode0x7b_vv2_763_l1},
/*h(5999)=764 */ {5999, xed3_phash_find_map0x0F_opcode0x7b_vv2_764_l1},
/*h(5622)=765 */ {5622, xed3_phash_find_map0x0F_opcode0x7b_vv2_765_l1},
/*h(12997)=766 */ {12997, xed3_phash_find_map0x0F_opcode0x7b_vv2_766_l1},
/*h(1674)=767 */ {1674, xed3_phash_find_map0x0F_opcode0x7b_vv2_767_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5478)=769 */ {5478, xed3_phash_find_map0x0F_opcode0x7b_vv2_769_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5711)=772 */ {5711, xed3_phash_find_map0x0F_opcode0x7b_vv2_772_l1},
/*h(5334)=773 */ {5334, xed3_phash_find_map0x0F_opcode0x7b_vv2_773_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3970)=775 */ {3970, xed3_phash_find_map0x0F_opcode0x7b_vv2_775_l1},
/*h(1386)=776 */ {1386, xed3_phash_find_map0x0F_opcode0x7b_vv2_776_l1},
/*h(5190)=777 */ {5190, xed3_phash_find_map0x0F_opcode0x7b_vv2_777_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3826)=779 */ {3826, xed3_phash_find_map0x0F_opcode0x7b_vv2_779_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7630)=781 */ {7630, xed3_phash_find_map0x0F_opcode0x7b_vv2_781_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3682)=783 */ {3682, xed3_phash_find_map0x0F_opcode0x7b_vv2_783_l1},
/*h(7863)=784 */ {7863, xed3_phash_find_map0x0F_opcode0x7b_vv2_784_l1},
/*h(721)=785 */ {721, xed3_phash_find_map0x0F_opcode0x7b_vv2_785_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3538)=787 */ {3538, xed3_phash_find_map0x0F_opcode0x7b_vv2_787_l1},
/*h(7719)=788 */ {7719, xed3_phash_find_map0x0F_opcode0x7b_vv2_788_l1},
/*h(7342)=789 */ {7342, xed3_phash_find_map0x0F_opcode0x7b_vv2_789_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2784)=791 */ {2784, xed3_phash_find_map0x0F_opcode0x7b_vv2_791_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2030)=794 */ {2030, xed3_phash_find_map0x0F_opcode0x7b_vv2_794_l1},
/*h(5834)=795 */ {5834, xed3_phash_find_map0x0F_opcode0x7b_vv2_795_l1},
/*h(4847)=796 */ {4847, xed3_phash_find_map0x0F_opcode0x7b_vv2_796_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3106)=800 */ {3106, xed3_phash_find_map0x0F_opcode0x7b_vv2_800_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1742)=802 */ {1742, xed3_phash_find_map0x0F_opcode0x7b_vv2_802_l1},
/*h(8130)=803 */ {8130, xed3_phash_find_map0x0F_opcode0x7b_vv2_803_l1},
/*h(1975)=804 */ {1975, xed3_phash_find_map0x0F_opcode0x7b_vv2_804_l1},
/*h(10947)=805 */ {10947, xed3_phash_find_map0x0F_opcode0x7b_vv2_805_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7986)=807 */ {7986, xed3_phash_find_map0x0F_opcode0x7b_vv2_807_l1},
/*h(1831)=808 */ {1831, xed3_phash_find_map0x0F_opcode0x7b_vv2_808_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4038)=810 */ {4038, xed3_phash_find_map0x0F_opcode0x7b_vv2_810_l1},
/*h(7842)=811 */ {7842, xed3_phash_find_map0x0F_opcode0x7b_vv2_811_l1},
/*h(1687)=812 */ {1687, xed3_phash_find_map0x0F_opcode0x7b_vv2_812_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3894)=814 */ {3894, xed3_phash_find_map0x0F_opcode0x7b_vv2_814_l1},
/*h(7698)=815 */ {7698, xed3_phash_find_map0x0F_opcode0x7b_vv2_815_l1},
/*h(1543)=816 */ {1543, xed3_phash_find_map0x0F_opcode0x7b_vv2_816_l1},
/*h(8918)=817 */ {8918, xed3_phash_find_map0x0F_opcode0x7b_vv2_817_l1},
/*h(3750)=818 */ {3750, xed3_phash_find_map0x0F_opcode0x7b_vv2_818_l1},
/*h(7554)=819 */ {7554, xed3_phash_find_map0x0F_opcode0x7b_vv2_819_l1},
/*h(1399)=820 */ {1399, xed3_phash_find_map0x0F_opcode0x7b_vv2_820_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3606)=822 */ {3606, xed3_phash_find_map0x0F_opcode0x7b_vv2_822_l1},
/*h(7410)=823 */ {7410, xed3_phash_find_map0x0F_opcode0x7b_vv2_823_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3462)=826 */ {3462, xed3_phash_find_map0x0F_opcode0x7b_vv2_826_l1},
/*h(7266)=827 */ {7266, xed3_phash_find_map0x0F_opcode0x7b_vv2_827_l1},
/*h(3695)=828 */ {3695, xed3_phash_find_map0x0F_opcode0x7b_vv2_828_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5902)=830 */ {5902, xed3_phash_find_map0x0F_opcode0x7b_vv2_830_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1954)=832 */ {1954, xed3_phash_find_map0x0F_opcode0x7b_vv2_832_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3174)=834 */ {3174, xed3_phash_find_map0x0F_opcode0x7b_vv2_834_l1},
/*h(2797)=835 */ {2797, xed3_phash_find_map0x0F_opcode0x7b_vv2_835_l1},
/*h(5991)=836 */ {5991, xed3_phash_find_map0x0F_opcode0x7b_vv2_836_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5614)=838 */ {5614, xed3_phash_find_map0x0F_opcode0x7b_vv2_838_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1666)=840 */ {1666, xed3_phash_find_map0x0F_opcode0x7b_vv2_840_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8054)=842 */ {8054, xed3_phash_find_map0x0F_opcode0x7b_vv2_842_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5703)=844 */ {5703, xed3_phash_find_map0x0F_opcode0x7b_vv2_844_l1},
/*h(8897)=845 */ {8897, xed3_phash_find_map0x0F_opcode0x7b_vv2_845_l1},
/*h(7910)=846 */ {7910, xed3_phash_find_map0x0F_opcode0x7b_vv2_846_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5559)=848 */ {5559, xed3_phash_find_map0x0F_opcode0x7b_vv2_848_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7766)=850 */ {7766, xed3_phash_find_map0x0F_opcode0x7b_vv2_850_l1},
/*h(4805)=851 */ {4805, xed3_phash_find_map0x0F_opcode0x7b_vv2_851_l1},
/*h(3818)=852 */ {3818, xed3_phash_find_map0x0F_opcode0x7b_vv2_852_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7622)=854 */ {7622, xed3_phash_find_map0x0F_opcode0x7b_vv2_854_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7855)=856 */ {7855, xed3_phash_find_map0x0F_opcode0x7b_vv2_856_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7478)=858 */ {7478, xed3_phash_find_map0x0F_opcode0x7b_vv2_858_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6114)=860 */ {6114, xed3_phash_find_map0x0F_opcode0x7b_vv2_860_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8931)=862 */ {8931, xed3_phash_find_map0x0F_opcode0x7b_vv2_862_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5970)=864 */ {5970, xed3_phash_find_map0x0F_opcode0x7b_vv2_864_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2022)=866 */ {2022, xed3_phash_find_map0x0F_opcode0x7b_vv2_866_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3242)=868 */ {3242, xed3_phash_find_map0x0F_opcode0x7b_vv2_868_l1},
/*h(4839)=869 */ {4839, xed3_phash_find_map0x0F_opcode0x7b_vv2_869_l1},
/*h(1878)=870 */ {1878, xed3_phash_find_map0x0F_opcode0x7b_vv2_870_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5682)=872 */ {5682, xed3_phash_find_map0x0F_opcode0x7b_vv2_872_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1734)=874 */ {1734, xed3_phash_find_map0x0F_opcode0x7b_vv2_874_l1},
/*h(747)=875 */ {747, xed3_phash_find_map0x0F_opcode0x7b_vv2_875_l1},
/*h(5538)=876 */ {5538, xed3_phash_find_map0x0F_opcode0x7b_vv2_876_l1},
/*h(1967)=877 */ {1967, xed3_phash_find_map0x0F_opcode0x7b_vv2_877_l1},
/*h(1590)=878 */ {1590, xed3_phash_find_map0x0F_opcode0x7b_vv2_878_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7978)=880 */ {7978, xed3_phash_find_map0x0F_opcode0x7b_vv2_880_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1446)=883 */ {1446, xed3_phash_find_map0x0F_opcode0x7b_vv2_883_l1},
/*h(5250)=884 */ {5250, xed3_phash_find_map0x0F_opcode0x7b_vv2_884_l1},
/*h(1679)=885 */ {1679, xed3_phash_find_map0x0F_opcode0x7b_vv2_885_l1},
/*h(3886)=886 */ {3886, xed3_phash_find_map0x0F_opcode0x7b_vv2_886_l1},
/*h(1302)=887 */ {1302, xed3_phash_find_map0x0F_opcode0x7b_vv2_887_l1},
/*h(7690)=888 */ {7690, xed3_phash_find_map0x0F_opcode0x7b_vv2_888_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8910)=890 */ {8910, xed3_phash_find_map0x0F_opcode0x7b_vv2_890_l1},
/*h(1158)=891 */ {1158, xed3_phash_find_map0x0F_opcode0x7b_vv2_891_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3975)=893 */ {3975, xed3_phash_find_map0x0F_opcode0x7b_vv2_893_l1},
/*h(3598)=894 */ {3598, xed3_phash_find_map0x0F_opcode0x7b_vv2_894_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7402)=896 */ {7402, xed3_phash_find_map0x0F_opcode0x7b_vv2_896_l1},
/*h(3831)=897 */ {3831, xed3_phash_find_map0x0F_opcode0x7b_vv2_897_l1},
/*h(6038)=898 */ {6038, xed3_phash_find_map0x0F_opcode0x7b_vv2_898_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13036)=901 */ {13036, xed3_phash_find_map0x0F_opcode0x7b_vv2_901_l1},
/*h(5894)=902 */ {5894, xed3_phash_find_map0x0F_opcode0x7b_vv2_902_l1},
/*h(3310)=903 */ {3310, xed3_phash_find_map0x0F_opcode0x7b_vv2_903_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6127)=905 */ {6127, xed3_phash_find_map0x0F_opcode0x7b_vv2_905_l1},
/*h(5750)=906 */ {5750, xed3_phash_find_map0x0F_opcode0x7b_vv2_906_l1},
/*h(8944)=907 */ {8944, xed3_phash_find_map0x0F_opcode0x7b_vv2_907_l1},
/*h(2789)=908 */ {2789, xed3_phash_find_map0x0F_opcode0x7b_vv2_908_l1},
/*h(1802)=909 */ {1802, xed3_phash_find_map0x0F_opcode0x7b_vv2_909_l1},
/*h(5606)=910 */ {5606, xed3_phash_find_map0x0F_opcode0x7b_vv2_910_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3255)=913 */ {3255, xed3_phash_find_map0x0F_opcode0x7b_vv2_913_l1},
/*h(8046)=914 */ {8046, xed3_phash_find_map0x0F_opcode0x7b_vv2_914_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1514)=917 */ {1514, xed3_phash_find_map0x0F_opcode0x7b_vv2_917_l1},
/*h(5318)=918 */ {5318, xed3_phash_find_map0x0F_opcode0x7b_vv2_918_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8135)=921 */ {8135, xed3_phash_find_map0x0F_opcode0x7b_vv2_921_l1},
/*h(7758)=922 */ {7758, xed3_phash_find_map0x0F_opcode0x7b_vv2_922_l1},
/*h(10952)=923 */ {10952, xed3_phash_find_map0x0F_opcode0x7b_vv2_923_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7991)=925 */ {7991, xed3_phash_find_map0x0F_opcode0x7b_vv2_925_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13015)=928 */ {13015, xed3_phash_find_map0x0F_opcode0x7b_vv2_928_l1},
/*h(7847)=929 */ {7847, xed3_phash_find_map0x0F_opcode0x7b_vv2_929_l1},
/*h(7470)=930 */ {7470, xed3_phash_find_map0x0F_opcode0x7b_vv2_930_l1},
/*h(705)=931 */ {705, xed3_phash_find_map0x0F_opcode0x7b_vv2_931_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7703)=933 */ {7703, xed3_phash_find_map0x0F_opcode0x7b_vv2_933_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2768)=936 */ {2768, xed3_phash_find_map0x0F_opcode0x7b_vv2_936_l1},
/*h(3378)=937 */ {3378, xed3_phash_find_map0x0F_opcode0x7b_vv2_937_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7182)=939 */ {7182, xed3_phash_find_map0x0F_opcode0x7b_vv2_939_l1},
/*h(10986)=940 */ {10986, xed3_phash_find_map0x0F_opcode0x7b_vv2_940_l1},
/*h(7415)=941 */ {7415, xed3_phash_find_map0x0F_opcode0x7b_vv2_941_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1870)=943 */ {1870, xed3_phash_find_map0x0F_opcode0x7b_vv2_943_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5674)=945 */ {5674, xed3_phash_find_map0x0F_opcode0x7b_vv2_945_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(739)=948 */ {739, xed3_phash_find_map0x0F_opcode0x7b_vv2_948_l1},
/*h(8114)=949 */ {8114, xed3_phash_find_map0x0F_opcode0x7b_vv2_949_l1},
/*h(1959)=950 */ {1959, xed3_phash_find_map0x0F_opcode0x7b_vv2_950_l1},
/*h(1582)=951 */ {1582, xed3_phash_find_map0x0F_opcode0x7b_vv2_951_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5386)=953 */ {5386, xed3_phash_find_map0x0F_opcode0x7b_vv2_953_l1},
/*h(1815)=954 */ {1815, xed3_phash_find_map0x0F_opcode0x7b_vv2_954_l1},
/*h(4022)=955 */ {4022, xed3_phash_find_map0x0F_opcode0x7b_vv2_955_l1},
/*h(12994)=956 */ {12994, xed3_phash_find_map0x0F_opcode0x7b_vv2_956_l1},
/*h(7826)=957 */ {7826, xed3_phash_find_map0x0F_opcode0x7b_vv2_957_l1},
/*h(1671)=958 */ {1671, xed3_phash_find_map0x0F_opcode0x7b_vv2_958_l1},
/*h(1294)=959 */ {1294, xed3_phash_find_map0x0F_opcode0x7b_vv2_959_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7682)=961 */ {7682, xed3_phash_find_map0x0F_opcode0x7b_vv2_961_l1},
/*h(1527)=962 */ {1527, xed3_phash_find_map0x0F_opcode0x7b_vv2_962_l1},
/*h(3734)=963 */ {3734, xed3_phash_find_map0x0F_opcode0x7b_vv2_963_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7538)=965 */ {7538, xed3_phash_find_map0x0F_opcode0x7b_vv2_965_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3590)=967 */ {3590, xed3_phash_find_map0x0F_opcode0x7b_vv2_967_l1},
/*h(10965)=968 */ {10965, xed3_phash_find_map0x0F_opcode0x7b_vv2_968_l1},
/*h(7394)=969 */ {7394, xed3_phash_find_map0x0F_opcode0x7b_vv2_969_l1},
/*h(3823)=970 */ {3823, xed3_phash_find_map0x0F_opcode0x7b_vv2_970_l1},
/*h(6030)=971 */ {6030, xed3_phash_find_map0x0F_opcode0x7b_vv2_971_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7250)=973 */ {7250, xed3_phash_find_map0x0F_opcode0x7b_vv2_973_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3302)=975 */ {3302, xed3_phash_find_map0x0F_opcode0x7b_vv2_975_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1938)=977 */ {1938, xed3_phash_find_map0x0F_opcode0x7b_vv2_977_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5742)=979 */ {5742, xed3_phash_find_map0x0F_opcode0x7b_vv2_979_l1},
/*h(8936)=980 */ {8936, xed3_phash_find_map0x0F_opcode0x7b_vv2_980_l1},
/*h(1794)=981 */ {1794, xed3_phash_find_map0x0F_opcode0x7b_vv2_981_l1},
/*h(5975)=982 */ {5975, xed3_phash_find_map0x0F_opcode0x7b_vv2_982_l1},
/*h(8182)=983 */ {8182, xed3_phash_find_map0x0F_opcode0x7b_vv2_983_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1650)=985 */ {1650, xed3_phash_find_map0x0F_opcode0x7b_vv2_985_l1},
/*h(5831)=986 */ {5831, xed3_phash_find_map0x0F_opcode0x7b_vv2_986_l1},
/*h(8038)=987 */ {8038, xed3_phash_find_map0x0F_opcode0x7b_vv2_987_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1506)=989 */ {1506, xed3_phash_find_map0x0F_opcode0x7b_vv2_989_l1},
/*h(5687)=990 */ {5687, xed3_phash_find_map0x0F_opcode0x7b_vv2_990_l1},
/*h(7894)=991 */ {7894, xed3_phash_find_map0x0F_opcode0x7b_vv2_991_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3946)=993 */ {3946, xed3_phash_find_map0x0F_opcode0x7b_vv2_993_l1},
/*h(1362)=994 */ {1362, xed3_phash_find_map0x0F_opcode0x7b_vv2_994_l1},
/*h(7750)=995 */ {7750, xed3_phash_find_map0x0F_opcode0x7b_vv2_995_l1},
/*h(10944)=996 */ {10944, xed3_phash_find_map0x0F_opcode0x7b_vv2_996_l1},
/*h(7983)=997 */ {7983, xed3_phash_find_map0x0F_opcode0x7b_vv2_997_l1},
/*h(1218)=998 */ {1218, xed3_phash_find_map0x0F_opcode0x7b_vv2_998_l1},
/*h(7606)=999 */ {7606, xed3_phash_find_map0x0F_opcode0x7b_vv2_999_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3658)=1001 */ {3658, xed3_phash_find_map0x0F_opcode0x7b_vv2_1001_l1},
/*h(1074)=1002 */ {1074, xed3_phash_find_map0x0F_opcode0x7b_vv2_1002_l1},
/*h(7462)=1003 */ {7462, xed3_phash_find_map0x0F_opcode0x7b_vv2_1003_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6098)=1005 */ {6098, xed3_phash_find_map0x0F_opcode0x7b_vv2_1005_l1},
/*h(7695)=1006 */ {7695, xed3_phash_find_map0x0F_opcode0x7b_vv2_1006_l1},
/*h(7318)=1007 */ {7318, xed3_phash_find_map0x0F_opcode0x7b_vv2_1007_l1},
/*h(8915)=1008 */ {8915, xed3_phash_find_map0x0F_opcode0x7b_vv2_1008_l1},
/*h(2760)=1009 */ {2760, xed3_phash_find_map0x0F_opcode0x7b_vv2_1009_l1},
/*h(3370)=1010 */ {3370, xed3_phash_find_map0x0F_opcode0x7b_vv2_1010_l1},
/*h(7174)=1011 */ {7174, xed3_phash_find_map0x0F_opcode0x7b_vv2_1011_l1},
/*h(2006)=1012 */ {2006, xed3_phash_find_map0x0F_opcode0x7b_vv2_1012_l1},
/*h(5810)=1013 */ {5810, xed3_phash_find_map0x0F_opcode0x7b_vv2_1013_l1},
/*h(4823)=1014 */ {4823, xed3_phash_find_map0x0F_opcode0x7b_vv2_1014_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1862)=1016 */ {1862, xed3_phash_find_map0x0F_opcode0x7b_vv2_1016_l1},
/*h(5666)=1017 */ {5666, xed3_phash_find_map0x0F_opcode0x7b_vv2_1017_l1},
/*h(13041)=1018 */ {13041, xed3_phash_find_map0x0F_opcode0x7b_vv2_1018_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1718)=1020 */ {1718, xed3_phash_find_map0x0F_opcode0x7b_vv2_1020_l1},
/*h(8106)=1021 */ {8106, xed3_phash_find_map0x0F_opcode0x7b_vv2_1021_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1574)=1024 */ {1574, xed3_phash_find_map0x0F_opcode0x7b_vv2_1024_l1},
/*h(5378)=1025 */ {5378, xed3_phash_find_map0x0F_opcode0x7b_vv2_1025_l1},
/*h(2794)=1026 */ {2794, xed3_phash_find_map0x0F_opcode0x7b_vv2_1026_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4014)=1028 */ {4014, xed3_phash_find_map0x0F_opcode0x7b_vv2_1028_l1},
/*h(7818)=1029 */ {7818, xed3_phash_find_map0x0F_opcode0x7b_vv2_1029_l1},
/*h(5234)=1030 */ {5234, xed3_phash_find_map0x0F_opcode0x7b_vv2_1030_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1286)=1032 */ {1286, xed3_phash_find_map0x0F_opcode0x7b_vv2_1032_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3726)=1036 */ {3726, xed3_phash_find_map0x0F_opcode0x7b_vv2_1036_l1},
/*h(7530)=1037 */ {7530, xed3_phash_find_map0x0F_opcode0x7b_vv2_1037_l1},
/*h(3959)=1038 */ {3959, xed3_phash_find_map0x0F_opcode0x7b_vv2_1038_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10957)=1041 */ {10957, xed3_phash_find_map0x0F_opcode0x7b_vv2_1041_l1},
/*h(3815)=1042 */ {3815, xed3_phash_find_map0x0F_opcode0x7b_vv2_1042_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6022)=1044 */ {6022, xed3_phash_find_map0x0F_opcode0x7b_vv2_1044_l1},
/*h(7242)=1045 */ {7242, xed3_phash_find_map0x0F_opcode0x7b_vv2_1045_l1},
/*h(3671)=1046 */ {3671, xed3_phash_find_map0x0F_opcode0x7b_vv2_1046_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5878)=1048 */ {5878, xed3_phash_find_map0x0F_opcode0x7b_vv2_1048_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1930)=1050 */ {1930, xed3_phash_find_map0x0F_opcode0x7b_vv2_1050_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8928)=1052 */ {8928, xed3_phash_find_map0x0F_opcode0x7b_vv2_1052_l1},
/*h(2773)=1053 */ {2773, xed3_phash_find_map0x0F_opcode0x7b_vv2_1053_l1},
/*h(3383)=1054 */ {3383, xed3_phash_find_map0x0F_opcode0x7b_vv2_1054_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8174)=1056 */ {8174, xed3_phash_find_map0x0F_opcode0x7b_vv2_1056_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1642)=1058 */ {1642, xed3_phash_find_map0x0F_opcode0x7b_vv2_1058_l1},
/*h(4836)=1059 */ {4836, xed3_phash_find_map0x0F_opcode0x7b_vv2_1059_l1},
/*h(5446)=1060 */ {5446, xed3_phash_find_map0x0F_opcode0x7b_vv2_1060_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4082)=1062 */ {4082, xed3_phash_find_map0x0F_opcode0x7b_vv2_1062_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7886)=1064 */ {7886, xed3_phash_find_map0x0F_opcode0x7b_vv2_1064_l1},
/*h(744)=1065 */ {744, xed3_phash_find_map0x0F_opcode0x7b_vv2_1065_l1},
/*h(1354)=1066 */ {1354, xed3_phash_find_map0x0F_opcode0x7b_vv2_1066_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5158)=1068 */ {5158, xed3_phash_find_map0x0F_opcode0x7b_vv2_1068_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3794)=1070 */ {3794, xed3_phash_find_map0x0F_opcode0x7b_vv2_1070_l1},
/*h(2807)=1071 */ {2807, xed3_phash_find_map0x0F_opcode0x7b_vv2_1071_l1},
/*h(7598)=1072 */ {7598, xed3_phash_find_map0x0F_opcode0x7b_vv2_1072_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7831)=1074 */ {7831, xed3_phash_find_map0x0F_opcode0x7b_vv2_1074_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7687)=1078 */ {7687, xed3_phash_find_map0x0F_opcode0x7b_vv2_1078_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7310)=1080 */ {7310, xed3_phash_find_map0x0F_opcode0x7b_vv2_1080_l1},
/*h(2752)=1081 */ {2752, xed3_phash_find_map0x0F_opcode0x7b_vv2_1081_l1},
/*h(7543)=1082 */ {7543, xed3_phash_find_map0x0F_opcode0x7b_vv2_1082_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1998)=1084 */ {1998, xed3_phash_find_map0x0F_opcode0x7b_vv2_1084_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3218)=1086 */ {3218, xed3_phash_find_map0x0F_opcode0x7b_vv2_1086_l1},
/*h(4815)=1087 */ {4815, xed3_phash_find_map0x0F_opcode0x7b_vv2_1087_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3074)=1090 */ {3074, xed3_phash_find_map0x0F_opcode0x7b_vv2_1090_l1},
/*h(13033)=1091 */ {13033, xed3_phash_find_map0x0F_opcode0x7b_vv2_1091_l1},
/*h(1710)=1092 */ {1710, xed3_phash_find_map0x0F_opcode0x7b_vv2_1092_l1},
/*h(723)=1093 */ {723, xed3_phash_find_map0x0F_opcode0x7b_vv2_1093_l1},
/*h(8098)=1094 */ {8098, xed3_phash_find_map0x0F_opcode0x7b_vv2_1094_l1},
/*h(1943)=1095 */ {1943, xed3_phash_find_map0x0F_opcode0x7b_vv2_1095_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8941)=1097 */ {8941, xed3_phash_find_map0x0F_opcode0x7b_vv2_1097_l1},
/*h(2786)=1098 */ {2786, xed3_phash_find_map0x0F_opcode0x7b_vv2_1098_l1},
/*h(1799)=1099 */ {1799, xed3_phash_find_map0x0F_opcode0x7b_vv2_1099_l1},
/*h(4006)=1100 */ {4006, xed3_phash_find_map0x0F_opcode0x7b_vv2_1100_l1},
/*h(1422)=1101 */ {1422, xed3_phash_find_map0x0F_opcode0x7b_vv2_1101_l1},
/*h(5226)=1102 */ {5226, xed3_phash_find_map0x0F_opcode0x7b_vv2_1102_l1},
/*h(1655)=1103 */ {1655, xed3_phash_find_map0x0F_opcode0x7b_vv2_1103_l1},
/*h(4849)=1104 */ {4849, xed3_phash_find_map0x0F_opcode0x7b_vv2_1104_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7666)=1106 */ {7666, xed3_phash_find_map0x0F_opcode0x7b_vv2_1106_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3718)=1108 */ {3718, xed3_phash_find_map0x0F_opcode0x7b_vv2_1108_l1},
/*h(1134)=1109 */ {1134, xed3_phash_find_map0x0F_opcode0x7b_vv2_1109_l1},
/*h(757)=1110 */ {757, xed3_phash_find_map0x0F_opcode0x7b_vv2_1110_l1},
/*h(3951)=1111 */ {3951, xed3_phash_find_map0x0F_opcode0x7b_vv2_1111_l1},
/*h(3574)=1112 */ {3574, xed3_phash_find_map0x0F_opcode0x7b_vv2_1112_l1},
/*h(10949)=1113 */ {10949, xed3_phash_find_map0x0F_opcode0x7b_vv2_1113_l1},
/*h(7378)=1114 */ {7378, xed3_phash_find_map0x0F_opcode0x7b_vv2_1114_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3430)=1116 */ {3430, xed3_phash_find_map0x0F_opcode0x7b_vv2_1116_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7234)=1118 */ {7234, xed3_phash_find_map0x0F_opcode0x7b_vv2_1118_l1},
/*h(1079)=1119 */ {1079, xed3_phash_find_map0x0F_opcode0x7b_vv2_1119_l1},
/*h(5870)=1120 */ {5870, xed3_phash_find_map0x0F_opcode0x7b_vv2_1120_l1},
/*h(3286)=1121 */ {3286, xed3_phash_find_map0x0F_opcode0x7b_vv2_1121_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6103)=1123 */ {6103, xed3_phash_find_map0x0F_opcode0x7b_vv2_1123_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3142)=1125 */ {3142, xed3_phash_find_map0x0F_opcode0x7b_vv2_1125_l1},
/*h(2765)=1126 */ {2765, xed3_phash_find_map0x0F_opcode0x7b_vv2_1126_l1},
/*h(5959)=1127 */ {5959, xed3_phash_find_map0x0F_opcode0x7b_vv2_1127_l1},
/*h(5582)=1128 */ {5582, xed3_phash_find_map0x0F_opcode0x7b_vv2_1128_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10983)=1130 */ {10983, xed3_phash_find_map0x0F_opcode0x7b_vv2_1130_l1},
/*h(5815)=1131 */ {5815, xed3_phash_find_map0x0F_opcode0x7b_vv2_1131_l1},
/*h(8022)=1132 */ {8022, xed3_phash_find_map0x0F_opcode0x7b_vv2_1132_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4074)=1135 */ {4074, xed3_phash_find_map0x0F_opcode0x7b_vv2_1135_l1},
/*h(7878)=1136 */ {7878, xed3_phash_find_map0x0F_opcode0x7b_vv2_1136_l1},
/*h(5294)=1137 */ {5294, xed3_phash_find_map0x0F_opcode0x7b_vv2_1137_l1},
/*h(736)=1138 */ {736, xed3_phash_find_map0x0F_opcode0x7b_vv2_1138_l1},
/*h(1346)=1139 */ {1346, xed3_phash_find_map0x0F_opcode0x7b_vv2_1139_l1},
/*h(7734)=1140 */ {7734, xed3_phash_find_map0x0F_opcode0x7b_vv2_1140_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1202)=1143 */ {1202, xed3_phash_find_map0x0F_opcode0x7b_vv2_1143_l1},
/*h(7590)=1144 */ {7590, xed3_phash_find_map0x0F_opcode0x7b_vv2_1144_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5239)=1147 */ {5239, xed3_phash_find_map0x0F_opcode0x7b_vv2_1147_l1},
/*h(7446)=1148 */ {7446, xed3_phash_find_map0x0F_opcode0x7b_vv2_1148_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6082)=1151 */ {6082, xed3_phash_find_map0x0F_opcode0x7b_vv2_1151_l1},
/*h(7302)=1152 */ {7302, xed3_phash_find_map0x0F_opcode0x7b_vv2_1152_l1},
/*h(8899)=1153 */ {8899, xed3_phash_find_map0x0F_opcode0x7b_vv2_1153_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5938)=1155 */ {5938, xed3_phash_find_map0x0F_opcode0x7b_vv2_1155_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1990)=1157 */ {1990, xed3_phash_find_map0x0F_opcode0x7b_vv2_1157_l1},
/*h(10962)=1158 */ {10962, xed3_phash_find_map0x0F_opcode0x7b_vv2_1158_l1},
/*h(5794)=1159 */ {5794, xed3_phash_find_map0x0F_opcode0x7b_vv2_1159_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1846)=1161 */ {1846, xed3_phash_find_map0x0F_opcode0x7b_vv2_1161_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5650)=1163 */ {5650, xed3_phash_find_map0x0F_opcode0x7b_vv2_1163_l1},
/*h(13025)=1164 */ {13025, xed3_phash_find_map0x0F_opcode0x7b_vv2_1164_l1},
/*h(1702)=1165 */ {1702, xed3_phash_find_map0x0F_opcode0x7b_vv2_1165_l1},
/*h(715)=1166 */ {715, xed3_phash_find_map0x0F_opcode0x7b_vv2_1166_l1},
/*h(5506)=1167 */ {5506, xed3_phash_find_map0x0F_opcode0x7b_vv2_1167_l1},
/*h(1935)=1168 */ {1935, xed3_phash_find_map0x0F_opcode0x7b_vv2_1168_l1},
/*h(1558)=1169 */ {1558, xed3_phash_find_map0x0F_opcode0x7b_vv2_1169_l1},
/*h(8933)=1170 */ {8933, xed3_phash_find_map0x0F_opcode0x7b_vv2_1170_l1},
/*h(5362)=1171 */ {5362, xed3_phash_find_map0x0F_opcode0x7b_vv2_1171_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1414)=1173 */ {1414, xed3_phash_find_map0x0F_opcode0x7b_vv2_1173_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5218)=1175 */ {5218, xed3_phash_find_map0x0F_opcode0x7b_vv2_1175_l1},
/*h(4841)=1176 */ {4841, xed3_phash_find_map0x0F_opcode0x7b_vv2_1176_l1},
/*h(1270)=1177 */ {1270, xed3_phash_find_map0x0F_opcode0x7b_vv2_1177_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7658)=1179 */ {7658, xed3_phash_find_map0x0F_opcode0x7b_vv2_1179_l1},
/*h(4087)=1180 */ {4087, xed3_phash_find_map0x0F_opcode0x7b_vv2_1180_l1},
/*h(1126)=1181 */ {1126, xed3_phash_find_map0x0F_opcode0x7b_vv2_1181_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(749)=1183 */ {749, xed3_phash_find_map0x0F_opcode0x7b_vv2_1183_l1},
/*h(3943)=1184 */ {3943, xed3_phash_find_map0x0F_opcode0x7b_vv2_1184_l1},
/*h(3566)=1185 */ {3566, xed3_phash_find_map0x0F_opcode0x7b_vv2_1185_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7370)=1187 */ {7370, xed3_phash_find_map0x0F_opcode0x7b_vv2_1187_l1},
/*h(3799)=1188 */ {3799, xed3_phash_find_map0x0F_opcode0x7b_vv2_1188_l1},
/*h(6006)=1189 */ {6006, xed3_phash_find_map0x0F_opcode0x7b_vv2_1189_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(13004)=1191 */ {13004, xed3_phash_find_map0x0F_opcode0x7b_vv2_1191_l1},
/*h(3655)=1192 */ {3655, xed3_phash_find_map0x0F_opcode0x7b_vv2_1192_l1},
/*h(5862)=1193 */ {5862, xed3_phash_find_map0x0F_opcode0x7b_vv2_1193_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6095)=1195 */ {6095, xed3_phash_find_map0x0F_opcode0x7b_vv2_1195_l1},
/*h(3511)=1196 */ {3511, xed3_phash_find_map0x0F_opcode0x7b_vv2_1196_l1},
/*h(5718)=1197 */ {5718, xed3_phash_find_map0x0F_opcode0x7b_vv2_1197_l1},
/*h(8912)=1198 */ {8912, xed3_phash_find_map0x0F_opcode0x7b_vv2_1198_l1},
/*h(1770)=1199 */ {1770, xed3_phash_find_map0x0F_opcode0x7b_vv2_1199_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5574)=1201 */ {5574, xed3_phash_find_map0x0F_opcode0x7b_vv2_1201_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5807)=1204 */ {5807, xed3_phash_find_map0x0F_opcode0x7b_vv2_1204_l1},
/*h(8014)=1205 */ {8014, xed3_phash_find_map0x0F_opcode0x7b_vv2_1205_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(4066)=1207 */ {4066, xed3_phash_find_map0x0F_opcode0x7b_vv2_1207_l1},
/*h(13038)=1208 */ {13038, xed3_phash_find_map0x0F_opcode0x7b_vv2_1208_l1},
/*h(5286)=1209 */ {5286, xed3_phash_find_map0x0F_opcode0x7b_vv2_1209_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3922)=1211 */ {3922, xed3_phash_find_map0x0F_opcode0x7b_vv2_1211_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7726)=1213 */ {7726, xed3_phash_find_map0x0F_opcode0x7b_vv2_1213_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3778)=1215 */ {3778, xed3_phash_find_map0x0F_opcode0x7b_vv2_1215_l1},
/*h(2791)=1216 */ {2791, xed3_phash_find_map0x0F_opcode0x7b_vv2_1216_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3634)=1219 */ {3634, xed3_phash_find_map0x0F_opcode0x7b_vv2_1219_l1},
/*h(7815)=1220 */ {7815, xed3_phash_find_map0x0F_opcode0x7b_vv2_1220_l1},
/*h(4854)=1221 */ {4854, xed3_phash_find_map0x0F_opcode0x7b_vv2_1221_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3490)=1223 */ {3490, xed3_phash_find_map0x0F_opcode0x7b_vv2_1223_l1},
/*h(7671)=1224 */ {7671, xed3_phash_find_map0x0F_opcode0x7b_vv2_1224_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5930)=1227 */ {5930, xed3_phash_find_map0x0F_opcode0x7b_vv2_1227_l1},
/*h(3346)=1228 */ {3346, xed3_phash_find_map0x0F_opcode0x7b_vv2_1228_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(10954)=1231 */ {10954, xed3_phash_find_map0x0F_opcode0x7b_vv2_1231_l1},
/*h(3202)=1232 */ {3202, xed3_phash_find_map0x0F_opcode0x7b_vv2_1232_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1838)=1234 */ {1838, xed3_phash_find_map0x0F_opcode0x7b_vv2_1234_l1},
/*h(5642)=1235 */ {5642, xed3_phash_find_map0x0F_opcode0x7b_vv2_1235_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(707)=1238 */ {707, xed3_phash_find_map0x0F_opcode0x7b_vv2_1238_l1},
/*h(8082)=1239 */ {8082, xed3_phash_find_map0x0F_opcode0x7b_vv2_1239_l1},
/*h(1927)=1240 */ {1927, xed3_phash_find_map0x0F_opcode0x7b_vv2_1240_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1550)=1242 */ {1550, xed3_phash_find_map0x0F_opcode0x7b_vv2_1242_l1},
/*h(5354)=1243 */ {5354, xed3_phash_find_map0x0F_opcode0x7b_vv2_1243_l1},
/*h(2770)=1244 */ {2770, xed3_phash_find_map0x0F_opcode0x7b_vv2_1244_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3990)=1246 */ {3990, xed3_phash_find_map0x0F_opcode0x7b_vv2_1246_l1},
/*h(7794)=1247 */ {7794, xed3_phash_find_map0x0F_opcode0x7b_vv2_1247_l1},
/*h(1639)=1248 */ {1639, xed3_phash_find_map0x0F_opcode0x7b_vv2_1248_l1},
/*h(4833)=1249 */ {4833, xed3_phash_find_map0x0F_opcode0x7b_vv2_1249_l1},
/*h(1262)=1250 */ {1262, xed3_phash_find_map0x0F_opcode0x7b_vv2_1250_l1},
/*h(7650)=1251 */ {7650, xed3_phash_find_map0x0F_opcode0x7b_vv2_1251_l1},
/*h(4079)=1252 */ {4079, xed3_phash_find_map0x0F_opcode0x7b_vv2_1252_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3702)=1254 */ {3702, xed3_phash_find_map0x0F_opcode0x7b_vv2_1254_l1},
/*h(741)=1255 */ {741, xed3_phash_find_map0x0F_opcode0x7b_vv2_1255_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3558)=1258 */ {3558, xed3_phash_find_map0x0F_opcode0x7b_vv2_1258_l1},
/*h(7362)=1259 */ {7362, xed3_phash_find_map0x0F_opcode0x7b_vv2_1259_l1},
/*h(3791)=1260 */ {3791, xed3_phash_find_map0x0F_opcode0x7b_vv2_1260_l1},
/*h(2804)=1261 */ {2804, xed3_phash_find_map0x0F_opcode0x7b_vv2_1261_l1},
/*h(5998)=1262 */ {5998, xed3_phash_find_map0x0F_opcode0x7b_vv2_1262_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7218)=1264 */ {7218, xed3_phash_find_map0x0F_opcode0x7b_vv2_1264_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3270)=1266 */ {3270, xed3_phash_find_map0x0F_opcode0x7b_vv2_1266_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1906)=1268 */ {1906, xed3_phash_find_map0x0F_opcode0x7b_vv2_1268_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5710)=1270 */ {5710, xed3_phash_find_map0x0F_opcode0x7b_vv2_1270_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1762)=1272 */ {1762, xed3_phash_find_map0x0F_opcode0x7b_vv2_1272_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(8150)=1274 */ {8150, xed3_phash_find_map0x0F_opcode0x7b_vv2_1274_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5799)=1276 */ {5799, xed3_phash_find_map0x0F_opcode0x7b_vv2_1276_l1},
/*h(4812)=1277 */ {4812, xed3_phash_find_map0x0F_opcode0x7b_vv2_1277_l1},
/*h(5422)=1278 */ {5422, xed3_phash_find_map0x0F_opcode0x7b_vv2_1278_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(5655)=1280 */ {5655, xed3_phash_find_map0x0F_opcode0x7b_vv2_1280_l1},
/*h(13030)=1281 */ {13030, xed3_phash_find_map0x0F_opcode0x7b_vv2_1281_l1},
/*h(7862)=1282 */ {7862, xed3_phash_find_map0x0F_opcode0x7b_vv2_1282_l1},
/*h(720)=1283 */ {720, xed3_phash_find_map0x0F_opcode0x7b_vv2_1283_l1},
/*h(3914)=1284 */ {3914, xed3_phash_find_map0x0F_opcode0x7b_vv2_1284_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7718)=1286 */ {7718, xed3_phash_find_map0x0F_opcode0x7b_vv2_1286_l1},
/*h(15093)=1287 */ {15093, xed3_phash_find_map0x0F_opcode0x7b_vv2_1287_l1},
/*h(7951)=1288 */ {7951, xed3_phash_find_map0x0F_opcode0x7b_vv2_1288_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7574)=1290 */ {7574, xed3_phash_find_map0x0F_opcode0x7b_vv2_1290_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3626)=1292 */ {3626, xed3_phash_find_map0x0F_opcode0x7b_vv2_1292_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7430)=1294 */ {7430, xed3_phash_find_map0x0F_opcode0x7b_vv2_1294_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(6066)=1296 */ {6066, xed3_phash_find_map0x0F_opcode0x7b_vv2_1296_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(7286)=1298 */ {7286, xed3_phash_find_map0x0F_opcode0x7b_vv2_1298_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3338)=1300 */ {3338, xed3_phash_find_map0x0F_opcode0x7b_vv2_1300_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1974)=1302 */ {1974, xed3_phash_find_map0x0F_opcode0x7b_vv2_1302_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 1304ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(754)=0 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  mode64  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_GPR_WRITER_STORE()*/ {754, 3907},
/*h(706)=1 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {706, 3918},
/*h(1778)=2 EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {1778, 3909},
/*h(758)=3 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  mode64  NOEVSR  ZEROING=0 MASK=0*/ {758, 3906},
/*h(710)=4 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {710, 3916},
/*h(1782)=5 EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1  NOEVSR  ZEROING=0 MASK=0*/ {1782, 3908},
/*h(738)=6 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {738, 3918},
/*h(714)=7 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {714, 3918},
/*h(1762)=8 EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {1762, 3909},
/*h(742)=9 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {742, 3916},
/*h(718)=10 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {718, 3916},
/*h(1766)=11 EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1  NOEVSR  ZEROING=0 MASK=0*/ {1766, 3908},
/*h(746)=12 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {746, 3918},
/*h(722)=13 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  mode64 W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {722, 3919},
/*h(1770)=14 EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {1770, 3909},
/*h(750)=15 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0*/ {750, 3916},
/*h(726)=16 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  mode64 W0  NOEVSR  ZEROING=0 MASK=0*/ {726, 3917},
/*h(1774)=17 EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1  NOEVSR  ZEROING=0 MASK=0*/ {1774, 3908}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((19*key % 73) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0x7f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[108] = {
/*h(1370)=0 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 6543},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(412)=4 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {412, 5843},
/*empty slot1 */ {0,0},
/*h(344)=6 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {344, 6544},
/*h(474)=7 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4246},
/*empty slot1 */ {0,0},
/*h(1502)=9 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1502, 5980},
/*empty slot1 */ {0,0},
/*h(1434)=11 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1434, 5129},
/*h(414)=12 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {414, 5842},
/*empty slot1 */ {0,0},
/*h(346)=14 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6543},
/*h(476)=15 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {476, 5981},
/*h(1374)=16 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1374, 6009},
/*h(408)=17 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {408, 5130},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(348)=22 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 6010},
/*h(478)=23 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {478, 5980},
/*empty slot1 */ {0,0},
/*h(410)=25 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {410, 5129},
/*empty slot1 */ {0,0},
/*h(1438)=27 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1438, 5842},
/*empty slot1 */ {0,0},
/*h(1754)=29 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4238},
/*h(350)=30 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 6009},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(728)=35 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {728, 4239},
/*h(1242)=36 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4242},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=42 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {216, 4243},
/*h(730)=43 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4238},
/*empty slot1 */ {0,0},
/*h(1758)=45 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1758, 5972},
/*empty slot1 */ {0,0},
/*h(1690)=47 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1690, 5133},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(218)=50 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4242},
/*h(732)=51 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {732, 5973},
/*h(1246)=52 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1246, 5976},
/*h(664)=53 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {664, 5134},
/*h(1178)=54 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1178, 5125},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(220)=58 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {220, 5977},
/*h(734)=59 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {734, 5972},
/*h(152)=60 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {152, 5126},
/*h(666)=61 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {666, 5133},
/*empty slot1 */ {0,0},
/*h(1694)=63 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1694, 5846},
/*empty slot1 */ {0,0},
/*h(1626)=65 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 6535},
/*h(222)=66 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {222, 5976},
/*empty slot1 */ {0,0},
/*h(154)=68 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {154, 5125},
/*h(668)=69 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {668, 5847},
/*h(1182)=70 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1182, 5838},
/*h(600)=71 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {600, 6536},
/*h(1114)=72 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 6539},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(156)=76 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {156, 5839},
/*h(670)=77 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {670, 5846},
/*h(88)=78 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {88, 6540},
/*h(602)=79 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6535},
/*empty slot1 */ {0,0},
/*h(1630)=81 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1630, 6001},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(158)=84 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {158, 5838},
/*empty slot1 */ {0,0},
/*h(90)=86 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6539},
/*h(604)=87 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 6002},
/*h(1118)=88 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1118, 6005},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=94 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 6006},
/*h(606)=95 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 6001},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1498)=101 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4246},
/*h(94)=102 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 6005},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(472)=107 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {472, 4247}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 137) % 108);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc2_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[100] = {
/*h(0)=0 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {0, 5301},
/*h(46)=1 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0 UIMM8()*/ {46, 5309},
/*h(54)=2 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1    ZEROING=0 UIMM8()*/ {54, 4629},
/*h(24)=3 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4612},
/*h(32)=4 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {32, 5303},
/*h(78)=5 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0 UIMM8()*/ {78, 5304},
/*h(86)=6 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1    ZEROING=0 UIMM8()*/ {86, 4629},
/*h(56)=7 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4612},
/*h(64)=8 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {64, 5299},
/*empty slot1 */ {0,0},
/*h(118)=10 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1    ZEROING=0 UIMM8()*/ {118, 4629},
/*h(88)=11 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4612},
/*empty slot1 */ {0,0},
/*h(15)=13 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1    ZEROING=0 UIMM8()*/ {15, 5305},
/*h(23)=14 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1    ZEROING=0 UIMM8()*/ {23, 4630},
/*h(120)=15 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4612},
/*h(1)=16 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {1, 5301},
/*h(47)=17 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1    ZEROING=0 UIMM8()*/ {47, 5305},
/*h(55)=18 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1    ZEROING=0 UIMM8()*/ {55, 4630},
/*empty slot1 */ {0,0},
/*h(33)=20 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {33, 5303},
/*h(79)=21 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1    ZEROING=0 UIMM8()*/ {79, 5305},
/*h(87)=22 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1    ZEROING=0 UIMM8()*/ {87, 4630},
/*empty slot1 */ {0,0},
/*h(65)=24 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {65, 5299},
/*h(111)=25 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1    ZEROING=0 UIMM8()*/ {111, 5305},
/*h(119)=26 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1    ZEROING=0 UIMM8()*/ {119, 4630},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2)=32 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 UIMM8()*/ {2, 5300},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(26)=35 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0    ZEROING=0 UIMM8()*/ {26, 4610},
/*h(34)=36 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0 UIMM8()*/ {34, 5302},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(58)=39 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0    ZEROING=0 UIMM8()*/ {58, 4610},
/*h(66)=40 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0 UIMM8()*/ {66, 5297},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=43 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0    ZEROING=0 UIMM8()*/ {90, 4610},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(122)=47 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0    ZEROING=0 UIMM8()*/ {122, 4610},
/*h(3)=48 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0    ZEROING=0 UIMM8()*/ {3, 5298},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(27)=51 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0    ZEROING=0 UIMM8()*/ {27, 4611},
/*h(35)=52 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0    ZEROING=0 UIMM8()*/ {35, 5298},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(59)=55 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0    ZEROING=0 UIMM8()*/ {59, 4611},
/*h(67)=56 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0    ZEROING=0 UIMM8()*/ {67, 5298},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=59 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0    ZEROING=0 UIMM8()*/ {91, 4611},
/*h(99)=60 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0    ZEROING=0 UIMM8()*/ {99, 5298},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(123)=63 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0    ZEROING=0 UIMM8()*/ {123, 4611},
/*empty slot1 */ {0,0},
/*h(12)=65 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 5308},
/*h(20)=66 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4631},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=69 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5310},
/*h(52)=70 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4631},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=73 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5306},
/*h(84)=74 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4631},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=78 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4631},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(13)=81 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 5308},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=85 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5310},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(77)=89 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5306},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(14)=97 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0 UIMM8()*/ {14, 5307},
/*h(22)=98 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1    ZEROING=0 UIMM8()*/ {22, 4629},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((16*key % 127) % 100);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10)=0 EVV 0xC4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_16_BITS() NELEM_GPR_READER_WORD()*/ {10, 5869},
/*h(14)=1 EVV 0xC4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {14, 5868}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc5_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[5] = {
/*h(742)=0 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8() not64*/ {742, 4145},
/*h(750)=1 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8() not64*/ {750, 4145},
/*h(726)=2 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8() mode64 EVEXRR_ONE*/ {726, 4146},
/*h(718)=3 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8() not64*/ {718, 4145},
/*h(710)=4 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8() not64*/ {710, 4145}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 7) % 5);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xc6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(0)=0 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {0, 4744},
/*h(14)=1 EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 4686},
/*h(66)=2 EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {66, 4741},
/*h(77)=3 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 4685},
/*h(32)=4 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {32, 4746},
/*h(46)=5 EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 4688},
/*h(1)=6 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {1, 4744},
/*h(12)=7 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 4687},
/*h(64)=8 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {64, 4742},
/*h(78)=9 EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 4684},
/*h(33)=10 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {33, 4746},
/*h(44)=11 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 4689},
/*h(2)=12 EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {2, 4743},
/*h(13)=13 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 4687},
/*h(65)=14 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {65, 4742},
/*h(76)=15 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 4685},
/*h(34)=16 EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {34, 4745},
/*h(45)=17 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 4689}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((6*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd1_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5899},
/*h(4)=1 EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_MEM128()*/ {4, 5896},
/*h(38)=2 EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5903},
/*h(20)=3 EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_MEM128()*/ {20, 5900},
/*h(6)=4 EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5895},
/*h(36)=5 EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_MEM128()*/ {36, 5904}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd2_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(42)=0 EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5957},
/*h(8)=1 EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {8, 5954},
/*h(72)=2 EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {72, 5950},
/*h(10)=3 EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5953},
/*h(74)=4 EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5949},
/*h(40)=5 EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {40, 5958}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd3_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(14)=0 EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5911},
/*h(46)=1 EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5915},
/*h(78)=2 EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5907},
/*h(12)=3 EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {12, 5912},
/*h(44)=4 EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {44, 5916},
/*h(76)=5 EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {76, 5908}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((9*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5503},
/*h(46)=1 EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5506},
/*h(12)=2 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5505},
/*h(77)=3 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5503},
/*h(13)=4 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5505},
/*h(78)=5 EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5502},
/*h(44)=6 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5507},
/*h(14)=7 EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5504},
/*h(45)=8 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5507}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd5_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5734},
/*h(4)=1 EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5733},
/*h(38)=2 EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5736},
/*h(20)=3 EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5735},
/*h(6)=4 EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5732},
/*h(36)=5 EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5737}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(190)=0 EVV 0xD6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128 W1  NOEVSR  ZEROING=0 MASK=0*/ {190, 3910},
/*h(186)=1 EVV 0xD6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128 W1  NOEVSR  ZEROING=0 MASK=0  ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 3911}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5405},
/*h(4)=1 EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 5404},
/*h(38)=2 EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5407},
/*h(20)=3 EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 5406},
/*h(6)=4 EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5403},
/*h(36)=5 EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 5408}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xd9_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5435},
/*h(4)=1 EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5434},
/*h(38)=2 EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5437},
/*h(20)=3 EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5436},
/*h(6)=4 EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5433},
/*h(36)=5 EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xda_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6477},
/*h(4)=1 EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6476},
/*h(38)=2 EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6479},
/*h(20)=3 EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6478},
/*h(6)=4 EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6475},
/*h(36)=5 EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6480}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4701},
/*h(76)=1 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4726},
/*h(8)=2 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4703},
/*h(12)=3 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4728},
/*h(41)=4 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4705},
/*h(45)=5 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4730},
/*h(74)=6 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4700},
/*h(78)=7 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4725},
/*h(10)=8 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4702},
/*h(14)=9 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4727},
/*h(40)=10 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4705},
/*h(44)=11 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4730},
/*h(73)=12 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4701},
/*h(77)=13 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4726},
/*h(9)=14 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4703},
/*h(13)=15 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4728},
/*h(42)=16 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4704},
/*h(46)=17 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4729}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdc_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5091},
/*h(4)=1 EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 5090},
/*h(38)=2 EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5093},
/*h(20)=3 EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 5092},
/*h(6)=4 EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5089},
/*h(36)=5 EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 5094}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdd_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5081},
/*h(4)=1 EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5080},
/*h(38)=2 EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5083},
/*h(20)=3 EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5082},
/*h(6)=4 EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5079},
/*h(36)=5 EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5084}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xde_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6635},
/*h(4)=1 EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6634},
/*h(38)=2 EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6637},
/*h(20)=3 EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6636},
/*h(6)=4 EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6633},
/*h(36)=5 EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6638}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xdf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4328},
/*h(76)=1 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4352},
/*h(8)=2 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4330},
/*h(12)=3 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4354},
/*h(41)=4 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4332},
/*h(45)=5 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4356},
/*h(74)=6 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4327},
/*h(78)=7 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4351},
/*h(10)=8 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4329},
/*h(14)=9 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4353},
/*h(40)=10 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4332},
/*h(44)=11 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4356},
/*h(73)=12 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4328},
/*h(77)=13 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4352},
/*h(9)=14 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4330},
/*h(13)=15 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4354},
/*h(42)=16 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4331},
/*h(46)=17 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4355}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe0_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6292},
/*h(4)=1 EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6291},
/*h(38)=2 EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6294},
/*h(20)=3 EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6293},
/*h(6)=4 EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6290},
/*h(36)=5 EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6295}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe1_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4538},
/*h(4)=1 EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_MEM128()*/ {4, 4535},
/*h(38)=2 EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4542},
/*h(20)=3 EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_MEM128()*/ {20, 4539},
/*h(6)=4 EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4534},
/*h(36)=5 EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_MEM128()*/ {36, 4543}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe2_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5679},
/*h(72)=1 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {72, 4503},
/*h(42)=2 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4510},
/*h(78)=3 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5671},
/*h(12)=4 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {12, 5676},
/*h(74)=5 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4502},
/*h(8)=6 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {8, 4507},
/*h(44)=7 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {44, 5680},
/*h(14)=8 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5675},
/*h(40)=9 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {40, 4511},
/*h(76)=10 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {76, 5672},
/*h(10)=11 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4506}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe3_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4116},
/*h(4)=1 EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 4115},
/*h(38)=2 EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4118},
/*h(20)=3 EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 4117},
/*h(6)=4 EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4114},
/*h(36)=5 EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 4119}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 3779},
/*h(4)=1 EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 3778},
/*h(38)=2 EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 3781},
/*h(20)=3 EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 3780},
/*h(6)=4 EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 3777},
/*h(36)=5 EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 3782}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe5_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5147},
/*h(4)=1 EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5146},
/*h(38)=2 EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5149},
/*h(20)=3 EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5148},
/*h(6)=4 EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5145},
/*h(36)=5 EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5150}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[96] = {
/*h(218)=0 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6095},
/*h(477)=1 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {477, 4864},
/*h(94)=2 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 6573},
/*h(668)=3 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {668, 4844},
/*h(927)=4 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {927, 4843},
/*h(217)=5 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {217, 6096},
/*h(476)=6 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {476, 4864},
/*h(735)=7 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {735, 4866},
/*empty slot1 */ {0,0},
/*h(478)=9 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {478, 4863},
/*h(95)=10 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {95, 6571},
/*h(669)=11 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {669, 4844},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(220)=16 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {220, 4862},
/*h(479)=17 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {479, 4866},
/*empty slot1 */ {0,0},
/*h(670)=19 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {670, 4842},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(221)=24 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {221, 4862},
/*empty slot1 */ {0,0},
/*h(412)=26 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {412, 4848},
/*h(671)=27 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {671, 4843},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(222)=32 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {222, 4861},
/*empty slot1 */ {0,0},
/*h(413)=34 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {413, 4848},
/*empty slot1 */ {0,0},
/*h(604)=36 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 6572},
/*h(863)=37 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {863, 6571},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(223)=40 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {223, 4866},
/*empty slot1 */ {0,0},
/*h(414)=42 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {414, 4847},
/*empty slot1 */ {0,0},
/*h(605)=44 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 6572},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(728)=47 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {728, 6094},
/*empty slot1 */ {0,0},
/*h(156)=49 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {156, 4846},
/*h(415)=50 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {415, 4843},
/*empty slot1 */ {0,0},
/*h(606)=52 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 6570},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(729)=55 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {729, 6094},
/*empty slot1 */ {0,0},
/*h(157)=57 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {157, 4846},
/*empty slot1 */ {0,0},
/*h(348)=59 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 6576},
/*h(607)=60 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {607, 6571},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(730)=63 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6093},
/*empty slot1 */ {0,0},
/*h(158)=65 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {158, 4845},
/*empty slot1 */ {0,0},
/*h(349)=67 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 6576},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(472)=70 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {472, 6098},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(159)=73 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {159, 4843},
/*empty slot1 */ {0,0},
/*h(350)=75 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 6575},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(473)=78 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {473, 6098},
/*h(732)=79 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {732, 4867},
/*h(991)=80 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1  NOEVSR*/ {991, 4866},
/*empty slot1 */ {0,0},
/*h(92)=82 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 6574},
/*h(351)=83 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {351, 6571},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(474)=86 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6097},
/*h(733)=87 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {733, 4867},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(93)=90 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 6574},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=93 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALF()*/ {216, 6096},
/*empty slot1 */ {0,0},
/*h(734)=95 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {734, 4865}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((8*key % 109) % 96);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe7_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(178)=0 EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {178, 5282},
/*h(690)=1 EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {690, 5283},
/*h(1202)=2 EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {1202, 5281}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6397},
/*h(4)=1 EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6396},
/*h(38)=2 EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6399},
/*h(20)=3 EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6398},
/*h(6)=4 EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6395},
/*h(36)=5 EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xe9_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6629},
/*h(4)=1 EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6628},
/*h(38)=2 EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6631},
/*h(20)=3 EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6630},
/*h(6)=4 EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6627},
/*h(36)=5 EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6632}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xea_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4394},
/*h(4)=1 EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 4393},
/*h(38)=2 EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4396},
/*h(20)=3 EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 4395},
/*h(6)=4 EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4392},
/*h(36)=5 EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 4397}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xeb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6672},
/*h(76)=1 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6712},
/*h(8)=2 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6674},
/*h(12)=3 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6714},
/*h(41)=4 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6676},
/*h(45)=5 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6716},
/*h(74)=6 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6671},
/*h(78)=7 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6711},
/*h(10)=8 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6673},
/*h(14)=9 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6713},
/*h(40)=10 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6676},
/*h(44)=11 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6716},
/*h(73)=12 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6672},
/*h(77)=13 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6712},
/*h(9)=14 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6674},
/*h(13)=15 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6714},
/*h(42)=16 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6675},
/*h(46)=17 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6715}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xec_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4980},
/*h(4)=1 EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 4979},
/*h(38)=2 EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4982},
/*h(20)=3 EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 4981},
/*h(6)=4 EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4978},
/*h(36)=5 EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 4983}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xed_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4935},
/*h(4)=1 EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 4934},
/*h(38)=2 EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4937},
/*h(20)=3 EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 4936},
/*h(6)=4 EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4933},
/*h(36)=5 EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 4938}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xee_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4226},
/*h(4)=1 EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 4225},
/*h(38)=2 EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4228},
/*h(20)=3 EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 4227},
/*h(6)=4 EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4224},
/*h(36)=5 EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 4229}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xef_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6227},
/*h(76)=1 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6192},
/*h(8)=2 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6229},
/*h(12)=3 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6194},
/*h(41)=4 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6231},
/*h(45)=5 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6196},
/*h(74)=6 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6226},
/*h(78)=7 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6191},
/*h(10)=8 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6228},
/*h(14)=9 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6193},
/*h(40)=10 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6231},
/*h(44)=11 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6196},
/*h(73)=12 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6227},
/*h(77)=13 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6192},
/*h(9)=14 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6229},
/*h(13)=15 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6194},
/*h(42)=16 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6230},
/*h(46)=17 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6195}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf1_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4661},
/*h(4)=1 EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_MEM128()*/ {4, 4658},
/*h(38)=2 EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4665},
/*h(20)=3 EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_MEM128()*/ {20, 4662},
/*h(6)=4 EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4657},
/*h(36)=5 EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_MEM128()*/ {36, 4666}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf2_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(42)=0 EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6218},
/*h(8)=1 EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {8, 6215},
/*h(72)=2 EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {72, 6211},
/*h(10)=3 EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6214},
/*h(74)=4 EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6210},
/*h(40)=5 EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_MEM128()*/ {40, 6219}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf3_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(14)=0 EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4636},
/*h(46)=1 EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4640},
/*h(78)=2 EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4632},
/*h(12)=3 EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {12, 4637},
/*h(44)=4 EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {44, 4641},
/*h(76)=5 EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_MEM128()*/ {76, 4633}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((9*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 3850},
/*h(46)=1 EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 3853},
/*h(12)=2 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 3852},
/*h(77)=3 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 3850},
/*h(13)=4 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 3852},
/*h(78)=5 EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 3849},
/*h(44)=6 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 3854},
/*h(14)=7 EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 3851},
/*h(45)=8 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 3854}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf5_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6595},
/*h(4)=1 EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6594},
/*h(38)=2 EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6597},
/*h(20)=3 EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6596},
/*h(6)=4 EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6593},
/*h(36)=5 EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6598}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {10, 6161},
/*h(78)=2 EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0 MASK=0*/ {78, 6164},
/*empty slot1 */ {0,0},
/*h(46)=4 EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0 MASK=0*/ {46, 6162},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0*/ {14, 6160},
/*h(74)=7 EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {74, 6165},
/*empty slot1 */ {0,0},
/*h(42)=9 EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {42, 6163}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6128},
/*h(4)=1 EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6127},
/*h(38)=2 EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6130},
/*h(20)=3 EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6129},
/*h(6)=4 EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6126},
/*h(36)=5 EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6131}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xf9_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 6149},
/*h(4)=1 EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6148},
/*h(38)=2 EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 6151},
/*h(20)=3 EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6150},
/*h(6)=4 EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 6147},
/*h(36)=5 EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6152}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfa_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6136},
/*h(10)=3 EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6137},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6140},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6136},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6138},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6140},
/*h(74)=13 EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6135},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6138},
/*h(42)=17 EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6139}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6142},
/*h(46)=1 EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6145},
/*h(12)=2 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6144},
/*h(77)=3 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6142},
/*h(13)=4 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6144},
/*h(78)=5 EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6141},
/*h(44)=6 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6146},
/*h(14)=7 EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6143},
/*h(45)=8 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6146}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfc_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5543},
/*h(4)=1 EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 5542},
/*h(38)=2 EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5545},
/*h(20)=3 EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 5544},
/*h(6)=4 EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5541},
/*h(36)=5 EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 5546}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfd_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5516},
/*h(4)=1 EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5515},
/*h(38)=2 EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5518},
/*h(20)=3 EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5517},
/*h(6)=4 EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5514},
/*h(36)=5 EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5519}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F_opcode0xfe_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5557},
/*h(10)=3 EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5558},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5561},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5557},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5559},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5561},
/*h(74)=13 EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5556},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5559},
/*h(42)=17 EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5560}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x0_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4555},
/*h(4)=1 EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 4554},
/*h(38)=2 EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4557},
/*h(20)=3 EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 4556},
/*h(6)=4 EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4553},
/*h(36)=5 EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 4558}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5186},
/*h(4)=1 EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5185},
/*h(38)=2 EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5188},
/*h(20)=3 EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5187},
/*h(6)=4 EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5184},
/*h(36)=5 EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5189}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 3922},
/*h(4)=1 EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 3921},
/*h(38)=2 EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 3924},
/*h(20)=3 EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 3923},
/*h(6)=4 EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 3920},
/*h(36)=5 EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 3925}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4065},
/*h(10)=3 EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4068},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4073},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4065},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4069},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4073},
/*h(74)=13 EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4064},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4069},
/*h(42)=17 EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4072}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xd_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5160},
/*h(46)=1 EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5167},
/*h(12)=2 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5164},
/*h(77)=3 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5160},
/*h(13)=4 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5164},
/*h(78)=5 EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5159},
/*h(44)=6 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5168},
/*h(14)=7 EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5163},
/*h(45)=8 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5168}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x10_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[210] = {
/*h(1654)=0 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1654, 4199},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1388)=4 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1388, 4198},
/*empty slot1 */ {0,0},
/*h(124)=6 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 4196},
/*h(1754)=7 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 6276},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(86)=10 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {86, 4195},
/*h(1108)=11 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1108, 4196},
/*h(628)=12 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 4200},
/*empty slot1 */ {0,0},
/*h(1398)=14 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1398, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1612)=17 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1612, 4200},
/*h(1132)=18 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1132, 4196},
/*h(728)=19 EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {728, 6277},
/*empty slot1 */ {0,0},
/*h(1498)=21 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 6274},
/*h(638)=22 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {638, 4199},
/*empty slot1 */ {0,0},
/*h(1636)=24 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1636, 4200},
/*empty slot1 */ {0,0},
/*h(372)=26 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 4198},
/*h(1622)=27 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1622, 4199},
/*h(1142)=28 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1142, 4195},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1356)=31 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1356, 4198},
/*empty slot1 */ {0,0},
/*h(472)=33 EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {472, 6275},
/*h(1646)=34 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1646, 4199},
/*h(1242)=35 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 6272},
/*h(382)=36 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {382, 4197},
/*empty slot1 */ {0,0},
/*h(1380)=38 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1380, 4198},
/*h(596)=39 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 4200},
/*h(116)=40 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 4196},
/*h(1366)=41 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1366, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1100)=45 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1100, 4196},
/*h(620)=46 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 4200},
/*h(216)=47 EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {216, 6273},
/*h(1390)=48 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1390, 4197},
/*empty slot1 */ {0,0},
/*h(126)=50 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {126, 4195},
/*h(1604)=51 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1604, 4200},
/*h(1124)=52 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1124, 4196},
/*h(340)=53 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 4198},
/*empty slot1 */ {0,0},
/*h(1110)=55 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1110, 4195},
/*h(630)=56 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {630, 4199},
/*empty slot1 */ {0,0},
/*h(1628)=58 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1628, 4200},
/*empty slot1 */ {0,0},
/*h(364)=60 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 4198},
/*h(1614)=61 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1614, 4199},
/*h(1134)=62 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1134, 4195},
/*h(730)=63 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6276},
/*empty slot1 */ {0,0},
/*h(1348)=65 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1348, 4198},
/*empty slot1 */ {0,0},
/*h(84)=67 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 4196},
/*h(1638)=68 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1638, 4199},
/*empty slot1 */ {0,0},
/*h(374)=70 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {374, 4197},
/*empty slot1 */ {0,0},
/*h(1372)=72 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1372, 4198},
/*h(588)=73 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 4200},
/*h(108)=74 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 4196},
/*h(1358)=75 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1358, 4197},
/*empty slot1 */ {0,0},
/*h(474)=77 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6274},
/*empty slot1 */ {0,0},
/*h(1092)=79 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1092, 4196},
/*h(612)=80 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 4200},
/*empty slot1 */ {0,0},
/*h(1382)=82 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1382, 4197},
/*h(598)=83 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {598, 4199},
/*h(118)=84 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {118, 4195},
/*empty slot1 */ {0,0},
/*h(1116)=86 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1116, 4196},
/*h(332)=87 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 4198},
/*empty slot1 */ {0,0},
/*h(1102)=89 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1102, 4195},
/*h(622)=90 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {622, 4199},
/*h(218)=91 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6272},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(356)=94 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 4198},
/*h(1606)=95 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1606, 4199},
/*h(1126)=96 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1126, 4195},
/*h(342)=97 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {342, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=101 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 4196},
/*h(1630)=102 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1630, 4199},
/*empty slot1 */ {0,0},
/*h(366)=104 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {366, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(580)=107 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 4200},
/*h(100)=108 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 4196},
/*h(1350)=109 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1350, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=114 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 4200},
/*empty slot1 */ {0,0},
/*h(1374)=116 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1374, 4197},
/*h(590)=117 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {590, 4199},
/*h(110)=118 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {110, 4195},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(324)=121 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 4198},
/*empty slot1 */ {0,0},
/*h(1094)=123 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1094, 4195},
/*h(614)=124 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {614, 4199},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(348)=128 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 4198},
/*empty slot1 */ {0,0},
/*h(1118)=130 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1118, 4195},
/*h(334)=131 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {334, 4197},
/*h(1660)=132 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1660, 4200},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(68)=135 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 4196},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(358)=138 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {358, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=142 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 4196},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(78)=145 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {78, 4195},
/*h(1404)=146 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1404, 4198},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(582)=151 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {582, 4199},
/*h(102)=152 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {102, 4195},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=158 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {606, 4199},
/*empty slot1 */ {0,0},
/*h(1148)=160 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1148, 4196},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(326)=165 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {326, 4197},
/*h(1652)=166 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1652, 4200},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=172 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {350, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1662)=176 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1662, 4199},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(70)=179 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {70, 4195},
/*h(1396)=180 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1396, 4198},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=186 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {94, 4195},
/*empty slot1 */ {0,0},
/*h(636)=188 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 4200},
/*empty slot1 */ {0,0},
/*h(1406)=190 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1406, 4197},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1620)=193 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1620, 4200},
/*h(1140)=194 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1140, 4196},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1644)=200 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1644, 4200},
/*empty slot1 */ {0,0},
/*h(380)=202 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 4198},
/*empty slot1 */ {0,0},
/*h(1150)=204 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1150, 4195},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1364)=207 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1364, 4198},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((22*key % 941) % 210);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x11_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[210] = {
/*h(1654)=0 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1654, 5230},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1388)=4 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1388, 5229},
/*empty slot1 */ {0,0},
/*h(124)=6 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 5227},
/*h(1754)=7 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 5139},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(86)=10 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {86, 5226},
/*h(1108)=11 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1108, 5227},
/*h(628)=12 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 5231},
/*empty slot1 */ {0,0},
/*h(1398)=14 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1398, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1612)=17 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1612, 5231},
/*h(1132)=18 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1132, 5227},
/*h(728)=19 EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {728, 5140},
/*empty slot1 */ {0,0},
/*h(1498)=21 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 5143},
/*h(638)=22 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {638, 5230},
/*empty slot1 */ {0,0},
/*h(1636)=24 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1636, 5231},
/*empty slot1 */ {0,0},
/*h(372)=26 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 5229},
/*h(1622)=27 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1622, 5230},
/*h(1142)=28 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1142, 5226},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1356)=31 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1356, 5229},
/*empty slot1 */ {0,0},
/*h(472)=33 EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {472, 5144},
/*h(1646)=34 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1646, 5230},
/*h(1242)=35 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 5141},
/*h(382)=36 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {382, 5228},
/*empty slot1 */ {0,0},
/*h(1380)=38 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1380, 5229},
/*h(596)=39 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 5231},
/*h(116)=40 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 5227},
/*h(1366)=41 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1366, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1100)=45 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1100, 5227},
/*h(620)=46 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 5231},
/*h(216)=47 EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {216, 5142},
/*h(1390)=48 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1390, 5228},
/*empty slot1 */ {0,0},
/*h(126)=50 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {126, 5226},
/*h(1604)=51 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1604, 5231},
/*h(1124)=52 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1124, 5227},
/*h(340)=53 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 5229},
/*empty slot1 */ {0,0},
/*h(1110)=55 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1110, 5226},
/*h(630)=56 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {630, 5230},
/*empty slot1 */ {0,0},
/*h(1628)=58 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1628, 5231},
/*empty slot1 */ {0,0},
/*h(364)=60 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 5229},
/*h(1614)=61 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1614, 5230},
/*h(1134)=62 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1134, 5226},
/*h(730)=63 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 5139},
/*empty slot1 */ {0,0},
/*h(1348)=65 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1348, 5229},
/*empty slot1 */ {0,0},
/*h(84)=67 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 5227},
/*h(1638)=68 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1638, 5230},
/*empty slot1 */ {0,0},
/*h(374)=70 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {374, 5228},
/*empty slot1 */ {0,0},
/*h(1372)=72 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1372, 5229},
/*h(588)=73 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 5231},
/*h(108)=74 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 5227},
/*h(1358)=75 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1358, 5228},
/*empty slot1 */ {0,0},
/*h(474)=77 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 5143},
/*empty slot1 */ {0,0},
/*h(1092)=79 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1092, 5227},
/*h(612)=80 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 5231},
/*empty slot1 */ {0,0},
/*h(1382)=82 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1382, 5228},
/*h(598)=83 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {598, 5230},
/*h(118)=84 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {118, 5226},
/*empty slot1 */ {0,0},
/*h(1116)=86 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1116, 5227},
/*h(332)=87 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 5229},
/*empty slot1 */ {0,0},
/*h(1102)=89 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1102, 5226},
/*h(622)=90 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {622, 5230},
/*h(218)=91 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 5141},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(356)=94 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 5229},
/*h(1606)=95 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1606, 5230},
/*h(1126)=96 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1126, 5226},
/*h(342)=97 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {342, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=101 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5227},
/*h(1630)=102 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1630, 5230},
/*empty slot1 */ {0,0},
/*h(366)=104 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {366, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(580)=107 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 5231},
/*h(100)=108 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 5227},
/*h(1350)=109 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1350, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=114 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 5231},
/*empty slot1 */ {0,0},
/*h(1374)=116 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1374, 5228},
/*h(590)=117 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {590, 5230},
/*h(110)=118 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {110, 5226},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(324)=121 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 5229},
/*empty slot1 */ {0,0},
/*h(1094)=123 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1094, 5226},
/*h(614)=124 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {614, 5230},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(348)=128 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 5229},
/*empty slot1 */ {0,0},
/*h(1118)=130 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1118, 5226},
/*h(334)=131 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {334, 5228},
/*h(1660)=132 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1660, 5231},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(68)=135 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 5227},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(358)=138 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {358, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=142 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 5227},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(78)=145 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {78, 5226},
/*h(1404)=146 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1404, 5229},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(582)=151 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {582, 5230},
/*h(102)=152 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {102, 5226},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=158 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {606, 5230},
/*empty slot1 */ {0,0},
/*h(1148)=160 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1148, 5227},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(326)=165 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {326, 5228},
/*h(1652)=166 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1652, 5231},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=172 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {350, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1662)=176 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1662, 5230},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(70)=179 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {70, 5226},
/*h(1396)=180 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1396, 5229},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=186 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {94, 5226},
/*empty slot1 */ {0,0},
/*h(636)=188 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 5231},
/*empty slot1 */ {0,0},
/*h(1406)=190 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1406, 5228},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1620)=193 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1620, 5231},
/*h(1140)=194 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1140, 5227},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1644)=200 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1644, 5231},
/*empty slot1 */ {0,0},
/*h(380)=202 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 5229},
/*empty slot1 */ {0,0},
/*h(1150)=204 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1150, 5226},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1364)=207 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1364, 5229},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((22*key % 941) % 210);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x12_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[210] = {
/*h(1654)=0 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1654, 6733},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1388)=4 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1388, 6732},
/*empty slot1 */ {0,0},
/*h(124)=6 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 6730},
/*h(1754)=7 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4147},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(86)=10 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {86, 6729},
/*h(1108)=11 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1108, 6730},
/*h(628)=12 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 6734},
/*empty slot1 */ {0,0},
/*h(1398)=14 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1398, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1612)=17 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1612, 6734},
/*h(1132)=18 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1132, 6730},
/*h(728)=19 EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {728, 4148},
/*empty slot1 */ {0,0},
/*h(1498)=21 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4151},
/*h(638)=22 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {638, 6733},
/*empty slot1 */ {0,0},
/*h(1636)=24 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1636, 6734},
/*empty slot1 */ {0,0},
/*h(372)=26 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 6732},
/*h(1622)=27 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1622, 6733},
/*h(1142)=28 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1142, 6729},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1356)=31 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1356, 6732},
/*empty slot1 */ {0,0},
/*h(472)=33 EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {472, 4152},
/*h(1646)=34 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1646, 6733},
/*h(1242)=35 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4149},
/*h(382)=36 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {382, 6731},
/*empty slot1 */ {0,0},
/*h(1380)=38 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1380, 6732},
/*h(596)=39 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 6734},
/*h(116)=40 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 6730},
/*h(1366)=41 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1366, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1100)=45 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1100, 6730},
/*h(620)=46 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 6734},
/*h(216)=47 EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {216, 4150},
/*h(1390)=48 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1390, 6731},
/*empty slot1 */ {0,0},
/*h(126)=50 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {126, 6729},
/*h(1604)=51 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1604, 6734},
/*h(1124)=52 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1124, 6730},
/*h(340)=53 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 6732},
/*empty slot1 */ {0,0},
/*h(1110)=55 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1110, 6729},
/*h(630)=56 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {630, 6733},
/*empty slot1 */ {0,0},
/*h(1628)=58 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1628, 6734},
/*empty slot1 */ {0,0},
/*h(364)=60 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 6732},
/*h(1614)=61 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1614, 6733},
/*h(1134)=62 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1134, 6729},
/*h(730)=63 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4147},
/*empty slot1 */ {0,0},
/*h(1348)=65 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1348, 6732},
/*empty slot1 */ {0,0},
/*h(84)=67 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 6730},
/*h(1638)=68 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1638, 6733},
/*empty slot1 */ {0,0},
/*h(374)=70 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {374, 6731},
/*empty slot1 */ {0,0},
/*h(1372)=72 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1372, 6732},
/*h(588)=73 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 6734},
/*h(108)=74 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 6730},
/*h(1358)=75 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1358, 6731},
/*empty slot1 */ {0,0},
/*h(474)=77 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4151},
/*empty slot1 */ {0,0},
/*h(1092)=79 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1092, 6730},
/*h(612)=80 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 6734},
/*empty slot1 */ {0,0},
/*h(1382)=82 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1382, 6731},
/*h(598)=83 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {598, 6733},
/*h(118)=84 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {118, 6729},
/*empty slot1 */ {0,0},
/*h(1116)=86 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1116, 6730},
/*h(332)=87 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 6732},
/*empty slot1 */ {0,0},
/*h(1102)=89 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1102, 6729},
/*h(622)=90 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {622, 6733},
/*h(218)=91 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4149},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(356)=94 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 6732},
/*h(1606)=95 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1606, 6733},
/*h(1126)=96 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1126, 6729},
/*h(342)=97 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {342, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=101 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6730},
/*h(1630)=102 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1630, 6733},
/*empty slot1 */ {0,0},
/*h(366)=104 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {366, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(580)=107 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 6734},
/*h(100)=108 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 6730},
/*h(1350)=109 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1350, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=114 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 6734},
/*empty slot1 */ {0,0},
/*h(1374)=116 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1374, 6731},
/*h(590)=117 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {590, 6733},
/*h(110)=118 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {110, 6729},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(324)=121 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 6732},
/*empty slot1 */ {0,0},
/*h(1094)=123 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1094, 6729},
/*h(614)=124 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {614, 6733},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(348)=128 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 6732},
/*empty slot1 */ {0,0},
/*h(1118)=130 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1118, 6729},
/*h(334)=131 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {334, 6731},
/*h(1660)=132 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1660, 6734},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(68)=135 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 6730},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(358)=138 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {358, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=142 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6730},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(78)=145 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {78, 6729},
/*h(1404)=146 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1404, 6732},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(582)=151 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {582, 6733},
/*h(102)=152 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {102, 6729},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=158 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {606, 6733},
/*empty slot1 */ {0,0},
/*h(1148)=160 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1148, 6730},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(326)=165 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {326, 6731},
/*h(1652)=166 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1652, 6734},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=172 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {350, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1662)=176 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1662, 6733},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(70)=179 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {70, 6729},
/*h(1396)=180 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1396, 6732},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=186 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {94, 6729},
/*empty slot1 */ {0,0},
/*h(636)=188 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 6734},
/*empty slot1 */ {0,0},
/*h(1406)=190 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1406, 6731},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1620)=193 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1620, 6734},
/*h(1140)=194 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1140, 6730},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1644)=200 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1644, 6734},
/*empty slot1 */ {0,0},
/*h(380)=202 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 6732},
/*empty slot1 */ {0,0},
/*h(1150)=204 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1150, 6729},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1364)=207 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {1364, 6732},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((22*key % 941) % 210);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x13_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[58] = {
/*h(472)=0 EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {472, 5174},
/*empty slot1 */ {0,0},
/*h(602)=2 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4010},
/*empty slot1 */ {0,0},
/*h(344)=4 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 4016},
/*h(603)=5 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {603, 4011},
/*h(474)=6 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 5173},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {216, 5172},
/*empty slot1 */ {0,0},
/*h(346)=10 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4015},
/*empty slot1 */ {0,0},
/*h(88)=12 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 4014},
/*h(347)=13 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {347, 4011},
/*h(218)=14 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 5171},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=18 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4013},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=21 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {91, 4011},
/*h(1624)=22 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1624, 4012},
/*h(1883)=23 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1883, 4011},
/*h(1754)=24 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 5169},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1626)=28 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 4010},
/*empty slot1 */ {0,0},
/*h(1368)=30 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1368, 4016},
/*h(1627)=31 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1627, 4011},
/*h(1498)=32 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 5173},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=36 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 4015},
/*empty slot1 */ {0,0},
/*h(1112)=38 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1112, 4014},
/*h(1371)=39 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1371, 4011},
/*h(1242)=40 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 5171},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1114)=44 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 4013},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1115)=47 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {1115, 4011},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(728)=50 EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {728, 5170},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=54 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 4012},
/*h(859)=55 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {859, 4011},
/*h(730)=56 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 5169},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 97) % 58);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x14_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[594] = {
/*h(598)=0 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {598, 6053},
/*h(120)=1 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {120, 6102},
/*empty slot1 */ {0,0},
/*h(360)=3 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {360, 6104},
/*empty slot1 */ {0,0},
/*h(600)=5 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {600, 6100},
/*h(121)=6 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {121, 6102},
/*empty slot1 */ {0,0},
/*h(361)=8 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {361, 6104},
/*empty slot1 */ {0,0},
/*h(601)=10 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {601, 6100},
/*h(122)=11 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {122, 6101},
/*empty slot1 */ {0,0},
/*h(362)=13 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {362, 6103},
/*empty slot1 */ {0,0},
/*h(602)=15 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {602, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(124)=21 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {124, 6056},
/*empty slot1 */ {0,0},
/*h(364)=23 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {364, 6058},
/*empty slot1 */ {0,0},
/*h(604)=25 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {604, 6054},
/*h(125)=26 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {125, 6056},
/*empty slot1 */ {0,0},
/*h(365)=28 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {365, 6058},
/*empty slot1 */ {0,0},
/*h(605)=30 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {605, 6054},
/*h(126)=31 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {126, 6055},
/*empty slot1 */ {0,0},
/*h(366)=33 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {366, 6057},
/*empty slot1 */ {0,0},
/*h(606)=35 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {606, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(368)=43 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {368, 6104},
/*empty slot1 */ {0,0},
/*h(608)=45 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {608, 6100},
/*h(728)=46 EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {728, 4121},
/*empty slot1 */ {0,0},
/*h(369)=48 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {369, 6104},
/*h(1088)=49 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1088, 6102},
/*h(609)=50 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {609, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(370)=53 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {370, 6103},
/*h(1089)=54 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1089, 6102},
/*h(610)=55 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {610, 6099},
/*h(730)=56 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4120},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1090)=59 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1090, 6101},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(372)=63 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {372, 6058},
/*empty slot1 */ {0,0},
/*h(612)=65 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {612, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(373)=68 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {373, 6058},
/*h(1092)=69 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1092, 6056},
/*h(613)=70 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {613, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(374)=73 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {374, 6057},
/*h(1093)=74 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1093, 6056},
/*h(614)=75 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {614, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1094)=79 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1094, 6055},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(376)=83 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {376, 6104},
/*empty slot1 */ {0,0},
/*h(616)=85 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {616, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(377)=88 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {377, 6104},
/*h(1096)=89 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1096, 6102},
/*h(617)=90 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {617, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(378)=93 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {378, 6103},
/*h(1097)=94 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1097, 6102},
/*h(618)=95 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {618, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1098)=99 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1098, 6101},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(380)=103 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {380, 6058},
/*empty slot1 */ {0,0},
/*h(620)=105 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {620, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(381)=108 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {381, 6058},
/*h(1100)=109 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1100, 6056},
/*h(621)=110 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {621, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(382)=113 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {382, 6057},
/*h(1101)=114 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1101, 6056},
/*h(622)=115 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {622, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1102)=119 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1102, 6055},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(624)=125 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {624, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1104)=129 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1104, 6102},
/*h(625)=130 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {625, 6100},
/*h(1344)=131 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1344, 6104},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1105)=134 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1105, 6102},
/*h(626)=135 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {626, 6099},
/*h(1345)=136 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1345, 6104},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1106)=139 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1106, 6101},
/*empty slot1 */ {0,0},
/*h(1346)=141 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1346, 6103},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(628)=145 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {628, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1108)=149 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1108, 6056},
/*h(629)=150 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {629, 6054},
/*h(1348)=151 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1348, 6058},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1109)=154 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1109, 6056},
/*h(630)=155 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {630, 6053},
/*h(1349)=156 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1349, 6058},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1110)=159 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1110, 6055},
/*empty slot1 */ {0,0},
/*h(1350)=161 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1350, 6057},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(632)=165 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {632, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=169 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1112, 6102},
/*h(633)=170 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {633, 6100},
/*h(1352)=171 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1352, 6104},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1113)=174 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1113, 6102},
/*h(634)=175 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {634, 6099},
/*h(1353)=176 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1353, 6104},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1114)=179 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1114, 6101},
/*empty slot1 */ {0,0},
/*h(1354)=181 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1354, 6103},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(636)=185 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {636, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1116)=189 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1116, 6056},
/*h(637)=190 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {637, 6054},
/*h(1356)=191 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1356, 6058},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1117)=194 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1117, 6056},
/*h(638)=195 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {638, 6053},
/*h(1357)=196 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1357, 6058},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1118)=199 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1118, 6055},
/*empty slot1 */ {0,0},
/*h(1358)=201 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1358, 6057},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1120)=209 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1120, 6102},
/*empty slot1 */ {0,0},
/*h(1360)=211 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1360, 6104},
/*empty slot1 */ {0,0},
/*h(1600)=213 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1600, 6100},
/*h(1121)=214 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1121, 6102},
/*empty slot1 */ {0,0},
/*h(1361)=216 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1361, 6104},
/*empty slot1 */ {0,0},
/*h(1601)=218 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1601, 6100},
/*h(1122)=219 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1122, 6101},
/*h(1242)=220 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4122},
/*h(1362)=221 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1362, 6103},
/*empty slot1 */ {0,0},
/*h(1602)=223 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1602, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1124)=229 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1124, 6056},
/*empty slot1 */ {0,0},
/*h(1364)=231 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1364, 6058},
/*empty slot1 */ {0,0},
/*h(1604)=233 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1604, 6054},
/*h(1125)=234 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1125, 6056},
/*empty slot1 */ {0,0},
/*h(1365)=236 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1365, 6058},
/*empty slot1 */ {0,0},
/*h(1605)=238 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1605, 6054},
/*h(1126)=239 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1126, 6055},
/*empty slot1 */ {0,0},
/*h(1366)=241 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1366, 6057},
/*empty slot1 */ {0,0},
/*h(1606)=243 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1606, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1128)=249 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1128, 6102},
/*empty slot1 */ {0,0},
/*h(1368)=251 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1368, 6104},
/*empty slot1 */ {0,0},
/*h(1608)=253 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1608, 6100},
/*h(1129)=254 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1129, 6102},
/*empty slot1 */ {0,0},
/*h(1369)=256 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1369, 6104},
/*empty slot1 */ {0,0},
/*h(1609)=258 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1609, 6100},
/*h(1130)=259 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1130, 6101},
/*empty slot1 */ {0,0},
/*h(1370)=261 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1370, 6103},
/*empty slot1 */ {0,0},
/*h(1610)=263 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1610, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1132)=269 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1132, 6056},
/*empty slot1 */ {0,0},
/*h(1372)=271 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1372, 6058},
/*empty slot1 */ {0,0},
/*h(1612)=273 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1612, 6054},
/*h(1133)=274 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1133, 6056},
/*empty slot1 */ {0,0},
/*h(1373)=276 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1373, 6058},
/*empty slot1 */ {0,0},
/*h(1613)=278 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1613, 6054},
/*h(1134)=279 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1134, 6055},
/*empty slot1 */ {0,0},
/*h(1374)=281 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1374, 6057},
/*empty slot1 */ {0,0},
/*h(1614)=283 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1614, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1136)=289 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1136, 6102},
/*empty slot1 */ {0,0},
/*h(1376)=291 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1376, 6104},
/*empty slot1 */ {0,0},
/*h(1616)=293 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1616, 6100},
/*h(1137)=294 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1137, 6102},
/*empty slot1 */ {0,0},
/*h(1377)=296 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1377, 6104},
/*empty slot1 */ {0,0},
/*h(1617)=298 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1617, 6100},
/*h(1138)=299 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1138, 6101},
/*empty slot1 */ {0,0},
/*h(1378)=301 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1378, 6103},
/*h(1498)=302 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4124},
/*h(1618)=303 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1618, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1140)=309 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1140, 6056},
/*empty slot1 */ {0,0},
/*h(1380)=311 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1380, 6058},
/*empty slot1 */ {0,0},
/*h(1620)=313 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1620, 6054},
/*h(1141)=314 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1141, 6056},
/*empty slot1 */ {0,0},
/*h(1381)=316 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1381, 6058},
/*empty slot1 */ {0,0},
/*h(1621)=318 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1621, 6054},
/*h(1142)=319 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1142, 6055},
/*h(64)=320 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 6102},
/*h(1382)=321 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1382, 6057},
/*empty slot1 */ {0,0},
/*h(1622)=323 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1622, 6053},
/*empty slot1 */ {0,0},
/*h(65)=325 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 6102},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1144)=329 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1144, 6102},
/*h(66)=330 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {66, 6101},
/*h(1384)=331 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1384, 6104},
/*empty slot1 */ {0,0},
/*h(1624)=333 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1624, 6100},
/*h(1145)=334 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1145, 6102},
/*empty slot1 */ {0,0},
/*h(1385)=336 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1385, 6104},
/*empty slot1 */ {0,0},
/*h(1625)=338 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1625, 6100},
/*h(1146)=339 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1146, 6101},
/*h(68)=340 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {68, 6056},
/*h(1386)=341 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1386, 6103},
/*empty slot1 */ {0,0},
/*h(1626)=343 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1626, 6099},
/*empty slot1 */ {0,0},
/*h(69)=345 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {69, 6056},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1148)=349 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1148, 6056},
/*h(70)=350 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {70, 6055},
/*h(1388)=351 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1388, 6058},
/*empty slot1 */ {0,0},
/*h(1628)=353 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1628, 6054},
/*h(1149)=354 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1149, 6056},
/*empty slot1 */ {0,0},
/*h(1389)=356 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1389, 6058},
/*empty slot1 */ {0,0},
/*h(1629)=358 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1629, 6054},
/*h(1150)=359 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1150, 6055},
/*h(72)=360 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6102},
/*h(1390)=361 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1390, 6057},
/*empty slot1 */ {0,0},
/*h(1630)=363 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1630, 6053},
/*empty slot1 */ {0,0},
/*h(73)=365 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6102},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(74)=370 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {74, 6101},
/*h(1392)=371 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1392, 6104},
/*empty slot1 */ {0,0},
/*h(1632)=373 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1632, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1393)=376 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1393, 6104},
/*empty slot1 */ {0,0},
/*h(1633)=378 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1633, 6100},
/*empty slot1 */ {0,0},
/*h(76)=380 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6056},
/*h(1394)=381 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1394, 6103},
/*empty slot1 */ {0,0},
/*h(1634)=383 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1634, 6099},
/*h(1754)=384 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4120},
/*h(77)=385 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6056},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(78)=390 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {78, 6055},
/*h(1396)=391 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1396, 6058},
/*empty slot1 */ {0,0},
/*h(1636)=393 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1636, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1397)=396 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1397, 6058},
/*empty slot1 */ {0,0},
/*h(1637)=398 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1637, 6054},
/*empty slot1 */ {0,0},
/*h(80)=400 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {80, 6102},
/*h(1398)=401 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1398, 6057},
/*h(320)=402 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {320, 6104},
/*h(1638)=403 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1638, 6053},
/*empty slot1 */ {0,0},
/*h(81)=405 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {81, 6102},
/*empty slot1 */ {0,0},
/*h(321)=407 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {321, 6104},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(82)=410 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {82, 6101},
/*h(1400)=411 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1400, 6104},
/*h(322)=412 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {322, 6103},
/*h(1640)=413 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1640, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1401)=416 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1401, 6104},
/*empty slot1 */ {0,0},
/*h(1641)=418 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1641, 6100},
/*empty slot1 */ {0,0},
/*h(84)=420 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {84, 6056},
/*h(1402)=421 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1402, 6103},
/*h(324)=422 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {324, 6058},
/*h(1642)=423 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1642, 6099},
/*empty slot1 */ {0,0},
/*h(85)=425 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {85, 6056},
/*empty slot1 */ {0,0},
/*h(325)=427 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {325, 6058},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(86)=430 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {86, 6055},
/*h(1404)=431 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1404, 6058},
/*h(326)=432 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {326, 6057},
/*h(1644)=433 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1644, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1405)=436 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1405, 6058},
/*empty slot1 */ {0,0},
/*h(1645)=438 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1645, 6054},
/*empty slot1 */ {0,0},
/*h(88)=440 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {88, 6102},
/*h(1406)=441 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1406, 6057},
/*h(328)=442 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {328, 6104},
/*h(1646)=443 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1646, 6053},
/*empty slot1 */ {0,0},
/*h(89)=445 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {89, 6102},
/*empty slot1 */ {0,0},
/*h(329)=447 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {329, 6104},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=450 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {90, 6101},
/*empty slot1 */ {0,0},
/*h(330)=452 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {330, 6103},
/*h(1648)=453 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1648, 6100},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1649)=458 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1649, 6100},
/*empty slot1 */ {0,0},
/*h(92)=460 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {92, 6056},
/*empty slot1 */ {0,0},
/*h(332)=462 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {332, 6058},
/*h(1650)=463 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1650, 6099},
/*empty slot1 */ {0,0},
/*h(93)=465 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {93, 6056},
/*empty slot1 */ {0,0},
/*h(333)=467 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {333, 6058},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=470 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {94, 6055},
/*empty slot1 */ {0,0},
/*h(334)=472 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {334, 6057},
/*h(1652)=473 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1652, 6054},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1653)=478 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1653, 6054},
/*empty slot1 */ {0,0},
/*h(96)=480 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {96, 6102},
/*h(216)=481 EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {216, 4123},
/*h(336)=482 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {336, 6104},
/*h(1654)=483 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1654, 6053},
/*h(576)=484 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {576, 6100},
/*h(97)=485 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {97, 6102},
/*empty slot1 */ {0,0},
/*h(337)=487 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {337, 6104},
/*empty slot1 */ {0,0},
/*h(577)=489 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {577, 6100},
/*h(98)=490 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {98, 6101},
/*h(218)=491 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4122},
/*h(338)=492 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {338, 6103},
/*h(1656)=493 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1656, 6100},
/*h(578)=494 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {578, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1657)=498 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1657, 6100},
/*empty slot1 */ {0,0},
/*h(100)=500 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {100, 6056},
/*empty slot1 */ {0,0},
/*h(340)=502 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {340, 6058},
/*h(1658)=503 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1658, 6099},
/*h(580)=504 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {580, 6054},
/*h(101)=505 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {101, 6056},
/*empty slot1 */ {0,0},
/*h(341)=507 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {341, 6058},
/*empty slot1 */ {0,0},
/*h(581)=509 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {581, 6054},
/*h(102)=510 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {102, 6055},
/*empty slot1 */ {0,0},
/*h(342)=512 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {342, 6057},
/*h(1660)=513 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1660, 6054},
/*h(582)=514 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {582, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1661)=518 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1661, 6054},
/*empty slot1 */ {0,0},
/*h(104)=520 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {104, 6102},
/*empty slot1 */ {0,0},
/*h(344)=522 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {344, 6104},
/*h(1662)=523 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1662, 6053},
/*h(584)=524 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {584, 6100},
/*h(105)=525 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {105, 6102},
/*empty slot1 */ {0,0},
/*h(345)=527 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {345, 6104},
/*empty slot1 */ {0,0},
/*h(585)=529 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {585, 6100},
/*h(106)=530 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {106, 6101},
/*empty slot1 */ {0,0},
/*h(346)=532 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {346, 6103},
/*empty slot1 */ {0,0},
/*h(586)=534 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {586, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(108)=540 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {108, 6056},
/*empty slot1 */ {0,0},
/*h(348)=542 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {348, 6058},
/*empty slot1 */ {0,0},
/*h(588)=544 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {588, 6054},
/*h(109)=545 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {109, 6056},
/*empty slot1 */ {0,0},
/*h(349)=547 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {349, 6058},
/*empty slot1 */ {0,0},
/*h(589)=549 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {589, 6054},
/*h(110)=550 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {110, 6055},
/*empty slot1 */ {0,0},
/*h(350)=552 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {350, 6057},
/*empty slot1 */ {0,0},
/*h(590)=554 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {590, 6053},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(112)=560 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {112, 6102},
/*empty slot1 */ {0,0},
/*h(352)=562 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {352, 6104},
/*h(472)=563 EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {472, 4125},
/*h(592)=564 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {592, 6100},
/*h(113)=565 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {113, 6102},
/*empty slot1 */ {0,0},
/*h(353)=567 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {353, 6104},
/*empty slot1 */ {0,0},
/*h(593)=569 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {593, 6100},
/*h(114)=570 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {114, 6101},
/*empty slot1 */ {0,0},
/*h(354)=572 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {354, 6103},
/*h(474)=573 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4124},
/*h(594)=574 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {594, 6099},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=580 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {116, 6056},
/*empty slot1 */ {0,0},
/*h(356)=582 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {356, 6058},
/*empty slot1 */ {0,0},
/*h(596)=584 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {596, 6054},
/*h(117)=585 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {117, 6056},
/*empty slot1 */ {0,0},
/*h(357)=587 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {357, 6058},
/*empty slot1 */ {0,0},
/*h(597)=589 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {597, 6054},
/*h(118)=590 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {118, 6055},
/*empty slot1 */ {0,0},
/*h(358)=592 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {358, 6057},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 599) % 594);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x15_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[594] = {
/*h(598)=0 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {598, 3829},
/*h(120)=1 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {120, 3804},
/*empty slot1 */ {0,0},
/*h(360)=3 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {360, 3806},
/*empty slot1 */ {0,0},
/*h(600)=5 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {600, 3802},
/*h(121)=6 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {121, 3804},
/*empty slot1 */ {0,0},
/*h(361)=8 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {361, 3806},
/*empty slot1 */ {0,0},
/*h(601)=10 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {601, 3802},
/*h(122)=11 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {122, 3803},
/*empty slot1 */ {0,0},
/*h(362)=13 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {362, 3805},
/*empty slot1 */ {0,0},
/*h(602)=15 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {602, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(124)=21 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {124, 3832},
/*empty slot1 */ {0,0},
/*h(364)=23 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {364, 3834},
/*empty slot1 */ {0,0},
/*h(604)=25 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {604, 3830},
/*h(125)=26 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {125, 3832},
/*empty slot1 */ {0,0},
/*h(365)=28 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {365, 3834},
/*empty slot1 */ {0,0},
/*h(605)=30 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {605, 3830},
/*h(126)=31 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {126, 3831},
/*empty slot1 */ {0,0},
/*h(366)=33 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {366, 3833},
/*empty slot1 */ {0,0},
/*h(606)=35 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {606, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(368)=43 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {368, 3806},
/*empty slot1 */ {0,0},
/*h(608)=45 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {608, 3802},
/*h(728)=46 EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {728, 4160},
/*empty slot1 */ {0,0},
/*h(369)=48 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {369, 3806},
/*h(1088)=49 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1088, 3804},
/*h(609)=50 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {609, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(370)=53 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {370, 3805},
/*h(1089)=54 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1089, 3804},
/*h(610)=55 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {610, 3801},
/*h(730)=56 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4159},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1090)=59 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1090, 3803},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(372)=63 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {372, 3834},
/*empty slot1 */ {0,0},
/*h(612)=65 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {612, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(373)=68 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {373, 3834},
/*h(1092)=69 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1092, 3832},
/*h(613)=70 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {613, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(374)=73 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {374, 3833},
/*h(1093)=74 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1093, 3832},
/*h(614)=75 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {614, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1094)=79 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1094, 3831},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(376)=83 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {376, 3806},
/*empty slot1 */ {0,0},
/*h(616)=85 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {616, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(377)=88 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {377, 3806},
/*h(1096)=89 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1096, 3804},
/*h(617)=90 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {617, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(378)=93 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {378, 3805},
/*h(1097)=94 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1097, 3804},
/*h(618)=95 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {618, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1098)=99 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1098, 3803},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(380)=103 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {380, 3834},
/*empty slot1 */ {0,0},
/*h(620)=105 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {620, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(381)=108 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {381, 3834},
/*h(1100)=109 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1100, 3832},
/*h(621)=110 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {621, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(382)=113 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {382, 3833},
/*h(1101)=114 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1101, 3832},
/*h(622)=115 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {622, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1102)=119 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1102, 3831},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(624)=125 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {624, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1104)=129 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1104, 3804},
/*h(625)=130 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {625, 3802},
/*h(1344)=131 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1344, 3806},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1105)=134 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1105, 3804},
/*h(626)=135 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {626, 3801},
/*h(1345)=136 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1345, 3806},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1106)=139 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1106, 3803},
/*empty slot1 */ {0,0},
/*h(1346)=141 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1346, 3805},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(628)=145 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {628, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1108)=149 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1108, 3832},
/*h(629)=150 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {629, 3830},
/*h(1348)=151 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1348, 3834},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1109)=154 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1109, 3832},
/*h(630)=155 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {630, 3829},
/*h(1349)=156 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1349, 3834},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1110)=159 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1110, 3831},
/*empty slot1 */ {0,0},
/*h(1350)=161 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1350, 3833},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(632)=165 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {632, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=169 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1112, 3804},
/*h(633)=170 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {633, 3802},
/*h(1352)=171 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1352, 3806},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1113)=174 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1113, 3804},
/*h(634)=175 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {634, 3801},
/*h(1353)=176 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1353, 3806},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1114)=179 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1114, 3803},
/*empty slot1 */ {0,0},
/*h(1354)=181 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1354, 3805},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(636)=185 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {636, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1116)=189 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1116, 3832},
/*h(637)=190 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {637, 3830},
/*h(1356)=191 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1356, 3834},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1117)=194 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1117, 3832},
/*h(638)=195 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {638, 3829},
/*h(1357)=196 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1357, 3834},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1118)=199 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1118, 3831},
/*empty slot1 */ {0,0},
/*h(1358)=201 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1358, 3833},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1120)=209 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1120, 3804},
/*empty slot1 */ {0,0},
/*h(1360)=211 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1360, 3806},
/*empty slot1 */ {0,0},
/*h(1600)=213 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1600, 3802},
/*h(1121)=214 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1121, 3804},
/*empty slot1 */ {0,0},
/*h(1361)=216 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1361, 3806},
/*empty slot1 */ {0,0},
/*h(1601)=218 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1601, 3802},
/*h(1122)=219 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1122, 3803},
/*h(1242)=220 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4161},
/*h(1362)=221 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1362, 3805},
/*empty slot1 */ {0,0},
/*h(1602)=223 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1602, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1124)=229 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1124, 3832},
/*empty slot1 */ {0,0},
/*h(1364)=231 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1364, 3834},
/*empty slot1 */ {0,0},
/*h(1604)=233 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1604, 3830},
/*h(1125)=234 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1125, 3832},
/*empty slot1 */ {0,0},
/*h(1365)=236 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1365, 3834},
/*empty slot1 */ {0,0},
/*h(1605)=238 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1605, 3830},
/*h(1126)=239 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1126, 3831},
/*empty slot1 */ {0,0},
/*h(1366)=241 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1366, 3833},
/*empty slot1 */ {0,0},
/*h(1606)=243 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1606, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1128)=249 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1128, 3804},
/*empty slot1 */ {0,0},
/*h(1368)=251 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1368, 3806},
/*empty slot1 */ {0,0},
/*h(1608)=253 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1608, 3802},
/*h(1129)=254 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1129, 3804},
/*empty slot1 */ {0,0},
/*h(1369)=256 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1369, 3806},
/*empty slot1 */ {0,0},
/*h(1609)=258 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1609, 3802},
/*h(1130)=259 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1130, 3803},
/*empty slot1 */ {0,0},
/*h(1370)=261 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1370, 3805},
/*empty slot1 */ {0,0},
/*h(1610)=263 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1610, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1132)=269 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1132, 3832},
/*empty slot1 */ {0,0},
/*h(1372)=271 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1372, 3834},
/*empty slot1 */ {0,0},
/*h(1612)=273 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1612, 3830},
/*h(1133)=274 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1133, 3832},
/*empty slot1 */ {0,0},
/*h(1373)=276 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1373, 3834},
/*empty slot1 */ {0,0},
/*h(1613)=278 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1613, 3830},
/*h(1134)=279 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1134, 3831},
/*empty slot1 */ {0,0},
/*h(1374)=281 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1374, 3833},
/*empty slot1 */ {0,0},
/*h(1614)=283 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1614, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1136)=289 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1136, 3804},
/*empty slot1 */ {0,0},
/*h(1376)=291 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1376, 3806},
/*empty slot1 */ {0,0},
/*h(1616)=293 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1616, 3802},
/*h(1137)=294 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1137, 3804},
/*empty slot1 */ {0,0},
/*h(1377)=296 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1377, 3806},
/*empty slot1 */ {0,0},
/*h(1617)=298 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1617, 3802},
/*h(1138)=299 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1138, 3803},
/*empty slot1 */ {0,0},
/*h(1378)=301 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1378, 3805},
/*h(1498)=302 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4163},
/*h(1618)=303 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1618, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1140)=309 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1140, 3832},
/*empty slot1 */ {0,0},
/*h(1380)=311 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1380, 3834},
/*empty slot1 */ {0,0},
/*h(1620)=313 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1620, 3830},
/*h(1141)=314 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1141, 3832},
/*empty slot1 */ {0,0},
/*h(1381)=316 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1381, 3834},
/*empty slot1 */ {0,0},
/*h(1621)=318 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1621, 3830},
/*h(1142)=319 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1142, 3831},
/*h(64)=320 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {64, 3804},
/*h(1382)=321 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1382, 3833},
/*empty slot1 */ {0,0},
/*h(1622)=323 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1622, 3829},
/*empty slot1 */ {0,0},
/*h(65)=325 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {65, 3804},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1144)=329 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1144, 3804},
/*h(66)=330 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {66, 3803},
/*h(1384)=331 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1384, 3806},
/*empty slot1 */ {0,0},
/*h(1624)=333 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1624, 3802},
/*h(1145)=334 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1145, 3804},
/*empty slot1 */ {0,0},
/*h(1385)=336 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1385, 3806},
/*empty slot1 */ {0,0},
/*h(1625)=338 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1625, 3802},
/*h(1146)=339 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {1146, 3803},
/*h(68)=340 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {68, 3832},
/*h(1386)=341 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1386, 3805},
/*empty slot1 */ {0,0},
/*h(1626)=343 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1626, 3801},
/*empty slot1 */ {0,0},
/*h(69)=345 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {69, 3832},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1148)=349 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1148, 3832},
/*h(70)=350 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {70, 3831},
/*h(1388)=351 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1388, 3834},
/*empty slot1 */ {0,0},
/*h(1628)=353 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1628, 3830},
/*h(1149)=354 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1149, 3832},
/*empty slot1 */ {0,0},
/*h(1389)=356 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1389, 3834},
/*empty slot1 */ {0,0},
/*h(1629)=358 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1629, 3830},
/*h(1150)=359 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {1150, 3831},
/*h(72)=360 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 3804},
/*h(1390)=361 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1390, 3833},
/*empty slot1 */ {0,0},
/*h(1630)=363 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1630, 3829},
/*empty slot1 */ {0,0},
/*h(73)=365 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 3804},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(74)=370 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {74, 3803},
/*h(1392)=371 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1392, 3806},
/*empty slot1 */ {0,0},
/*h(1632)=373 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1632, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1393)=376 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1393, 3806},
/*empty slot1 */ {0,0},
/*h(1633)=378 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1633, 3802},
/*empty slot1 */ {0,0},
/*h(76)=380 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 3832},
/*h(1394)=381 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1394, 3805},
/*empty slot1 */ {0,0},
/*h(1634)=383 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1634, 3801},
/*h(1754)=384 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4159},
/*h(77)=385 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 3832},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(78)=390 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {78, 3831},
/*h(1396)=391 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1396, 3834},
/*empty slot1 */ {0,0},
/*h(1636)=393 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1636, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1397)=396 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1397, 3834},
/*empty slot1 */ {0,0},
/*h(1637)=398 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1637, 3830},
/*empty slot1 */ {0,0},
/*h(80)=400 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {80, 3804},
/*h(1398)=401 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1398, 3833},
/*h(320)=402 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {320, 3806},
/*h(1638)=403 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1638, 3829},
/*empty slot1 */ {0,0},
/*h(81)=405 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {81, 3804},
/*empty slot1 */ {0,0},
/*h(321)=407 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {321, 3806},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(82)=410 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {82, 3803},
/*h(1400)=411 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1400, 3806},
/*h(322)=412 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {322, 3805},
/*h(1640)=413 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1640, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1401)=416 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1401, 3806},
/*empty slot1 */ {0,0},
/*h(1641)=418 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1641, 3802},
/*empty slot1 */ {0,0},
/*h(84)=420 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {84, 3832},
/*h(1402)=421 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {1402, 3805},
/*h(324)=422 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {324, 3834},
/*h(1642)=423 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1642, 3801},
/*empty slot1 */ {0,0},
/*h(85)=425 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {85, 3832},
/*empty slot1 */ {0,0},
/*h(325)=427 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {325, 3834},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(86)=430 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {86, 3831},
/*h(1404)=431 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1404, 3834},
/*h(326)=432 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {326, 3833},
/*h(1644)=433 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1644, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1405)=436 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1405, 3834},
/*empty slot1 */ {0,0},
/*h(1645)=438 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1645, 3830},
/*empty slot1 */ {0,0},
/*h(88)=440 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {88, 3804},
/*h(1406)=441 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {1406, 3833},
/*h(328)=442 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {328, 3806},
/*h(1646)=443 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1646, 3829},
/*empty slot1 */ {0,0},
/*h(89)=445 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {89, 3804},
/*empty slot1 */ {0,0},
/*h(329)=447 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {329, 3806},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(90)=450 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {90, 3803},
/*empty slot1 */ {0,0},
/*h(330)=452 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {330, 3805},
/*h(1648)=453 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1648, 3802},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1649)=458 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1649, 3802},
/*empty slot1 */ {0,0},
/*h(92)=460 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {92, 3832},
/*empty slot1 */ {0,0},
/*h(332)=462 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {332, 3834},
/*h(1650)=463 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1650, 3801},
/*empty slot1 */ {0,0},
/*h(93)=465 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {93, 3832},
/*empty slot1 */ {0,0},
/*h(333)=467 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {333, 3834},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=470 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {94, 3831},
/*empty slot1 */ {0,0},
/*h(334)=472 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {334, 3833},
/*h(1652)=473 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1652, 3830},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1653)=478 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1653, 3830},
/*empty slot1 */ {0,0},
/*h(96)=480 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {96, 3804},
/*h(216)=481 EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {216, 4162},
/*h(336)=482 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {336, 3806},
/*h(1654)=483 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1654, 3829},
/*h(576)=484 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {576, 3802},
/*h(97)=485 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {97, 3804},
/*empty slot1 */ {0,0},
/*h(337)=487 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {337, 3806},
/*empty slot1 */ {0,0},
/*h(577)=489 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {577, 3802},
/*h(98)=490 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {98, 3803},
/*h(218)=491 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4161},
/*h(338)=492 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {338, 3805},
/*h(1656)=493 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1656, 3802},
/*h(578)=494 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {578, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1657)=498 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1657, 3802},
/*empty slot1 */ {0,0},
/*h(100)=500 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {100, 3832},
/*empty slot1 */ {0,0},
/*h(340)=502 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {340, 3834},
/*h(1658)=503 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1658, 3801},
/*h(580)=504 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {580, 3830},
/*h(101)=505 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {101, 3832},
/*empty slot1 */ {0,0},
/*h(341)=507 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {341, 3834},
/*empty slot1 */ {0,0},
/*h(581)=509 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {581, 3830},
/*h(102)=510 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {102, 3831},
/*empty slot1 */ {0,0},
/*h(342)=512 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {342, 3833},
/*h(1660)=513 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1660, 3830},
/*h(582)=514 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {582, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1661)=518 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1661, 3830},
/*empty slot1 */ {0,0},
/*h(104)=520 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {104, 3804},
/*empty slot1 */ {0,0},
/*h(344)=522 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {344, 3806},
/*h(1662)=523 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1662, 3829},
/*h(584)=524 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {584, 3802},
/*h(105)=525 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {105, 3804},
/*empty slot1 */ {0,0},
/*h(345)=527 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {345, 3806},
/*empty slot1 */ {0,0},
/*h(585)=529 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {585, 3802},
/*h(106)=530 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {106, 3803},
/*empty slot1 */ {0,0},
/*h(346)=532 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {346, 3805},
/*empty slot1 */ {0,0},
/*h(586)=534 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {586, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(108)=540 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {108, 3832},
/*empty slot1 */ {0,0},
/*h(348)=542 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {348, 3834},
/*empty slot1 */ {0,0},
/*h(588)=544 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {588, 3830},
/*h(109)=545 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {109, 3832},
/*empty slot1 */ {0,0},
/*h(349)=547 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {349, 3834},
/*empty slot1 */ {0,0},
/*h(589)=549 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {589, 3830},
/*h(110)=550 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {110, 3831},
/*empty slot1 */ {0,0},
/*h(350)=552 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {350, 3833},
/*empty slot1 */ {0,0},
/*h(590)=554 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {590, 3829},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(112)=560 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {112, 3804},
/*empty slot1 */ {0,0},
/*h(352)=562 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {352, 3806},
/*h(472)=563 EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {472, 4164},
/*h(592)=564 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {592, 3802},
/*h(113)=565 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {113, 3804},
/*empty slot1 */ {0,0},
/*h(353)=567 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {353, 3806},
/*empty slot1 */ {0,0},
/*h(593)=569 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {593, 3802},
/*h(114)=570 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {114, 3803},
/*empty slot1 */ {0,0},
/*h(354)=572 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {354, 3805},
/*h(474)=573 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4163},
/*h(594)=574 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {594, 3801},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(116)=580 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {116, 3832},
/*empty slot1 */ {0,0},
/*h(356)=582 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {356, 3834},
/*empty slot1 */ {0,0},
/*h(596)=584 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {596, 3830},
/*h(117)=585 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {117, 3832},
/*empty slot1 */ {0,0},
/*h(357)=587 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {357, 3834},
/*empty slot1 */ {0,0},
/*h(597)=589 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {597, 3830},
/*h(118)=590 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {118, 3831},
/*empty slot1 */ {0,0},
/*h(358)=592 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {358, 3833},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 599) % 594);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x16_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6502},
/*h(73)=1 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6466},
/*h(77)=2 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6499},
/*h(41)=3 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6468},
/*h(45)=4 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6503},
/*h(72)=5 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6466},
/*h(76)=6 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6499},
/*h(40)=7 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6468},
/*h(44)=8 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6503},
/*h(74)=9 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6465},
/*h(78)=10 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6498},
/*h(42)=11 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6467}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 43) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x18_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(602)=0 EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6028},
/*h(600)=1 EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE1()*/ {600, 6027},
/*h(346)=2 EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6032},
/*h(344)=3 EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE1()*/ {344, 6031},
/*h(90)=4 EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6030},
/*h(88)=5 EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE1()*/ {88, 6029}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x19_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*h(600)=0 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE2()*/ {600, 5383},
/*h(350)=1 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5998},
/*h(348)=2 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE1()*/ {348, 5997},
/*h(346)=3 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5380},
/*h(344)=4 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE2()*/ {344, 5381},
/*h(606)=5 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5996},
/*h(604)=6 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE1()*/ {604, 5995},
/*h(602)=7 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5382}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((5*key % 11) % 8);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(348)=0 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 4883},
/*h(604)=1 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 4884},
/*h(344)=2 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 4560},
/*h(600)=3 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 4559}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(604)=0 EVV 0x1B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 4875},
/*h(600)=1 EVV 0x1B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 5365}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=2 EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {44, 5048},
/*h(172)=3 EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {172, 5050},
/*h(300)=4 EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {300, 5052},
/*h(46)=5 EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {46, 5047},
/*h(174)=6 EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {174, 5049},
/*h(302)=7 EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {302, 5051},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 12ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=2 EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5024},
/*h(172)=3 EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {172, 5026},
/*h(300)=4 EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {300, 5028},
/*h(46)=5 EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {46, 5023},
/*h(174)=6 EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {174, 5025},
/*h(302)=7 EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {302, 5027},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 12ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(89)=0 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 5499},
/*h(602)=1 EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5496},
/*empty slot1 */ {0,0},
/*h(345)=3 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 5501},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(88)=6 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 5499},
/*h(601)=7 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 5497},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(344)=10 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 5501},
/*h(90)=11 EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5498},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=14 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 5497},
/*h(346)=15 EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5500},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x1f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(94)=0 EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5031},
/*h(350)=1 EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5033},
/*h(606)=2 EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5029},
/*h(92)=3 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 5032},
/*h(348)=4 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 5034},
/*h(604)=5 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5030},
/*h(93)=6 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 5032},
/*h(349)=7 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 5034},
/*h(605)=8 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5030}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 13) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x20_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6313},
/*h(1498)=1 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 6313},
/*h(728)=2 EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {728, 6316},
/*h(218)=3 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6311},
/*h(1242)=4 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 6311},
/*h(472)=5 EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {472, 6314},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {216, 6312},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6315},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1624, 4590},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1368, 4588},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1112, 4586},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 4589},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 4587},
/*h(600)=30 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {600, 4590},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 4585},
/*h(344)=33 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {344, 4588},
/*h(1628)=34 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1628, 4590},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {88, 4586},
/*h(1372)=37 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1372, 4588},
/*h(602)=38 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 4589},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1116, 4586},
/*h(346)=41 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 4587},
/*h(1630)=42 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 4589},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 4585},
/*h(1374)=45 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 4587},
/*h(604)=46 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {604, 4590},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 4585},
/*h(348)=49 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {348, 4588},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {92, 4586},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 4589},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 4587},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 4585},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 6315},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x21_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 3996},
/*h(1498)=1 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 3996},
/*h(728)=2 EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {728, 3993},
/*h(218)=3 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 3994},
/*h(1242)=4 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 3994},
/*h(472)=5 EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {472, 3997},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {216, 3995},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 3992},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1624, 5857},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1368, 5861},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1112, 5859},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 5856},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 5860},
/*h(600)=30 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {600, 5857},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 5858},
/*h(344)=33 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {344, 5861},
/*h(1628)=34 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1628, 5857},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {88, 5859},
/*h(1372)=37 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1372, 5861},
/*h(602)=38 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 5856},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1116, 5859},
/*h(346)=41 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 5860},
/*h(1630)=42 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 5856},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 5858},
/*h(1374)=45 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 5860},
/*h(604)=46 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {604, 5857},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 5858},
/*h(348)=49 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {348, 5861},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {92, 5859},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 5856},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 5860},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 5858},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 3992},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x22_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4976},
/*h(1498)=1 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4976},
/*h(728)=2 EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {728, 4973},
/*h(218)=3 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4974},
/*h(1242)=4 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4974},
/*h(472)=5 EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {472, 4977},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {216, 4975},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4972},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1624, 4461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1368, 4465},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1112, 4463},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 4460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 4464},
/*h(600)=30 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {600, 4461},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 4462},
/*h(344)=33 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {344, 4465},
/*h(1628)=34 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1628, 4461},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {88, 4463},
/*h(1372)=37 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1372, 4465},
/*h(602)=38 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 4460},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1116, 4463},
/*h(346)=41 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 4464},
/*h(1630)=42 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 4460},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 4462},
/*h(1374)=45 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 4464},
/*h(604)=46 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {604, 4461},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 4462},
/*h(348)=49 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {348, 4465},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {92, 4463},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 4460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 4464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 4462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4972},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x23_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4042},
/*h(1498)=1 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4042},
/*h(728)=2 EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {728, 4039},
/*h(218)=3 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4040},
/*h(1242)=4 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4040},
/*h(472)=5 EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {472, 4043},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {216, 4041},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4038},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1624, 6347},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1368, 6351},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1112, 6349},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 6346},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 6350},
/*h(600)=30 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 6347},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 6348},
/*h(344)=33 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 6351},
/*h(1628)=34 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1628, 6347},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 6349},
/*h(1372)=37 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1372, 6351},
/*h(602)=38 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 6346},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1116, 6349},
/*h(346)=41 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 6350},
/*h(1630)=42 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 6346},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 6348},
/*h(1374)=45 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 6350},
/*h(604)=46 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {604, 6347},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 6348},
/*h(348)=49 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {348, 6351},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {92, 6349},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 6346},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 6350},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 6348},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4038},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x24_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4943},
/*h(1498)=1 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4943},
/*h(728)=2 EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {728, 4940},
/*h(218)=3 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4941},
/*h(1242)=4 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4941},
/*h(472)=5 EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {472, 4944},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {216, 4942},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4939},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1624, 6364},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1368, 6368},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1112, 6366},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 6363},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 6367},
/*h(600)=30 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {600, 6364},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 6365},
/*h(344)=33 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {344, 6368},
/*h(1628)=34 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1628, 6364},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {88, 6366},
/*h(1372)=37 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1372, 6368},
/*h(602)=38 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 6363},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1116, 6366},
/*h(346)=41 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 6367},
/*h(1630)=42 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 6363},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 6365},
/*h(1374)=45 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 6367},
/*h(604)=46 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {604, 6364},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 6365},
/*h(348)=49 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {348, 6368},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {92, 6366},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 6363},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 6367},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 6365},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4939},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x25_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[31] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=2 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {600, 4172},
/*h(218)=3 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4968},
/*empty slot1 */ {0,0},
/*h(1624)=5 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {1624, 4172},
/*h(1242)=6 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4968},
/*empty slot1 */ {0,0},
/*h(602)=8 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4171},
/*h(344)=9 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {344, 4176},
/*empty slot1 */ {0,0},
/*h(1626)=11 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 4171},
/*h(1368)=12 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {1368, 4176},
/*empty slot1 */ {0,0},
/*h(728)=14 EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {728, 4967},
/*h(346)=15 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4175},
/*h(88)=16 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {88, 4174},
/*empty slot1 */ {0,0},
/*h(1370)=18 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 4175},
/*h(1112)=19 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {1112, 4174},
/*h(730)=20 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4966},
/*h(472)=21 EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {472, 4971},
/*h(90)=22 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4173},
/*h(1754)=23 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4966},
/*empty slot1 */ {0,0},
/*h(1114)=25 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 4173},
/*empty slot1 */ {0,0},
/*h(474)=27 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4970},
/*h(216)=28 EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {216, 4969},
/*empty slot1 */ {0,0},
/*h(1498)=30 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4970}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 31);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x26_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[24] = {
/*h(74)=0 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {74, 5598},
/*h(78)=1 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {78, 5690},
/*h(8)=2 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 5595},
/*h(12)=3 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 5687},
/*h(90)=4 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {90, 5718},
/*h(94)=5 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {94, 3775},
/*h(24)=6 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {24, 5715},
/*h(28)=7 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {28, 3772},
/*h(10)=8 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {10, 5594},
/*h(14)=9 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {14, 5686},
/*h(40)=10 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 5597},
/*h(44)=11 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5689},
/*h(26)=12 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {26, 5714},
/*h(30)=13 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {30, 3771},
/*h(56)=14 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {56, 5717},
/*h(60)=15 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {60, 3774},
/*h(42)=16 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {42, 5596},
/*h(46)=17 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {46, 5688},
/*h(72)=18 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 5599},
/*h(76)=19 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5691},
/*h(58)=20 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {58, 5716},
/*h(62)=21 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {62, 3773},
/*h(88)=22 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {88, 5719},
/*h(92)=23 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ZEROING=0  ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 3776}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((15*key % 59) % 24);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x27_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[54] = {
/*h(89)=0 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {89, 5709},
/*h(13)=1 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {13, 6090},
/*empty slot1 */ {0,0},
/*h(26)=3 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {26, 5710},
/*h(60)=4 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {60, 3828},
/*h(94)=5 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {94, 3823},
/*h(73)=6 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {73, 6060},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(10)=9 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {10, 6061},
/*h(44)=10 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {44, 6092},
/*h(78)=11 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {78, 6087},
/*h(57)=12 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {57, 5713},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(28)=16 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {28, 3826},
/*h(62)=17 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {62, 3827},
/*h(41)=18 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {41, 6064},
/*empty slot1 */ {0,0},
/*h(88)=20 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {88, 5709},
/*empty slot1 */ {0,0},
/*h(12)=22 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {12, 6090},
/*h(46)=23 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {46, 6091},
/*h(25)=24 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {25, 5711},
/*h(93)=25 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {93, 3824},
/*h(72)=26 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {72, 6060},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(30)=29 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {30, 3825},
/*h(9)=30 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {9, 6062},
/*h(77)=31 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {77, 6088},
/*h(56)=32 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {56, 5713},
/*h(90)=33 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {90, 5708},
/*empty slot1 */ {0,0},
/*h(14)=35 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {14, 6089},
/*empty slot1 */ {0,0},
/*h(61)=37 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {61, 3828},
/*h(40)=38 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {40, 6064},
/*h(74)=39 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {74, 6059},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(45)=43 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {45, 6092},
/*h(24)=44 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {24, 5711},
/*h(58)=45 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {58, 5712},
/*h(92)=46 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {92, 3824},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(29)=49 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {29, 3826},
/*h(8)=50 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0  ESIZE_32_BITS() NELEM_FULL()*/ {8, 6062},
/*h(42)=51 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {42, 6063},
/*h(76)=52 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {76, 6088},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 54ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(233)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 233;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_1_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2296)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2296, 4811},
/*h(699)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {699, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_2_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2762)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_4_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3228)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3228;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_6_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2796)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2796, 4812},
/*h(2186)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2186, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3262)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3262;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2220)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2220;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_11_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(712)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1178)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1178;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_14_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2254)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2254, 4810},
/*h(3241)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3241, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_15_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(746)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {746, 4813},
/*h(136)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {136, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_16_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1212)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1212, 4808},
/*h(2809)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2809, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_18_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3275)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3275;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_19_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(170)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 170;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1246)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1246, 4808},
/*h(2233)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2233, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2699)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2699;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_22_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(958)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR  ZEROING=0 MASK=0*/ {4762}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 958;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(204)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 204;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_24_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(670)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {670, 4812},
/*h(2267)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2267, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_26_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1225)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1225;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_27_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(238)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 238;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3288)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3288;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1259)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1259, 4809},
/*h(649)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {649, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2712)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_32_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3322)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3322;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(217)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 217;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_34_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2280)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2280, 4811},
/*h(683)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {683, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_35_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2746)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_36_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3212)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3212;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_37_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(251)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 251;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(950)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR  ZEROING=0 MASK=0*/ {4783}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 950;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_39_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2780)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2780;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3246)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3246, 4808},
/*h(1272)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1272, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_43_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2814)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2814, 4812},
/*h(2204)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2204, 4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(696)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 696;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_45_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1162)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1162;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_46_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3225)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3225;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_47_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2238)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2238;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(730)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_49_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1196)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1196, 4808},
/*h(2793)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2793, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_50_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3259)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3259;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_52_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(764)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {764, 4812},
/*h(154)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {154, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_53_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1230)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1230, 4808},
/*h(2217)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2217, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_55_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(188)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 188;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_57_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(654)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {654, 4812},
/*h(2251)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2251, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_59_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(222)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {222, 4810},
/*h(1209)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1209, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3272)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3272;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1243)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1243;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_64_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3306)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3306, 4809},
/*h(2696)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2696, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_66_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(201)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 201;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_67_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2264)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2264, 4811},
/*h(667)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {667, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2730)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2730;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_69_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(235)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 235;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_71_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2298)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2298;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_72_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2764)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2764;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(3230)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3230, 4808},
/*h(1256)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1256, 4809},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_75_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2188)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2188;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_76_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2798)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2798;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_77_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(680)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 680;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_79_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2222)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2222, 4810},
/*h(3209)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3209, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_80_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(248)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 248;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(714)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 714;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_82_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1180)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1180, 4808},
/*h(2777)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2777, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_83_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3243)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3243;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_84_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(138)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 138;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_85_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(748)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 748;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1214)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1214, 4808},
/*h(2201)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2201, 4811},
/*h(2811)=2 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2811, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(172)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 172;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_89_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2235)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2235;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(206)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {206, 4810},
/*h(1193)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1193, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3256)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3256;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(761)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 761;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_96_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1227)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1227;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_97_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3290)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3290;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_98_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(185)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 185;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_99_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(651)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 651;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2248)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2248;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_101_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3324)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3324, 4808},
/*h(2714)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2714, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_102_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(219)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 219;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_103_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2282)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2282;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2748)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2748;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1240)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1240, 4809},
/*h(3214)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3214, 4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_108_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2782)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2782;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1274)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1274, 4809},
/*h(664)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {664, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2206)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2206, 4810},
/*h(232)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {232, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(698)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 698;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_115_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1164)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1164, 4808},
/*h(2761)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2761, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_116_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3227)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3227;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_117_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(732)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 732;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_118_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1198)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1198, 4808},
/*h(2185)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2185, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_119_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2795)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2795;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_121_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(156)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {156, 4810},
/*h(766)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {766, 4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2219)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2219;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(190)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {190, 4810},
/*h(1177)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1177, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_126_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3240)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3240;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_127_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(745)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 745;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_129_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2808)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2808, 4813},
/*h(1211)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1211, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3274)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_131_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(169)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 169;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2232)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2232;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_133_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2698)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2698;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_134_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3308)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3308;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_135_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(203)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 203;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_136_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2266)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2266;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2732)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2732;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_139_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1224)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1224;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_140_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2300)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2300;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_141_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2766)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2766;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_142_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(648)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 648;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1258)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1258;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_144_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3321)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3321;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_145_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2190)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2190, 4810},
/*h(216)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {216, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_146_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(682)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 682;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_147_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2745)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2745;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_149_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3211)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3211, 4809},
/*h(250)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {250, 4811},
/*h(1470)=2 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR  ZEROING=0 MASK=0*/ {1470, 4763}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_150_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(716)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 716;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_151_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1182)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1182, 4808},
/*h(2779)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2779, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_154_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(750)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {750, 4812},
/*h(140)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {140, 4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_155_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2203)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2203;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_158_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(174)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {174, 4810},
/*h(1161)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1161, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_159_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3224)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3224;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_160_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(729)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 729;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_161_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2792)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2792, 4813},
/*h(1195)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1195, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3258)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3258;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_164_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(153)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {153, 4811},
/*h(763)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {763, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_165_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2216)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2216;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_166_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1462)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR  ZEROING=0 MASK=0*/ {1462, 4784},
/*h(3292)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3292, 4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 7) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_168_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(187)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 187;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_169_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2250)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2250;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_170_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3326)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3326, 4808},
/*h(2716)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2716, 4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_172_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1208)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1208;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2284)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2284;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_174_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2750)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2750;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_175_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1242)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_177_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3305)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3305;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(200)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 200;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_179_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(666)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {666, 4813},
/*h(1276)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1276, 4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_180_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2729)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2729;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(234)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 234;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(700)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {700, 4812},
/*h(2297)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2297, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_184_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1166)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1166, 4808},
/*h(2763)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2763, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_187_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(734)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 734;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2187)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2187;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_189_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(446)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR  ZEROING=0 MASK=0*/ {4761}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 446;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(158)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 158;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_191_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3208)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3208;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_193_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(713)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 713;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_194_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2776)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2776, 4813},
/*h(1179)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1179, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3242)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_197_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(747)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {747, 4813},
/*h(137)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {137, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2810)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2810, 4813},
/*h(2200)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2200, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_199_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3276)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3276;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_201_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(171)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 171;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2234)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2234;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_203_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2700)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2700, 4812},
/*h(3310)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3310, 4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_204_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1192)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1192;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_205_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(438)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR  ZEROING=0 MASK=0*/ {4782}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 438;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_206_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2268)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2268;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_207_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(760)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {760, 4813},
/*h(2734)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2734, 4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1226)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1226;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_209_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2302)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2302, 4810},
/*h(3289)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3289, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_211_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(184)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 184;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_212_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1260)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1260, 4808},
/*h(650)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {650, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_213_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3323)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3323, 4809},
/*h(2713)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2713, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_215_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(218)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 218;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_216_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(684)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {684, 4812},
/*h(2281)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2281, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_217_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2747)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2747;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_218_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(252)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 252;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_220_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(718)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 718;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_222_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1273)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1273;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_223_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(142)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 142;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_226_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(697)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 697;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_227_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2760)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2760, 4813},
/*h(1163)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1163, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_228_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3226)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3226;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_230_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(731)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 731;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_231_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2184)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2184, 4811},
/*h(2794)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2794, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_232_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3260)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3260;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_233_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(155)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 155;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_235_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2218)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2218;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_236_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3294)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3294;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_237_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1176)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1176;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_238_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2252)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2252;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_240_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2718)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2718, 4812},
/*h(744)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {744, 4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_241_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1210)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_242_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2286)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2286, 4810},
/*h(3273)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3273, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_243_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(168)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 168;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_245_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1244)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1244;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_246_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2697)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2697, 4813},
/*h(3307)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3307, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(202)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 202;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_248_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(668)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 668;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_249_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1278)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1278, 4808},
/*h(2265)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2265, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_250_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2731)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2731;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_251_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(236)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 236;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_252_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(702)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {702, 4812},
/*h(2299)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2299, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_255_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1257)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1257;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_256_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3320)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3320;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_259_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(681)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 681;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_260_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2744)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2744;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_261_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3210)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3210, 4809},
/*h(249)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {249, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_262_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(715)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 715;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_264_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2778)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2778;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_265_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3244)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3244;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_266_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(139)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 139;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_267_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2202)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2202;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_268_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2812)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2812;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_269_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3278)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3278;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_270_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1160)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1160;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_271_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2236)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2236;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_272_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2702)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4812}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2702;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_273_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(728)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 728;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_274_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1194)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1194;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_275_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2270)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2270, 4810},
/*h(3257)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3257, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_276_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(762)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {762, 4813},
/*h(152)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {152, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_278_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1228)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1228;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_279_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3291)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3291;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_280_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(186)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 186;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_281_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(652)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {652, 4812},
/*h(2249)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2249, 4811},
/*h(1262)=2 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1262, 4808}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_282_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2715)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2715;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_284_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(220)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4810}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 220;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_285_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(686)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {686, 4812},
/*h(2283)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2283, 4811}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(254)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {254, 4810},
/*h(1241)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1241, 4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_289_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3304)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3304;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_291_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(665)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 665;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_292_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1275)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4809}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1275;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2_293_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2728)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4813}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2728;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x28_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[294] = {
/*h(233)=0 */ {233, xed3_phash_find_map0x0F38_opcode0x28_vv2_0_l1},
/*h(2296)=1 */ {2296, xed3_phash_find_map0x0F38_opcode0x28_vv2_1_l1},
/*h(2762)=2 */ {2762, xed3_phash_find_map0x0F38_opcode0x28_vv2_2_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3228)=4 */ {3228, xed3_phash_find_map0x0F38_opcode0x28_vv2_4_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2186)=6 */ {2186, xed3_phash_find_map0x0F38_opcode0x28_vv2_6_l1},
/*h(3262)=7 */ {3262, xed3_phash_find_map0x0F38_opcode0x28_vv2_7_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2220)=10 */ {2220, xed3_phash_find_map0x0F38_opcode0x28_vv2_10_l1},
/*h(712)=11 */ {712, xed3_phash_find_map0x0F38_opcode0x28_vv2_11_l1},
/*h(1178)=12 */ {1178, xed3_phash_find_map0x0F38_opcode0x28_vv2_12_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2254)=14 */ {2254, xed3_phash_find_map0x0F38_opcode0x28_vv2_14_l1},
/*h(746)=15 */ {746, xed3_phash_find_map0x0F38_opcode0x28_vv2_15_l1},
/*h(2809)=16 */ {2809, xed3_phash_find_map0x0F38_opcode0x28_vv2_16_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3275)=18 */ {3275, xed3_phash_find_map0x0F38_opcode0x28_vv2_18_l1},
/*h(170)=19 */ {170, xed3_phash_find_map0x0F38_opcode0x28_vv2_19_l1},
/*h(2233)=20 */ {2233, xed3_phash_find_map0x0F38_opcode0x28_vv2_20_l1},
/*h(2699)=21 */ {2699, xed3_phash_find_map0x0F38_opcode0x28_vv2_21_l1},
/*h(958)=22 */ {958, xed3_phash_find_map0x0F38_opcode0x28_vv2_22_l1},
/*h(204)=23 */ {204, xed3_phash_find_map0x0F38_opcode0x28_vv2_23_l1},
/*h(670)=24 */ {670, xed3_phash_find_map0x0F38_opcode0x28_vv2_24_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1225)=26 */ {1225, xed3_phash_find_map0x0F38_opcode0x28_vv2_26_l1},
/*h(238)=27 */ {238, xed3_phash_find_map0x0F38_opcode0x28_vv2_27_l1},
/*h(3288)=28 */ {3288, xed3_phash_find_map0x0F38_opcode0x28_vv2_28_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1259)=30 */ {1259, xed3_phash_find_map0x0F38_opcode0x28_vv2_30_l1},
/*h(2712)=31 */ {2712, xed3_phash_find_map0x0F38_opcode0x28_vv2_31_l1},
/*h(3322)=32 */ {3322, xed3_phash_find_map0x0F38_opcode0x28_vv2_32_l1},
/*h(217)=33 */ {217, xed3_phash_find_map0x0F38_opcode0x28_vv2_33_l1},
/*h(2280)=34 */ {2280, xed3_phash_find_map0x0F38_opcode0x28_vv2_34_l1},
/*h(2746)=35 */ {2746, xed3_phash_find_map0x0F38_opcode0x28_vv2_35_l1},
/*h(3212)=36 */ {3212, xed3_phash_find_map0x0F38_opcode0x28_vv2_36_l1},
/*h(251)=37 */ {251, xed3_phash_find_map0x0F38_opcode0x28_vv2_37_l1},
/*h(950)=38 */ {950, xed3_phash_find_map0x0F38_opcode0x28_vv2_38_l1},
/*h(2780)=39 */ {2780, xed3_phash_find_map0x0F38_opcode0x28_vv2_39_l1},
/*h(3246)=40 */ {3246, xed3_phash_find_map0x0F38_opcode0x28_vv2_40_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2204)=43 */ {2204, xed3_phash_find_map0x0F38_opcode0x28_vv2_43_l1},
/*h(696)=44 */ {696, xed3_phash_find_map0x0F38_opcode0x28_vv2_44_l1},
/*h(1162)=45 */ {1162, xed3_phash_find_map0x0F38_opcode0x28_vv2_45_l1},
/*h(3225)=46 */ {3225, xed3_phash_find_map0x0F38_opcode0x28_vv2_46_l1},
/*h(2238)=47 */ {2238, xed3_phash_find_map0x0F38_opcode0x28_vv2_47_l1},
/*h(730)=48 */ {730, xed3_phash_find_map0x0F38_opcode0x28_vv2_48_l1},
/*h(2793)=49 */ {2793, xed3_phash_find_map0x0F38_opcode0x28_vv2_49_l1},
/*h(3259)=50 */ {3259, xed3_phash_find_map0x0F38_opcode0x28_vv2_50_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(764)=52 */ {764, xed3_phash_find_map0x0F38_opcode0x28_vv2_52_l1},
/*h(1230)=53 */ {1230, xed3_phash_find_map0x0F38_opcode0x28_vv2_53_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(188)=55 */ {188, xed3_phash_find_map0x0F38_opcode0x28_vv2_55_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(654)=57 */ {654, xed3_phash_find_map0x0F38_opcode0x28_vv2_57_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1209)=59 */ {1209, xed3_phash_find_map0x0F38_opcode0x28_vv2_59_l1},
/*h(3272)=60 */ {3272, xed3_phash_find_map0x0F38_opcode0x28_vv2_60_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1243)=63 */ {1243, xed3_phash_find_map0x0F38_opcode0x28_vv2_63_l1},
/*h(3306)=64 */ {3306, xed3_phash_find_map0x0F38_opcode0x28_vv2_64_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(201)=66 */ {201, xed3_phash_find_map0x0F38_opcode0x28_vv2_66_l1},
/*h(2264)=67 */ {2264, xed3_phash_find_map0x0F38_opcode0x28_vv2_67_l1},
/*h(2730)=68 */ {2730, xed3_phash_find_map0x0F38_opcode0x28_vv2_68_l1},
/*h(235)=69 */ {235, xed3_phash_find_map0x0F38_opcode0x28_vv2_69_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2298)=71 */ {2298, xed3_phash_find_map0x0F38_opcode0x28_vv2_71_l1},
/*h(2764)=72 */ {2764, xed3_phash_find_map0x0F38_opcode0x28_vv2_72_l1},
/*h(1256)=73 */ {1256, xed3_phash_find_map0x0F38_opcode0x28_vv2_73_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2188)=75 */ {2188, xed3_phash_find_map0x0F38_opcode0x28_vv2_75_l1},
/*h(2798)=76 */ {2798, xed3_phash_find_map0x0F38_opcode0x28_vv2_76_l1},
/*h(680)=77 */ {680, xed3_phash_find_map0x0F38_opcode0x28_vv2_77_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3209)=79 */ {3209, xed3_phash_find_map0x0F38_opcode0x28_vv2_79_l1},
/*h(248)=80 */ {248, xed3_phash_find_map0x0F38_opcode0x28_vv2_80_l1},
/*h(714)=81 */ {714, xed3_phash_find_map0x0F38_opcode0x28_vv2_81_l1},
/*h(2777)=82 */ {2777, xed3_phash_find_map0x0F38_opcode0x28_vv2_82_l1},
/*h(3243)=83 */ {3243, xed3_phash_find_map0x0F38_opcode0x28_vv2_83_l1},
/*h(138)=84 */ {138, xed3_phash_find_map0x0F38_opcode0x28_vv2_84_l1},
/*h(748)=85 */ {748, xed3_phash_find_map0x0F38_opcode0x28_vv2_85_l1},
/*h(2811)=86 */ {2811, xed3_phash_find_map0x0F38_opcode0x28_vv2_86_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(172)=88 */ {172, xed3_phash_find_map0x0F38_opcode0x28_vv2_88_l1},
/*h(2235)=89 */ {2235, xed3_phash_find_map0x0F38_opcode0x28_vv2_89_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1193)=92 */ {1193, xed3_phash_find_map0x0F38_opcode0x28_vv2_92_l1},
/*h(3256)=93 */ {3256, xed3_phash_find_map0x0F38_opcode0x28_vv2_93_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(761)=95 */ {761, xed3_phash_find_map0x0F38_opcode0x28_vv2_95_l1},
/*h(1227)=96 */ {1227, xed3_phash_find_map0x0F38_opcode0x28_vv2_96_l1},
/*h(3290)=97 */ {3290, xed3_phash_find_map0x0F38_opcode0x28_vv2_97_l1},
/*h(185)=98 */ {185, xed3_phash_find_map0x0F38_opcode0x28_vv2_98_l1},
/*h(651)=99 */ {651, xed3_phash_find_map0x0F38_opcode0x28_vv2_99_l1},
/*h(2248)=100 */ {2248, xed3_phash_find_map0x0F38_opcode0x28_vv2_100_l1},
/*h(3324)=101 */ {3324, xed3_phash_find_map0x0F38_opcode0x28_vv2_101_l1},
/*h(219)=102 */ {219, xed3_phash_find_map0x0F38_opcode0x28_vv2_102_l1},
/*h(2282)=103 */ {2282, xed3_phash_find_map0x0F38_opcode0x28_vv2_103_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2748)=105 */ {2748, xed3_phash_find_map0x0F38_opcode0x28_vv2_105_l1},
/*h(1240)=106 */ {1240, xed3_phash_find_map0x0F38_opcode0x28_vv2_106_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2782)=108 */ {2782, xed3_phash_find_map0x0F38_opcode0x28_vv2_108_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(664)=110 */ {664, xed3_phash_find_map0x0F38_opcode0x28_vv2_110_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2206)=112 */ {2206, xed3_phash_find_map0x0F38_opcode0x28_vv2_112_l1},
/*h(698)=113 */ {698, xed3_phash_find_map0x0F38_opcode0x28_vv2_113_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2761)=115 */ {2761, xed3_phash_find_map0x0F38_opcode0x28_vv2_115_l1},
/*h(3227)=116 */ {3227, xed3_phash_find_map0x0F38_opcode0x28_vv2_116_l1},
/*h(732)=117 */ {732, xed3_phash_find_map0x0F38_opcode0x28_vv2_117_l1},
/*h(2185)=118 */ {2185, xed3_phash_find_map0x0F38_opcode0x28_vv2_118_l1},
/*h(2795)=119 */ {2795, xed3_phash_find_map0x0F38_opcode0x28_vv2_119_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(766)=121 */ {766, xed3_phash_find_map0x0F38_opcode0x28_vv2_121_l1},
/*h(2219)=122 */ {2219, xed3_phash_find_map0x0F38_opcode0x28_vv2_122_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(190)=125 */ {190, xed3_phash_find_map0x0F38_opcode0x28_vv2_125_l1},
/*h(3240)=126 */ {3240, xed3_phash_find_map0x0F38_opcode0x28_vv2_126_l1},
/*h(745)=127 */ {745, xed3_phash_find_map0x0F38_opcode0x28_vv2_127_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2808)=129 */ {2808, xed3_phash_find_map0x0F38_opcode0x28_vv2_129_l1},
/*h(3274)=130 */ {3274, xed3_phash_find_map0x0F38_opcode0x28_vv2_130_l1},
/*h(169)=131 */ {169, xed3_phash_find_map0x0F38_opcode0x28_vv2_131_l1},
/*h(2232)=132 */ {2232, xed3_phash_find_map0x0F38_opcode0x28_vv2_132_l1},
/*h(2698)=133 */ {2698, xed3_phash_find_map0x0F38_opcode0x28_vv2_133_l1},
/*h(3308)=134 */ {3308, xed3_phash_find_map0x0F38_opcode0x28_vv2_134_l1},
/*h(203)=135 */ {203, xed3_phash_find_map0x0F38_opcode0x28_vv2_135_l1},
/*h(2266)=136 */ {2266, xed3_phash_find_map0x0F38_opcode0x28_vv2_136_l1},
/*h(2732)=137 */ {2732, xed3_phash_find_map0x0F38_opcode0x28_vv2_137_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1224)=139 */ {1224, xed3_phash_find_map0x0F38_opcode0x28_vv2_139_l1},
/*h(2300)=140 */ {2300, xed3_phash_find_map0x0F38_opcode0x28_vv2_140_l1},
/*h(2766)=141 */ {2766, xed3_phash_find_map0x0F38_opcode0x28_vv2_141_l1},
/*h(648)=142 */ {648, xed3_phash_find_map0x0F38_opcode0x28_vv2_142_l1},
/*h(1258)=143 */ {1258, xed3_phash_find_map0x0F38_opcode0x28_vv2_143_l1},
/*h(3321)=144 */ {3321, xed3_phash_find_map0x0F38_opcode0x28_vv2_144_l1},
/*h(216)=145 */ {216, xed3_phash_find_map0x0F38_opcode0x28_vv2_145_l1},
/*h(682)=146 */ {682, xed3_phash_find_map0x0F38_opcode0x28_vv2_146_l1},
/*h(2745)=147 */ {2745, xed3_phash_find_map0x0F38_opcode0x28_vv2_147_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(250)=149 */ {250, xed3_phash_find_map0x0F38_opcode0x28_vv2_149_l1},
/*h(716)=150 */ {716, xed3_phash_find_map0x0F38_opcode0x28_vv2_150_l1},
/*h(1182)=151 */ {1182, xed3_phash_find_map0x0F38_opcode0x28_vv2_151_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(140)=154 */ {140, xed3_phash_find_map0x0F38_opcode0x28_vv2_154_l1},
/*h(2203)=155 */ {2203, xed3_phash_find_map0x0F38_opcode0x28_vv2_155_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(174)=158 */ {174, xed3_phash_find_map0x0F38_opcode0x28_vv2_158_l1},
/*h(3224)=159 */ {3224, xed3_phash_find_map0x0F38_opcode0x28_vv2_159_l1},
/*h(729)=160 */ {729, xed3_phash_find_map0x0F38_opcode0x28_vv2_160_l1},
/*h(2792)=161 */ {2792, xed3_phash_find_map0x0F38_opcode0x28_vv2_161_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3258)=163 */ {3258, xed3_phash_find_map0x0F38_opcode0x28_vv2_163_l1},
/*h(763)=164 */ {763, xed3_phash_find_map0x0F38_opcode0x28_vv2_164_l1},
/*h(2216)=165 */ {2216, xed3_phash_find_map0x0F38_opcode0x28_vv2_165_l1},
/*h(1462)=166 */ {1462, xed3_phash_find_map0x0F38_opcode0x28_vv2_166_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(187)=168 */ {187, xed3_phash_find_map0x0F38_opcode0x28_vv2_168_l1},
/*h(2250)=169 */ {2250, xed3_phash_find_map0x0F38_opcode0x28_vv2_169_l1},
/*h(2716)=170 */ {2716, xed3_phash_find_map0x0F38_opcode0x28_vv2_170_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1208)=172 */ {1208, xed3_phash_find_map0x0F38_opcode0x28_vv2_172_l1},
/*h(2284)=173 */ {2284, xed3_phash_find_map0x0F38_opcode0x28_vv2_173_l1},
/*h(2750)=174 */ {2750, xed3_phash_find_map0x0F38_opcode0x28_vv2_174_l1},
/*h(1242)=175 */ {1242, xed3_phash_find_map0x0F38_opcode0x28_vv2_175_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3305)=177 */ {3305, xed3_phash_find_map0x0F38_opcode0x28_vv2_177_l1},
/*h(200)=178 */ {200, xed3_phash_find_map0x0F38_opcode0x28_vv2_178_l1},
/*h(1276)=179 */ {1276, xed3_phash_find_map0x0F38_opcode0x28_vv2_179_l1},
/*h(2729)=180 */ {2729, xed3_phash_find_map0x0F38_opcode0x28_vv2_180_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(234)=182 */ {234, xed3_phash_find_map0x0F38_opcode0x28_vv2_182_l1},
/*h(2297)=183 */ {2297, xed3_phash_find_map0x0F38_opcode0x28_vv2_183_l1},
/*h(1166)=184 */ {1166, xed3_phash_find_map0x0F38_opcode0x28_vv2_184_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(734)=187 */ {734, xed3_phash_find_map0x0F38_opcode0x28_vv2_187_l1},
/*h(2187)=188 */ {2187, xed3_phash_find_map0x0F38_opcode0x28_vv2_188_l1},
/*h(446)=189 */ {446, xed3_phash_find_map0x0F38_opcode0x28_vv2_189_l1},
/*h(158)=190 */ {158, xed3_phash_find_map0x0F38_opcode0x28_vv2_190_l1},
/*h(3208)=191 */ {3208, xed3_phash_find_map0x0F38_opcode0x28_vv2_191_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(713)=193 */ {713, xed3_phash_find_map0x0F38_opcode0x28_vv2_193_l1},
/*h(2776)=194 */ {2776, xed3_phash_find_map0x0F38_opcode0x28_vv2_194_l1},
/*h(3242)=195 */ {3242, xed3_phash_find_map0x0F38_opcode0x28_vv2_195_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(747)=197 */ {747, xed3_phash_find_map0x0F38_opcode0x28_vv2_197_l1},
/*h(2810)=198 */ {2810, xed3_phash_find_map0x0F38_opcode0x28_vv2_198_l1},
/*h(3276)=199 */ {3276, xed3_phash_find_map0x0F38_opcode0x28_vv2_199_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(171)=201 */ {171, xed3_phash_find_map0x0F38_opcode0x28_vv2_201_l1},
/*h(2234)=202 */ {2234, xed3_phash_find_map0x0F38_opcode0x28_vv2_202_l1},
/*h(3310)=203 */ {3310, xed3_phash_find_map0x0F38_opcode0x28_vv2_203_l1},
/*h(1192)=204 */ {1192, xed3_phash_find_map0x0F38_opcode0x28_vv2_204_l1},
/*h(438)=205 */ {438, xed3_phash_find_map0x0F38_opcode0x28_vv2_205_l1},
/*h(2268)=206 */ {2268, xed3_phash_find_map0x0F38_opcode0x28_vv2_206_l1},
/*h(760)=207 */ {760, xed3_phash_find_map0x0F38_opcode0x28_vv2_207_l1},
/*h(1226)=208 */ {1226, xed3_phash_find_map0x0F38_opcode0x28_vv2_208_l1},
/*h(2302)=209 */ {2302, xed3_phash_find_map0x0F38_opcode0x28_vv2_209_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(184)=211 */ {184, xed3_phash_find_map0x0F38_opcode0x28_vv2_211_l1},
/*h(1260)=212 */ {1260, xed3_phash_find_map0x0F38_opcode0x28_vv2_212_l1},
/*h(3323)=213 */ {3323, xed3_phash_find_map0x0F38_opcode0x28_vv2_213_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(218)=215 */ {218, xed3_phash_find_map0x0F38_opcode0x28_vv2_215_l1},
/*h(684)=216 */ {684, xed3_phash_find_map0x0F38_opcode0x28_vv2_216_l1},
/*h(2747)=217 */ {2747, xed3_phash_find_map0x0F38_opcode0x28_vv2_217_l1},
/*h(252)=218 */ {252, xed3_phash_find_map0x0F38_opcode0x28_vv2_218_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(718)=220 */ {718, xed3_phash_find_map0x0F38_opcode0x28_vv2_220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1273)=222 */ {1273, xed3_phash_find_map0x0F38_opcode0x28_vv2_222_l1},
/*h(142)=223 */ {142, xed3_phash_find_map0x0F38_opcode0x28_vv2_223_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(697)=226 */ {697, xed3_phash_find_map0x0F38_opcode0x28_vv2_226_l1},
/*h(2760)=227 */ {2760, xed3_phash_find_map0x0F38_opcode0x28_vv2_227_l1},
/*h(3226)=228 */ {3226, xed3_phash_find_map0x0F38_opcode0x28_vv2_228_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(731)=230 */ {731, xed3_phash_find_map0x0F38_opcode0x28_vv2_230_l1},
/*h(2794)=231 */ {2794, xed3_phash_find_map0x0F38_opcode0x28_vv2_231_l1},
/*h(3260)=232 */ {3260, xed3_phash_find_map0x0F38_opcode0x28_vv2_232_l1},
/*h(155)=233 */ {155, xed3_phash_find_map0x0F38_opcode0x28_vv2_233_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2218)=235 */ {2218, xed3_phash_find_map0x0F38_opcode0x28_vv2_235_l1},
/*h(3294)=236 */ {3294, xed3_phash_find_map0x0F38_opcode0x28_vv2_236_l1},
/*h(1176)=237 */ {1176, xed3_phash_find_map0x0F38_opcode0x28_vv2_237_l1},
/*h(2252)=238 */ {2252, xed3_phash_find_map0x0F38_opcode0x28_vv2_238_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(744)=240 */ {744, xed3_phash_find_map0x0F38_opcode0x28_vv2_240_l1},
/*h(1210)=241 */ {1210, xed3_phash_find_map0x0F38_opcode0x28_vv2_241_l1},
/*h(2286)=242 */ {2286, xed3_phash_find_map0x0F38_opcode0x28_vv2_242_l1},
/*h(168)=243 */ {168, xed3_phash_find_map0x0F38_opcode0x28_vv2_243_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1244)=245 */ {1244, xed3_phash_find_map0x0F38_opcode0x28_vv2_245_l1},
/*h(3307)=246 */ {3307, xed3_phash_find_map0x0F38_opcode0x28_vv2_246_l1},
/*h(202)=247 */ {202, xed3_phash_find_map0x0F38_opcode0x28_vv2_247_l1},
/*h(668)=248 */ {668, xed3_phash_find_map0x0F38_opcode0x28_vv2_248_l1},
/*h(1278)=249 */ {1278, xed3_phash_find_map0x0F38_opcode0x28_vv2_249_l1},
/*h(2731)=250 */ {2731, xed3_phash_find_map0x0F38_opcode0x28_vv2_250_l1},
/*h(236)=251 */ {236, xed3_phash_find_map0x0F38_opcode0x28_vv2_251_l1},
/*h(2299)=252 */ {2299, xed3_phash_find_map0x0F38_opcode0x28_vv2_252_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1257)=255 */ {1257, xed3_phash_find_map0x0F38_opcode0x28_vv2_255_l1},
/*h(3320)=256 */ {3320, xed3_phash_find_map0x0F38_opcode0x28_vv2_256_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(681)=259 */ {681, xed3_phash_find_map0x0F38_opcode0x28_vv2_259_l1},
/*h(2744)=260 */ {2744, xed3_phash_find_map0x0F38_opcode0x28_vv2_260_l1},
/*h(249)=261 */ {249, xed3_phash_find_map0x0F38_opcode0x28_vv2_261_l1},
/*h(715)=262 */ {715, xed3_phash_find_map0x0F38_opcode0x28_vv2_262_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2778)=264 */ {2778, xed3_phash_find_map0x0F38_opcode0x28_vv2_264_l1},
/*h(3244)=265 */ {3244, xed3_phash_find_map0x0F38_opcode0x28_vv2_265_l1},
/*h(139)=266 */ {139, xed3_phash_find_map0x0F38_opcode0x28_vv2_266_l1},
/*h(2202)=267 */ {2202, xed3_phash_find_map0x0F38_opcode0x28_vv2_267_l1},
/*h(2812)=268 */ {2812, xed3_phash_find_map0x0F38_opcode0x28_vv2_268_l1},
/*h(3278)=269 */ {3278, xed3_phash_find_map0x0F38_opcode0x28_vv2_269_l1},
/*h(1160)=270 */ {1160, xed3_phash_find_map0x0F38_opcode0x28_vv2_270_l1},
/*h(2236)=271 */ {2236, xed3_phash_find_map0x0F38_opcode0x28_vv2_271_l1},
/*h(2702)=272 */ {2702, xed3_phash_find_map0x0F38_opcode0x28_vv2_272_l1},
/*h(728)=273 */ {728, xed3_phash_find_map0x0F38_opcode0x28_vv2_273_l1},
/*h(1194)=274 */ {1194, xed3_phash_find_map0x0F38_opcode0x28_vv2_274_l1},
/*h(3257)=275 */ {3257, xed3_phash_find_map0x0F38_opcode0x28_vv2_275_l1},
/*h(762)=276 */ {762, xed3_phash_find_map0x0F38_opcode0x28_vv2_276_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1228)=278 */ {1228, xed3_phash_find_map0x0F38_opcode0x28_vv2_278_l1},
/*h(3291)=279 */ {3291, xed3_phash_find_map0x0F38_opcode0x28_vv2_279_l1},
/*h(186)=280 */ {186, xed3_phash_find_map0x0F38_opcode0x28_vv2_280_l1},
/*h(2249)=281 */ {2249, xed3_phash_find_map0x0F38_opcode0x28_vv2_281_l1},
/*h(2715)=282 */ {2715, xed3_phash_find_map0x0F38_opcode0x28_vv2_282_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(220)=284 */ {220, xed3_phash_find_map0x0F38_opcode0x28_vv2_284_l1},
/*h(2283)=285 */ {2283, xed3_phash_find_map0x0F38_opcode0x28_vv2_285_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(254)=288 */ {254, xed3_phash_find_map0x0F38_opcode0x28_vv2_288_l1},
/*h(3304)=289 */ {3304, xed3_phash_find_map0x0F38_opcode0x28_vv2_289_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(665)=291 */ {665, xed3_phash_find_map0x0F38_opcode0x28_vv2_291_l1},
/*h(1275)=292 */ {1275, xed3_phash_find_map0x0F38_opcode0x28_vv2_292_l1},
/*h(2728)=293 */ {2728, xed3_phash_find_map0x0F38_opcode0x28_vv2_293_l1},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 294ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x29_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[300] = {
/*h(1198)=0 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1198, 4108},
/*empty slot1 */ {0,0},
/*h(1166)=2 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1166, 4108},
/*h(1273)=3 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1273, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1241)=6 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1241, 4109},
/*empty slot1 */ {0,0},
/*h(1209)=8 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1209, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1177)=11 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1177, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(760)=15 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {760, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(728)=18 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {728, 4113},
/*h(236)=19 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {236, 4110},
/*h(696)=20 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {696, 4113},
/*h(204)=21 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {204, 4110},
/*empty slot1 */ {0,0},
/*h(664)=23 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {664, 4113},
/*h(172)=24 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {172, 4110},
/*empty slot1 */ {0,0},
/*h(140)=26 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {140, 4110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1274)=31 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1274, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1242)=34 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1242, 4109},
/*h(750)=35 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {750, 4112},
/*h(1210)=36 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1210, 4109},
/*h(718)=37 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {718, 4112},
/*empty slot1 */ {0,0},
/*h(1178)=39 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1178, 4109},
/*h(686)=40 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {686, 4112},
/*empty slot1 */ {0,0},
/*h(654)=42 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {654, 4112},
/*h(761)=43 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {761, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(729)=46 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {729, 4113},
/*empty slot1 */ {0,0},
/*h(697)=48 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {697, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(665)=51 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {665, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(248)=55 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {248, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=58 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {216, 4111},
/*h(1275)=59 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1275, 4109},
/*h(184)=60 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {184, 4111},
/*empty slot1 */ {0,0},
/*h(1243)=62 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1243, 4109},
/*h(152)=63 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {152, 4111},
/*h(1211)=64 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1211, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1179)=67 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1179, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(762)=71 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {762, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(730)=74 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {730, 4113},
/*h(238)=75 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {238, 4110},
/*h(698)=76 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {698, 4113},
/*h(206)=77 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {206, 4110},
/*empty slot1 */ {0,0},
/*h(666)=79 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {666, 4113},
/*h(174)=80 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {174, 4110},
/*empty slot1 */ {0,0},
/*h(142)=82 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {142, 4110},
/*h(249)=83 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {249, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(217)=86 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {217, 4111},
/*h(1276)=87 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1276, 4108},
/*h(185)=88 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {185, 4111},
/*empty slot1 */ {0,0},
/*h(1244)=90 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1244, 4108},
/*h(153)=91 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {153, 4111},
/*h(1212)=92 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1212, 4108},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1180)=95 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1180, 4108},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(763)=99 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {763, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(731)=102 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {731, 4113},
/*empty slot1 */ {0,0},
/*h(699)=104 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {699, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(667)=107 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {667, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(250)=111 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {250, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(218)=114 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {218, 4111},
/*empty slot1 */ {0,0},
/*h(186)=116 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {186, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(154)=119 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {154, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1256)=126 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1256, 4109},
/*h(764)=127 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {764, 4112},
/*h(1470)=128 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR  ZEROING=0 MASK=0*/ {1470, 4718},
/*h(1224)=129 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1224, 4109},
/*h(732)=130 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {732, 4112},
/*h(1192)=131 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1192, 4109},
/*h(700)=132 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {700, 4112},
/*empty slot1 */ {0,0},
/*h(1160)=134 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1160, 4109},
/*h(668)=135 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {668, 4112},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(251)=139 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {251, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(219)=142 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {219, 4111},
/*h(1278)=143 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1278, 4108},
/*h(187)=144 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {187, 4111},
/*empty slot1 */ {0,0},
/*h(1246)=146 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1246, 4108},
/*h(155)=147 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {155, 4111},
/*h(1214)=148 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1214, 4108},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1182)=151 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1182, 4108},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1257)=154 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1257, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1225)=157 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1225, 4109},
/*empty slot1 */ {0,0},
/*h(1193)=159 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1193, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1161)=162 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1161, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(744)=166 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {744, 4113},
/*h(252)=167 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {252, 4110},
/*h(958)=168 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR  ZEROING=0 MASK=0*/ {958, 4717},
/*h(712)=169 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {712, 4113},
/*h(220)=170 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {220, 4110},
/*h(680)=171 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {680, 4113},
/*h(188)=172 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {188, 4110},
/*empty slot1 */ {0,0},
/*h(648)=174 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {648, 4113},
/*h(156)=175 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {156, 4110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1258)=182 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1258, 4109},
/*h(766)=183 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {766, 4112},
/*empty slot1 */ {0,0},
/*h(1226)=185 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1226, 4109},
/*h(734)=186 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {734, 4112},
/*h(1194)=187 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1194, 4109},
/*h(702)=188 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {702, 4112},
/*empty slot1 */ {0,0},
/*h(1162)=190 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1162, 4109},
/*h(670)=191 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {670, 4112},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(745)=194 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {745, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(713)=197 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {713, 4113},
/*empty slot1 */ {0,0},
/*h(681)=199 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {681, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(649)=202 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {649, 4113},
/*empty slot1 */ {0,0},
/*h(1462)=204 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR  ZEROING=0 MASK=0*/ {1462, 4525},
/*empty slot1 */ {0,0},
/*h(232)=206 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {232, 4111},
/*empty slot1 */ {0,0},
/*h(446)=208 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR  ZEROING=0 MASK=0*/ {446, 4716},
/*h(200)=209 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {200, 4111},
/*h(1259)=210 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1259, 4109},
/*h(168)=211 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {168, 4111},
/*empty slot1 */ {0,0},
/*h(1227)=213 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1227, 4109},
/*h(136)=214 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {136, 4111},
/*h(1195)=215 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1195, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1163)=218 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1163, 4109},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(746)=222 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {746, 4113},
/*h(254)=223 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {254, 4110},
/*empty slot1 */ {0,0},
/*h(714)=225 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {714, 4113},
/*h(222)=226 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {222, 4110},
/*h(682)=227 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {682, 4113},
/*h(190)=228 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {190, 4110},
/*empty slot1 */ {0,0},
/*h(650)=230 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {650, 4113},
/*h(158)=231 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {158, 4110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(233)=234 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {233, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(201)=237 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {201, 4111},
/*h(1260)=238 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1260, 4108},
/*h(169)=239 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {169, 4111},
/*empty slot1 */ {0,0},
/*h(1228)=241 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1228, 4108},
/*h(137)=242 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {137, 4111},
/*h(1196)=243 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1196, 4108},
/*h(950)=244 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR  ZEROING=0 MASK=0*/ {950, 4524},
/*empty slot1 */ {0,0},
/*h(1164)=246 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1164, 4108},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(747)=250 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {747, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(715)=253 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {715, 4113},
/*empty slot1 */ {0,0},
/*h(683)=255 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {683, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(651)=258 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {651, 4113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(234)=262 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {234, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(202)=265 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {202, 4111},
/*empty slot1 */ {0,0},
/*h(170)=267 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {170, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(138)=270 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {138, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1272)=275 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1272, 4109},
/*empty slot1 */ {0,0},
/*h(1240)=277 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1240, 4109},
/*h(748)=278 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {748, 4112},
/*empty slot1 */ {0,0},
/*h(1208)=280 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1208, 4109},
/*h(716)=281 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {716, 4112},
/*h(1176)=282 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {1176, 4109},
/*h(684)=283 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {684, 4112},
/*h(438)=284 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR  ZEROING=0 MASK=0*/ {438, 4523},
/*empty slot1 */ {0,0},
/*h(652)=286 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {652, 4112},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(235)=290 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {235, 4111},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(203)=293 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {203, 4111},
/*h(1262)=294 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1262, 4108},
/*h(171)=295 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {171, 4111},
/*empty slot1 */ {0,0},
/*h(1230)=297 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {1230, 4108},
/*h(139)=298 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {139, 4111},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((28*key % 599) % 300);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(690)=0 EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {690, 4294},
/*h(178)=1 EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {178, 4293},
/*h(1470)=2 EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR  ZEROING=0 MASK=0*/ {1470, 6188},
/*h(958)=3 EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR  ZEROING=0 MASK=0*/ {958, 6190},
/*h(446)=4 EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR  ZEROING=0 MASK=0*/ {446, 6189},
/*h(1202)=5 EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 MASK=0  ESIZE_32_BITS() NELEM_FULLMEM()*/ {1202, 4292}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5822},
/*h(10)=3 EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5817},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5820},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5822},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5818},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5820},
/*h(74)=13 EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5821},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5818},
/*h(42)=17 EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5819}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4138},
/*h(14)=1 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4104},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4137},
/*h(15)=4 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 4102},
/*h(111)=5 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 4102},
/*h(43)=6 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 4133},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4107},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4134},
/*h(45)=12 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4107},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4134},
/*h(46)=15 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4106},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4132},
/*h(47)=18 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 4102},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 4133},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4103},
/*h(8)=24 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4136},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4103},
/*h(9)=27 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4136},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4101},
/*h(10)=30 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4135},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 4102},
/*h(11)=33 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 4133},
/*h(107)=34 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 4133},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4105},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4138},
/*h(13)=39 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4105},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x2d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 6530},
/*h(15)=2 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 6505},
/*h(12)=3 EVV 0x2D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 6506},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 6504},
/*h(11)=6 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 6531},
/*h(8)=7 EVV 0x2D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 6532}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x30_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4986},
/*h(1498)=1 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4986},
/*h(728)=2 EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {728, 4989},
/*h(218)=3 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4984},
/*h(1242)=4 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4984},
/*h(472)=5 EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {472, 4987},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_HALFMEM()*/ {216, 4985},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4988},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1624, 4919},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1368, 4917},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1112, 4915},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 4918},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 4916},
/*h(600)=30 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {600, 4919},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 4914},
/*h(344)=33 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {344, 4917},
/*h(1628)=34 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1628, 4919},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {88, 4915},
/*h(1372)=37 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1372, 4917},
/*h(602)=38 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 4918},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {1116, 4915},
/*h(346)=41 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 4916},
/*h(1630)=42 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 4918},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 4914},
/*h(1374)=45 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 4916},
/*h(604)=46 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {604, 4919},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 4914},
/*h(348)=49 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {348, 4917},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_HALFMEM()*/ {92, 4915},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 4918},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 4916},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 4914},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4988},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x31_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 3944},
/*h(1498)=1 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 3944},
/*h(728)=2 EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {728, 3941},
/*h(218)=3 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 3942},
/*h(1242)=4 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 3942},
/*h(472)=5 EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {472, 3945},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {216, 3943},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 3940},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1624, 4485},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1368, 4489},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1112, 4487},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 4484},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 4488},
/*h(600)=30 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {600, 4485},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 4486},
/*h(344)=33 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {344, 4489},
/*h(1628)=34 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1628, 4485},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {88, 4487},
/*h(1372)=37 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1372, 4489},
/*h(602)=38 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 4484},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1116, 4487},
/*h(346)=41 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 4488},
/*h(1630)=42 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 4484},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 4486},
/*h(1374)=45 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 4488},
/*h(604)=46 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {604, 4485},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 4486},
/*h(348)=49 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {348, 4489},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {92, 4487},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 4484},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 4488},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 4486},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 3940},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x32_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6703},
/*h(1498)=1 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 6703},
/*h(728)=2 EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {728, 6700},
/*h(218)=3 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6701},
/*h(1242)=4 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 6701},
/*h(472)=5 EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {472, 6704},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {216, 6702},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6699},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1624, 4645},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1368, 4649},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1112, 4647},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 4644},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 4648},
/*h(600)=30 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {600, 4645},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 4646},
/*h(344)=33 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {344, 4649},
/*h(1628)=34 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1628, 4645},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {88, 4647},
/*h(1372)=37 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1372, 4649},
/*h(602)=38 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 4644},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1116, 4647},
/*h(346)=41 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 4648},
/*h(1630)=42 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 4644},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 4646},
/*h(1374)=45 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 4648},
/*h(604)=46 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {604, 4645},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 4646},
/*h(348)=49 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {348, 4649},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {92, 4647},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 4644},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 4648},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 4646},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 6699},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x33_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 4008},
/*h(1498)=1 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 4008},
/*h(728)=2 EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {728, 4005},
/*h(218)=3 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 4006},
/*h(1242)=4 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 4006},
/*h(472)=5 EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {472, 4009},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_HALFMEM()*/ {216, 4007},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 4004},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1624, 5962},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1368, 5966},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1112, 5964},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 5961},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 5965},
/*h(600)=30 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 5962},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 5963},
/*h(344)=33 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 5966},
/*h(1628)=34 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1628, 5962},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 5964},
/*h(1372)=37 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1372, 5966},
/*h(602)=38 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 5961},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {1116, 5964},
/*h(346)=41 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 5965},
/*h(1630)=42 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 5961},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 5963},
/*h(1374)=45 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 5965},
/*h(604)=46 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {604, 5962},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 5963},
/*h(348)=49 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {348, 5966},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_HALFMEM()*/ {92, 5964},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 5961},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 5965},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 5963},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 4004},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x34_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[66] = {
/*h(474)=0 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6681},
/*h(1498)=1 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 6681},
/*h(728)=2 EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {728, 6678},
/*h(218)=3 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6679},
/*h(1242)=4 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 6679},
/*h(472)=5 EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {472, 6682},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(216)=8 EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {216, 6680},
/*empty slot1 */ {0,0},
/*h(730)=10 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6677},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1624)=18 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1624, 4075},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1368)=21 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1368, 4079},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1112)=24 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1112, 4077},
/*empty slot1 */ {0,0},
/*h(1626)=26 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1626, 4074},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1370)=29 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1370, 4078},
/*h(600)=30 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {600, 4075},
/*empty slot1 */ {0,0},
/*h(1114)=32 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1114, 4076},
/*h(344)=33 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {344, 4079},
/*h(1628)=34 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1628, 4075},
/*empty slot1 */ {0,0},
/*h(88)=36 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {88, 4077},
/*h(1372)=37 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1372, 4079},
/*h(602)=38 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {602, 4074},
/*empty slot1 */ {0,0},
/*h(1116)=40 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1116, 4077},
/*h(346)=41 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {346, 4078},
/*h(1630)=42 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {1630, 4074},
/*empty slot1 */ {0,0},
/*h(90)=44 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {90, 4076},
/*h(1374)=45 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {1374, 4078},
/*h(604)=46 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {604, 4075},
/*empty slot1 */ {0,0},
/*h(1118)=48 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {1118, 4076},
/*h(348)=49 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {348, 4079},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=52 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {92, 4077},
/*empty slot1 */ {0,0},
/*h(606)=54 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512    NOEVSR*/ {606, 4074},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(350)=57 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256    NOEVSR*/ {350, 4078},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(94)=60 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR*/ {94, 4076},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1754)=64 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 6677},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 79) % 66);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x35_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[31] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=2 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {600, 6241},
/*h(218)=3 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {218, 6707},
/*empty slot1 */ {0,0},
/*h(1624)=5 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {1624, 6241},
/*h(1242)=6 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1242, 6707},
/*empty slot1 */ {0,0},
/*h(602)=8 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6240},
/*h(344)=9 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {344, 6245},
/*empty slot1 */ {0,0},
/*h(1626)=11 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 6240},
/*h(1368)=12 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {1368, 6245},
/*empty slot1 */ {0,0},
/*h(728)=14 EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {728, 6706},
/*h(346)=15 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6244},
/*h(88)=16 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {88, 6243},
/*empty slot1 */ {0,0},
/*h(1370)=18 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 6244},
/*h(1112)=19 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_HALFMEM()*/ {1112, 6243},
/*h(730)=20 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {730, 6705},
/*h(472)=21 EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {472, 6710},
/*h(90)=22 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6242},
/*h(1754)=23 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1754, 6705},
/*empty slot1 */ {0,0},
/*h(1114)=25 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 6242},
/*empty slot1 */ {0,0},
/*h(474)=27 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {474, 6709},
/*h(216)=28 EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_HALFMEM()*/ {216, 6708},
/*empty slot1 */ {0,0},
/*h(1498)=30 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1498, 6709}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 31);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x36_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4023},
/*h(73)=1 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 3989},
/*h(77)=2 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4020},
/*h(41)=3 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 3991},
/*h(45)=4 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4024},
/*h(72)=5 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 3989},
/*h(76)=6 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4020},
/*h(40)=7 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 3991},
/*h(44)=8 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4024},
/*h(74)=9 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 3988},
/*h(78)=10 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4019},
/*h(42)=11 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 3990}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 43) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x37_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {76, 6606},
/*h(46)=1 EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0*/ {46, 6609},
/*h(12)=2 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {12, 6608},
/*h(77)=3 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {77, 6606},
/*h(13)=4 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {13, 6608},
/*h(78)=5 EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0*/ {78, 6605},
/*h(44)=6 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {44, 6610},
/*h(14)=7 EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0*/ {14, 6607},
/*h(45)=8 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0  ESIZE_64_BITS() NELEM_FULL()*/ {45, 6610}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x38_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[599] = {
/*h(1198)=0 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1198, 4376},
/*h(200)=1 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {200, 4373},
/*h(2796)=2 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2796, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2198)=5 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2198, 4372},
/*h(1200)=6 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1200, 4377},
/*h(202)=7 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {202, 4373},
/*h(2798)=8 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2798, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2200)=11 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2200, 4373},
/*h(1202)=12 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1202, 4377},
/*h(204)=13 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {204, 4372},
/*h(2800)=14 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2800, 4375},
/*empty slot1 */ {0,0},
/*h(3200)=16 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3200, 4377},
/*h(2202)=17 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2202, 4373},
/*h(1204)=18 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1204, 4376},
/*h(206)=19 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {206, 4372},
/*h(2802)=20 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2802, 4375},
/*empty slot1 */ {0,0},
/*h(3202)=22 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3202, 4377},
/*h(2204)=23 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2204, 4372},
/*h(1206)=24 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1206, 4376},
/*h(208)=25 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {208, 4373},
/*h(2804)=26 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2804, 4374},
/*empty slot1 */ {0,0},
/*h(3204)=28 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3204, 4376},
/*h(2206)=29 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2206, 4372},
/*h(1208)=30 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1208, 4377},
/*h(210)=31 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {210, 4373},
/*h(2806)=32 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2806, 4374},
/*empty slot1 */ {0,0},
/*h(3206)=34 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3206, 4376},
/*h(2208)=35 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2208, 4373},
/*h(1210)=36 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1210, 4377},
/*h(212)=37 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {212, 4372},
/*h(2808)=38 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2808, 4375},
/*empty slot1 */ {0,0},
/*h(3208)=40 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3208, 4377},
/*h(2210)=41 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2210, 4373},
/*h(1212)=42 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1212, 4376},
/*h(214)=43 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {214, 4372},
/*h(2810)=44 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2810, 4375},
/*empty slot1 */ {0,0},
/*h(3210)=46 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3210, 4377},
/*h(2212)=47 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2212, 4372},
/*h(1214)=48 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1214, 4376},
/*h(216)=49 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {216, 4373},
/*h(2812)=50 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2812, 4374},
/*empty slot1 */ {0,0},
/*h(3212)=52 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3212, 4376},
/*h(2214)=53 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2214, 4372},
/*h(1216)=54 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1216, 4377},
/*h(218)=55 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {218, 4373},
/*h(2814)=56 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2814, 4374},
/*empty slot1 */ {0,0},
/*h(3214)=58 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3214, 4376},
/*h(2216)=59 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2216, 4373},
/*h(1218)=60 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1218, 4377},
/*h(220)=61 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {220, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3216)=64 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3216, 4377},
/*h(2218)=65 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2218, 4373},
/*h(1220)=66 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1220, 4376},
/*h(222)=67 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {222, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3218)=70 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3218, 4377},
/*h(2220)=71 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2220, 4372},
/*h(1222)=72 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1222, 4376},
/*h(224)=73 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {224, 4373},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3220)=76 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3220, 4376},
/*h(2222)=77 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2222, 4372},
/*h(1224)=78 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1224, 4377},
/*h(226)=79 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {226, 4373},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3222)=82 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3222, 4376},
/*h(2224)=83 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2224, 4373},
/*h(1226)=84 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1226, 4377},
/*h(228)=85 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {228, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3224)=88 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3224, 4377},
/*h(2226)=89 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2226, 4373},
/*h(1228)=90 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1228, 4376},
/*h(230)=91 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {230, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3226)=94 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3226, 4377},
/*h(2228)=95 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2228, 4372},
/*h(1230)=96 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1230, 4376},
/*h(232)=97 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {232, 4373},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3228)=100 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3228, 4376},
/*h(2230)=101 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2230, 4372},
/*h(1232)=102 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1232, 4377},
/*h(234)=103 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {234, 4373},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3230)=106 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3230, 4376},
/*h(2232)=107 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2232, 4373},
/*h(1234)=108 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1234, 4377},
/*h(236)=109 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {236, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3232)=112 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3232, 4377},
/*h(2234)=113 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2234, 4373},
/*h(1236)=114 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1236, 4376},
/*h(238)=115 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {238, 4372},
/*h(438)=116 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR  ZEROING=0 MASK=0*/ {438, 4799},
/*empty slot1 */ {0,0},
/*h(3234)=118 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3234, 4377},
/*h(2236)=119 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2236, 4372},
/*h(1238)=120 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1238, 4376},
/*h(240)=121 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {240, 4373},
/*empty slot1 */ {0,0},
/*h(640)=123 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {640, 4375},
/*h(3236)=124 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3236, 4376},
/*h(2238)=125 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2238, 4372},
/*h(1240)=126 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1240, 4377},
/*h(242)=127 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {242, 4373},
/*empty slot1 */ {0,0},
/*h(642)=129 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {642, 4375},
/*h(3238)=130 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3238, 4376},
/*h(2240)=131 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2240, 4373},
/*h(1242)=132 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1242, 4377},
/*h(244)=133 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {244, 4372},
/*empty slot1 */ {0,0},
/*h(644)=135 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {644, 4374},
/*h(3240)=136 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3240, 4377},
/*h(2242)=137 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2242, 4373},
/*h(1244)=138 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1244, 4376},
/*h(246)=139 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {246, 4372},
/*h(446)=140 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR  ZEROING=0 MASK=0*/ {446, 6726},
/*h(646)=141 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {646, 4374},
/*h(3242)=142 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3242, 4377},
/*h(2244)=143 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2244, 4372},
/*h(1246)=144 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1246, 4376},
/*h(248)=145 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {248, 4373},
/*empty slot1 */ {0,0},
/*h(648)=147 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {648, 4375},
/*h(3244)=148 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3244, 4376},
/*h(2246)=149 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2246, 4372},
/*h(1248)=150 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1248, 4377},
/*h(250)=151 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {250, 4373},
/*empty slot1 */ {0,0},
/*h(650)=153 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {650, 4375},
/*h(3246)=154 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3246, 4376},
/*h(2248)=155 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2248, 4373},
/*h(1250)=156 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1250, 4377},
/*h(252)=157 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {252, 4372},
/*empty slot1 */ {0,0},
/*h(652)=159 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {652, 4374},
/*h(3248)=160 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3248, 4377},
/*h(2250)=161 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2250, 4373},
/*h(1252)=162 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1252, 4376},
/*h(254)=163 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {254, 4372},
/*empty slot1 */ {0,0},
/*h(654)=165 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {654, 4374},
/*h(3250)=166 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3250, 4377},
/*h(2252)=167 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2252, 4372},
/*h(1254)=168 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1254, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(656)=171 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {656, 4375},
/*h(3252)=172 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3252, 4376},
/*h(2254)=173 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2254, 4372},
/*h(1256)=174 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1256, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(658)=177 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {658, 4375},
/*h(3254)=178 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3254, 4376},
/*h(2256)=179 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2256, 4373},
/*h(1258)=180 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1258, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(660)=183 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {660, 4374},
/*h(3256)=184 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3256, 4377},
/*h(2258)=185 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2258, 4373},
/*h(1260)=186 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1260, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(662)=189 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {662, 4374},
/*h(3258)=190 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3258, 4377},
/*h(2260)=191 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2260, 4372},
/*h(1262)=192 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1262, 4376},
/*h(1462)=193 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR  ZEROING=0 MASK=0*/ {1462, 4801},
/*empty slot1 */ {0,0},
/*h(664)=195 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {664, 4375},
/*h(3260)=196 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3260, 4376},
/*h(2262)=197 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2262, 4372},
/*h(1264)=198 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1264, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(666)=201 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {666, 4375},
/*h(3262)=202 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3262, 4376},
/*h(2264)=203 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2264, 4373},
/*h(1266)=204 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1266, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(668)=207 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {668, 4374},
/*h(3264)=208 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3264, 4377},
/*h(2266)=209 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2266, 4373},
/*h(1268)=210 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1268, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(670)=213 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {670, 4374},
/*h(3266)=214 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3266, 4377},
/*h(2268)=215 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2268, 4372},
/*h(1270)=216 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1270, 4376},
/*h(1470)=217 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR  ZEROING=0 MASK=0*/ {1470, 6728},
/*empty slot1 */ {0,0},
/*h(672)=219 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {672, 4375},
/*h(3268)=220 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3268, 4376},
/*h(2270)=221 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2270, 4372},
/*h(1272)=222 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1272, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(674)=225 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {674, 4375},
/*h(3270)=226 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3270, 4376},
/*h(2272)=227 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2272, 4373},
/*h(1274)=228 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1274, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(676)=231 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {676, 4374},
/*h(3272)=232 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3272, 4377},
/*h(2274)=233 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2274, 4373},
/*h(1276)=234 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1276, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(678)=237 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {678, 4374},
/*h(3274)=238 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3274, 4377},
/*h(2276)=239 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2276, 4372},
/*h(1278)=240 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1278, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(680)=243 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {680, 4375},
/*h(3276)=244 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3276, 4376},
/*h(2278)=245 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2278, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(682)=249 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {682, 4375},
/*h(3278)=250 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3278, 4376},
/*h(2280)=251 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2280, 4373},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(684)=255 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {684, 4374},
/*h(3280)=256 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3280, 4377},
/*h(2282)=257 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2282, 4373},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(686)=261 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {686, 4374},
/*h(3282)=262 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3282, 4377},
/*h(2284)=263 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2284, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(688)=267 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {688, 4375},
/*h(3284)=268 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3284, 4376},
/*h(2286)=269 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2286, 4372},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(690)=273 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {690, 4375},
/*h(3286)=274 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3286, 4376},
/*h(2288)=275 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2288, 4373},
/*empty slot1 */ {0,0},
/*h(2688)=277 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2688, 4375},
/*empty slot1 */ {0,0},
/*h(692)=279 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {692, 4374},
/*h(3288)=280 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3288, 4377},
/*h(2290)=281 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2290, 4373},
/*empty slot1 */ {0,0},
/*h(2690)=283 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2690, 4375},
/*empty slot1 */ {0,0},
/*h(694)=285 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {694, 4374},
/*h(3290)=286 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3290, 4377},
/*h(2292)=287 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2292, 4372},
/*empty slot1 */ {0,0},
/*h(2692)=289 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2692, 4374},
/*empty slot1 */ {0,0},
/*h(696)=291 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {696, 4375},
/*h(3292)=292 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3292, 4376},
/*h(2294)=293 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2294, 4372},
/*empty slot1 */ {0,0},
/*h(2694)=295 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2694, 4374},
/*empty slot1 */ {0,0},
/*h(698)=297 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {698, 4375},
/*h(3294)=298 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3294, 4376},
/*h(2296)=299 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2296, 4373},
/*empty slot1 */ {0,0},
/*h(2696)=301 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2696, 4375},
/*empty slot1 */ {0,0},
/*h(700)=303 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {700, 4374},
/*h(3296)=304 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3296, 4377},
/*h(2298)=305 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2298, 4373},
/*empty slot1 */ {0,0},
/*h(2698)=307 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2698, 4375},
/*empty slot1 */ {0,0},
/*h(702)=309 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {702, 4374},
/*h(3298)=310 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3298, 4377},
/*h(2300)=311 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2300, 4372},
/*empty slot1 */ {0,0},
/*h(2700)=313 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2700, 4374},
/*empty slot1 */ {0,0},
/*h(704)=315 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {704, 4375},
/*h(3300)=316 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3300, 4376},
/*h(2302)=317 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2302, 4372},
/*empty slot1 */ {0,0},
/*h(2702)=319 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2702, 4374},
/*empty slot1 */ {0,0},
/*h(706)=321 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {706, 4375},
/*h(3302)=322 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3302, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2704)=325 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2704, 4375},
/*empty slot1 */ {0,0},
/*h(708)=327 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {708, 4374},
/*h(3304)=328 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3304, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2706)=331 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2706, 4375},
/*empty slot1 */ {0,0},
/*h(710)=333 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {710, 4374},
/*h(3306)=334 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3306, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2708)=337 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2708, 4374},
/*empty slot1 */ {0,0},
/*h(712)=339 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {712, 4375},
/*h(3308)=340 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3308, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2710)=343 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2710, 4374},
/*empty slot1 */ {0,0},
/*h(714)=345 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {714, 4375},
/*h(3310)=346 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3310, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2712)=349 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2712, 4375},
/*empty slot1 */ {0,0},
/*h(716)=351 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {716, 4374},
/*h(3312)=352 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3312, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2714)=355 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2714, 4375},
/*empty slot1 */ {0,0},
/*h(718)=357 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {718, 4374},
/*h(3314)=358 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3314, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2716)=361 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2716, 4374},
/*empty slot1 */ {0,0},
/*h(720)=363 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {720, 4375},
/*h(3316)=364 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3316, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2718)=367 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2718, 4374},
/*empty slot1 */ {0,0},
/*h(722)=369 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {722, 4375},
/*h(3318)=370 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3318, 4376},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2720)=373 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2720, 4375},
/*empty slot1 */ {0,0},
/*h(724)=375 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {724, 4374},
/*h(3320)=376 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3320, 4377},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2722)=379 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2722, 4375},
/*empty slot1 */ {0,0},
/*h(726)=381 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {726, 4374},
/*h(3322)=382 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {3322, 4377},
/*empty slot1 */ {0,0},
/*h(128)=384 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {128, 4373},
/*h(2724)=385 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2724, 4374},
/*empty slot1 */ {0,0},
/*h(728)=387 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {728, 4375},
/*h(3324)=388 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3324, 4376},
/*empty slot1 */ {0,0},
/*h(130)=390 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {130, 4373},
/*h(2726)=391 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2726, 4374},
/*empty slot1 */ {0,0},
/*h(730)=393 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {730, 4375},
/*h(3326)=394 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3326, 4376},
/*empty slot1 */ {0,0},
/*h(132)=396 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {132, 4372},
/*h(2728)=397 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2728, 4375},
/*empty slot1 */ {0,0},
/*h(732)=399 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {732, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(134)=402 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {134, 4372},
/*h(2730)=403 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2730, 4375},
/*empty slot1 */ {0,0},
/*h(734)=405 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {734, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(136)=408 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {136, 4373},
/*h(2732)=409 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2732, 4374},
/*empty slot1 */ {0,0},
/*h(736)=411 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {736, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(138)=414 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {138, 4373},
/*h(2734)=415 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2734, 4374},
/*empty slot1 */ {0,0},
/*h(738)=417 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {738, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(140)=420 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {140, 4372},
/*h(2736)=421 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2736, 4375},
/*empty slot1 */ {0,0},
/*h(740)=423 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {740, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(142)=426 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {142, 4372},
/*h(2738)=427 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2738, 4375},
/*empty slot1 */ {0,0},
/*h(742)=429 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {742, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(144)=432 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {144, 4373},
/*h(2740)=433 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2740, 4374},
/*empty slot1 */ {0,0},
/*h(744)=435 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {744, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(146)=438 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {146, 4373},
/*h(2742)=439 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2742, 4374},
/*empty slot1 */ {0,0},
/*h(746)=441 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {746, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(148)=444 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {148, 4372},
/*h(2744)=445 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2744, 4375},
/*empty slot1 */ {0,0},
/*h(748)=447 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {748, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(150)=450 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {150, 4372},
/*h(2746)=451 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2746, 4375},
/*empty slot1 */ {0,0},
/*h(750)=453 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {750, 4374},
/*h(950)=454 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR  ZEROING=0 MASK=0*/ {950, 4800},
/*empty slot1 */ {0,0},
/*h(152)=456 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {152, 4373},
/*h(2748)=457 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2748, 4374},
/*empty slot1 */ {0,0},
/*h(752)=459 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {752, 4375},
/*empty slot1 */ {0,0},
/*h(1152)=461 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1152, 4377},
/*h(154)=462 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {154, 4373},
/*h(2750)=463 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2750, 4374},
/*empty slot1 */ {0,0},
/*h(754)=465 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {754, 4375},
/*empty slot1 */ {0,0},
/*h(1154)=467 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1154, 4377},
/*h(156)=468 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {156, 4372},
/*h(2752)=469 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2752, 4375},
/*empty slot1 */ {0,0},
/*h(756)=471 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {756, 4374},
/*empty slot1 */ {0,0},
/*h(1156)=473 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1156, 4376},
/*h(158)=474 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {158, 4372},
/*h(2754)=475 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2754, 4375},
/*empty slot1 */ {0,0},
/*h(758)=477 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {758, 4374},
/*h(958)=478 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR  ZEROING=0 MASK=0*/ {958, 6727},
/*h(1158)=479 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1158, 4376},
/*h(160)=480 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {160, 4373},
/*h(2756)=481 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2756, 4374},
/*empty slot1 */ {0,0},
/*h(760)=483 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {760, 4375},
/*empty slot1 */ {0,0},
/*h(1160)=485 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1160, 4377},
/*h(162)=486 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {162, 4373},
/*h(2758)=487 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2758, 4374},
/*empty slot1 */ {0,0},
/*h(762)=489 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {762, 4375},
/*empty slot1 */ {0,0},
/*h(1162)=491 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1162, 4377},
/*h(164)=492 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {164, 4372},
/*h(2760)=493 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2760, 4375},
/*empty slot1 */ {0,0},
/*h(764)=495 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {764, 4374},
/*empty slot1 */ {0,0},
/*h(1164)=497 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1164, 4376},
/*h(166)=498 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {166, 4372},
/*h(2762)=499 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2762, 4375},
/*empty slot1 */ {0,0},
/*h(766)=501 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {766, 4374},
/*empty slot1 */ {0,0},
/*h(1166)=503 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1166, 4376},
/*h(168)=504 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {168, 4373},
/*h(2764)=505 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2764, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1168)=509 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1168, 4377},
/*h(170)=510 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {170, 4373},
/*h(2766)=511 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2766, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1170)=515 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1170, 4377},
/*h(172)=516 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {172, 4372},
/*h(2768)=517 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2768, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1172)=521 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1172, 4376},
/*h(174)=522 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {174, 4372},
/*h(2770)=523 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2770, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1174)=527 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1174, 4376},
/*h(176)=528 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {176, 4373},
/*h(2772)=529 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2772, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1176)=533 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1176, 4377},
/*h(178)=534 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {178, 4373},
/*h(2774)=535 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2774, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2176)=538 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2176, 4373},
/*h(1178)=539 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1178, 4377},
/*h(180)=540 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {180, 4372},
/*h(2776)=541 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2776, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2178)=544 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2178, 4373},
/*h(1180)=545 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1180, 4376},
/*h(182)=546 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {182, 4372},
/*h(2778)=547 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2778, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2180)=550 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2180, 4372},
/*h(1182)=551 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1182, 4376},
/*h(184)=552 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {184, 4373},
/*h(2780)=553 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2780, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2182)=556 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2182, 4372},
/*h(1184)=557 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1184, 4377},
/*h(186)=558 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {186, 4373},
/*h(2782)=559 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2782, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2184)=562 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2184, 4373},
/*h(1186)=563 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1186, 4377},
/*h(188)=564 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {188, 4372},
/*h(2784)=565 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2784, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2186)=568 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2186, 4373},
/*h(1188)=569 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1188, 4376},
/*h(190)=570 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {190, 4372},
/*h(2786)=571 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2786, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2188)=574 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2188, 4372},
/*h(1190)=575 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1190, 4376},
/*h(192)=576 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {192, 4373},
/*h(2788)=577 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2788, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2190)=580 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2190, 4372},
/*h(1192)=581 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1192, 4377},
/*h(194)=582 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {194, 4373},
/*h(2790)=583 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2790, 4374},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2192)=586 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2192, 4373},
/*h(1194)=587 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {1194, 4377},
/*h(196)=588 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {196, 4372},
/*h(2792)=589 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2792, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2194)=592 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2194, 4373},
/*h(1196)=593 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1196, 4376},
/*h(198)=594 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {198, 4372},
/*h(2794)=595 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {2794, 4375},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2196)=598 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2196, 4372}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 599);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_512_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3265)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3265, 4367},
/*h(681)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {681, 4403},
/*h(2278)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2278, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_0_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1220;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_515_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2744)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2744, 4403},
/*h(160)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {160, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_5_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2762)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2762, 4403},
/*h(178)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {178, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_518_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(249)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 249;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_7_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3228)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3228;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_8_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1254)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1254, 4366},
/*h(644)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {644, 4370},
/*h(2241)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2241, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_10_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2707)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2707;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_12_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2186)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2186;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_525_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(660)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {660, 4370},
/*h(1270)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1270, 4366},
/*h(3244)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3244, 4398},
/*h(2257)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2257, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_15_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2275)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2275, 4369},
/*h(678)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {678, 4370},
/*h(3262)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3262, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_530_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2202)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2202, 4401},
/*h(2812)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2812, 4402},
/*h(228)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {228, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_3_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2296)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2296, 4401},
/*h(3283)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3283, 4367},
/*h(699)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {699, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_532_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3278)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3278, 4398},
/*h(694)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {694, 4370}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_21_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(246)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 246;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_23_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3296)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3296, 4367},
/*h(712)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {712, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_25_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1178)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1178;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_538_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1249)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1249;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_28_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(2254)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2254, 4400},
/*h(3241)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3241, 4399},
/*h(657)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {657, 4371},
/*h(1267)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1267, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((12*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_542_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1194)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1194;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_31_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(746)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 746;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_33_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(225)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {225, 4369},
/*h(1212)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1212, 4398},
/*h(2809)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2809, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_35_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3275)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3275, 4399},
/*h(691)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {691, 4371},
/*h(2288)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2288, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_548_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(762)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 762;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_549_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3202)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3202;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_38_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2754)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2754, 4371},
/*h(170)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {170, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_552_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3291)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3291, 4399},
/*h(707)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {707, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_42_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2699)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2699;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_555_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(186)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {186, 4401},
/*h(2770)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2770, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_44_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(958)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR  ZEROING=0 MASK=0*/ {5601}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 958;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_557_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3236)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3236, 4366},
/*h(652)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {652, 4402},
/*h(2249)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2249, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_558_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1262)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1262;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_560_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2715)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2715, 4403},
/*h(131)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {131, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_520_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3299)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3299, 4367},
/*h(715)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {715, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_562_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2804)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2804, 4370},
/*h(2194)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2194, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_563_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 220;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_565_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3270)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3270, 4366},
/*h(686)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {686, 4402},
/*h(2283)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2283, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_55_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3288)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3288, 4399},
/*h(704)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {704, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_58_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1170)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1170;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_60_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(649)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {649, 4403},
/*h(1259)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1259, 4399},
/*h(3233)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3233, 4367},
/*h(2246)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2246, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_522_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2778)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2778, 4403},
/*h(194)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {194, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_62_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2712)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2712;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_63_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(738)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {738, 4371},
/*h(3322)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3322, 4399},
/*h(128)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {128, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (4*key % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_65_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2801)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2801, 4371},
/*h(217)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {217, 4401},
/*h(1204)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1204, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_578_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1275)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1275;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_580_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2728)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2728, 4403},
/*h(144)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {144, 4369},
/*h(754)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {754, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_70_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(162)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {162, 4369},
/*h(2746)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2746, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_72_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3212)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3212;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_73_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2225)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2225, 4369},
/*h(251)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {251, 4401},
/*h(1238)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1238, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_75_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2691)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2691;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_76_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(950)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR  ZEROING=0 MASK=0*/ {4443}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 950;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_78_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2780)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2780, 4402},
/*h(196)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {196, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_13_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2796)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2796, 4402},
/*h(212)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {212, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_80_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3246)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3246, 4398},
/*h(662)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {662, 4370},
/*h(2259)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2259, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_81_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1272)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1272;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_85_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2204)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2204, 4400},
/*h(2814)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2814, 4402},
/*h(1217)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1217, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_86_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(230)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 230;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_88_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(696)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {696, 4403},
/*h(3280)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3280, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_90_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1162)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1162;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_527_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2723)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2723, 4371},
/*h(139)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {139, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_92_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3225)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3225, 4399},
/*h(641)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {641, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_93_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2238)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2238, 4400},
/*h(1251)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1251, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_95_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3314)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3314, 4367},
/*h(730)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {730, 4403},
/*h(2704)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2704, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_98_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1196)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1196, 4398},
/*h(2793)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2793, 4403},
/*h(209)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {209, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_100_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(675)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {675, 4371},
/*h(2272)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2272, 4369},
/*h(3259)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3259, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_103_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(154)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {154, 4401},
/*h(764)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {764, 4402},
/*h(2738)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2738, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_105_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1230)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1230, 4398},
/*h(2217)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2217, 4401},
/*h(3204)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3204, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_106_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(243)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 243;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_110_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2772)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2772, 4370},
/*h(188)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {188, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_112_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3238)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3238;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_113_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2251)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2251, 4401},
/*h(1264)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1264, 4367},
/*h(654)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {654, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((11*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_117_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2196)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2196;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_118_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2806)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2806, 4370},
/*h(222)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {222, 4400},
/*h(1209)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1209, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_120_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3272)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3272, 4399},
/*h(688)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {688, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_20_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2220, 4400},
/*h(1233)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1233, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_122_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1154)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1154;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_125_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1243)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1243, 4399},
/*h(3217)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3217, 4367},
/*h(2230)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2230, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_127_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2696)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2696;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_128_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3306)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3306, 4399},
/*h(722)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {722, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_130_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2785)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2785, 4371},
/*h(201)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {201, 4401},
/*h(1188)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1188, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_132_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3251)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3251;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_133_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2264)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2264, 4401},
/*h(667)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {667, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_135_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2730)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2730, 4403},
/*h(146)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {146, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_136_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(756)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {4370}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 756;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_137_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2209)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2209;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_138_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1222)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1222, 4366},
/*h(235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {235, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_535_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1160)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1160;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_533_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2291)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2291;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_143_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(180)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {180, 4368},
/*h(2764)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2764, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_145_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(646)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {646, 4370},
/*h(1256)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1256, 4399},
/*h(2243)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2243, 4369},
/*h(3230)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3230, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((12*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_150_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(1201)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1201, 4367},
/*h(2798)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2798, 4402},
/*h(214)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {214, 4368},
/*h(2188)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2188, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_537_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2236)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2236;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_153_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3264)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3264, 4367},
/*h(680)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {680, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_157_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3209)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3209;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_158_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2222)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2222, 4400},
/*h(1235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1235, 4367},
/*h(248)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {248, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_160_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3298)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3298, 4367},
/*h(714)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {714, 4403},
/*h(2688)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2688, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_163_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2777)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2777, 4403},
/*h(1180)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1180, 4398},
/*h(193)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {193, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_165_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2256)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2256, 4369},
/*h(3243)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3243, 4399},
/*h(659)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {659, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_167_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2722)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2722;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_168_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(138)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {138, 4401},
/*h(748)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {748, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_540_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2702)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2702, 4402},
/*h(3312)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3312, 4367},
/*h(728)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {728, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_170_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(227)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {227, 4369},
/*h(2201)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2201, 4401},
/*h(2811)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2811, 4403},
/*h(1214)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1214, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_517_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3210, 4399},
/*h(1236)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1236, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_173_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2290)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2290;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_175_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2756)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2756, 4370},
/*h(172)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {172, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_177_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3222)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3222;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_178_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1248)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1248, 4367},
/*h(2235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2235, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_30_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2720)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2720, 4371},
/*h(136)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {136, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_182_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2180)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2180;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_183_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2790)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2790, 4370},
/*h(206)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {206, 4400},
/*h(1193)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1193, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_185_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(672)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {672, 4371},
/*h(3256)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3256, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_188_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(761)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 761;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_190_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(240)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {240, 4369},
/*h(1227)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1227, 4399},
/*h(2214)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2214, 4368},
/*h(3201)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3201, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_193_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3290)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3290, 4399},
/*h(706)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {706, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_195_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(185)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {185, 4401},
/*h(1172)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1172, 4366},
/*h(2769)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2769, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_197_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(651)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {651, 4403},
/*h(3235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3235, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_198_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2248)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2248;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_545_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2270)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2270, 4400},
/*h(673)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {673, 4371},
/*h(3257)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3257, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_200_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(3324)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3324, 4398},
/*h(740)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {740, 4370},
/*h(2714)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2714, 4403},
/*h(130)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {130, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_202_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2193)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2193;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_203_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1206)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1206, 4366},
/*h(2803)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2803, 4371},
/*h(219)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {219, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_205_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2282)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2282;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_208_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2748)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2748, 4402},
/*h(164)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {164, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_210_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1240)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1240, 4399},
/*h(2227)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2227, 4369},
/*h(3214)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3214, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_547_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2736)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2736, 4371},
/*h(152)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {152, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_215_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(198)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {198, 4368},
/*h(1185)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1185, 4367},
/*h(2782)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2782, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_217_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3248)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3248, 4367},
/*h(664)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {664, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_218_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1274)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_220_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(753)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 753;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_222_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2206)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2206;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_223_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(232)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {232, 4401},
/*h(1219)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1219, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_225_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3282)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3282, 4367},
/*h(698)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {698, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_227_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1164)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1164;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_228_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(177)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {177, 4369},
/*h(2761)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2761, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_550_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1228)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1228, 4398},
/*h(241)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {241, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_230_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3227)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3227, 4399},
/*h(643)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {643, 4371},
/*h(2240)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2240, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_519_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2689)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2689;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_233_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(732)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {732, 4402},
/*h(3316)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3316, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_235_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(2185)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2185, 4401},
/*h(2795)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2795, 4403},
/*h(1198)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1198, 4398},
/*h(211)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {211, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_238_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2274)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_240_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(766)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {766, 4402},
/*h(2740)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2740, 4370},
/*h(156)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {156, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_40_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3220, 4366},
/*h(1246)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1246, 4398},
/*h(2233)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2233, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_242_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3206)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3206, 4366},
/*h(2219)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2219, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_243_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1232)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1232;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_247_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1177)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1177;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_248_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2774)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2774, 4370},
/*h(190)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {190, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_250_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(656)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {656, 4371},
/*h(1266)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1266, 4367},
/*h(3240)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3240, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_253_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(745)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 745;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_255_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(2808)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2808, 4403},
/*h(224)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {224, 4369},
/*h(1211)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1211, 4399},
/*h(2198)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2198, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 13) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_257_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3274)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3274;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_258_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(690)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 690;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_260_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1156)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1156, 4366},
/*h(2753)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2753, 4371},
/*h(169)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {169, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_262_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2232)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2232, 4401},
/*h(3219)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3219, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_265_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3308)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3308, 4398},
/*h(724)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {724, 4370},
/*h(2698)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2698, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_267_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1190)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1190, 4366},
/*h(2177)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2177, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_268_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2787)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2787, 4371},
/*h(203)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {203, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_270_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2266)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2266;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_45_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2178)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2178, 4369},
/*h(2788)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2788, 4370},
/*h(204)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {204, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((6*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_272_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2732)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2732, 4402},
/*h(148)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {148, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_273_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(758)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {4370}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 758;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_275_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1224)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1224, 4399},
/*h(2211)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2211, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_278_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2300)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2300;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_280_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2766)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2766, 4402},
/*h(182)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {182, 4368},
/*h(1169)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1169, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_282_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(648)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {648, 4403},
/*h(3232)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3232, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_283_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1258)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1258;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_285_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3321)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3321, 4399},
/*h(737)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {737, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_287_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2190)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2190;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_288_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2800)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2800, 4371},
/*h(216)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {216, 4401},
/*h(1203)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1203, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_48_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(670)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {670, 4402},
/*h(2267)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2267, 4401},
/*h(3254)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3254, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_290_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3266)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3266, 4367},
/*h(682)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {682, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_292_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2745)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2745;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_293_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(161)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 161;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_295_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {250, 4401},
/*h(2224)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2224, 4369},
/*h(3211)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3211, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_296_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1470)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR  ZEROING=0 MASK=0*/ {5602}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1470;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_297_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2690)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2690;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_298_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3300)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3300, 4366},
/*h(716)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {716, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_300_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(195)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {195, 4369},
/*h(1182)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1182, 4398},
/*h(2779)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2779, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_303_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2258)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2258;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_305_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(750)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {750, 4402},
/*h(2724)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2724, 4370},
/*h(140)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {140, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_307_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2203)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2203;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_308_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1216)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1216;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_310_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2292)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2292;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_312_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2758)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2758, 4370},
/*h(1161)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1161, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_313_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(174)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_315_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1250, 4367},
/*h(3224)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3224, 4399},
/*h(640)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {640, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_318_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(729)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {729, 4403},
/*h(3313)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3313, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_53_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(238)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {238, 4400},
/*h(2212)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2212, 4368},
/*h(1225)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1225, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_320_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(1195)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1195, 4399},
/*h(208)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {208, 4369},
/*h(2792)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2792, 4403},
/*h(2182)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2182, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((10*key % 11) % 4);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_322_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3258)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3258, 4399},
/*h(674)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {674, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_325_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2737)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2737, 4371},
/*h(153)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {153, 4401},
/*h(763)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {763, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_327_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2216)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2216, 4401},
/*h(3203)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3203, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_328_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_140_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2298)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2298;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_330_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(708)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {708, 4370},
/*h(3292)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3292, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_567_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1152)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1152;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_332_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1174)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1174;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_333_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2771)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2771, 4371},
/*h(187)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {187, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_335_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2250;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_337_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(132)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {132, 4368},
/*h(2716)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2716, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_338_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3326)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3326, 4398},
/*h(742)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {742, 4370}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_340_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1208)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1208, 4399},
/*h(2195)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2195, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_343_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2284)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2284;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_345_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2750)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2750, 4402},
/*h(166)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {166, 4368},
/*h(1153)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1153, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_347_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3216)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3216;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_348_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_570_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1241)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1241, 4399},
/*h(2228)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2228, 4368},
/*h(254)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {254, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_350_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3305)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3305, 4399},
/*h(721)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {721, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_352_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1187)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1187;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_353_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2784)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2784, 4371},
/*h(200)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {200, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_355_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3250, 4367},
/*h(1276)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1276, 4398},
/*h(666)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {666, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 13) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_357_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2729)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2729, 4403},
/*h(145)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {145, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_358_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(755)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 755;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_360_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2208)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2208, 4369},
/*h(234)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {234, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_572_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(720)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {720, 4371},
/*h(2694)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2694, 4370},
/*h(3304)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3304, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_362_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3284)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3284;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_363_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(700)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {700, 4402},
/*h(2297)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2297, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_365_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1166)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1166, 4398},
/*h(2763)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2763, 4403},
/*h(179)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {179, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_367_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2242;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_232_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2706)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2706;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_370_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2708)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2708, 4370},
/*h(3318)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3318, 4366},
/*h(734)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {734, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_372_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1200)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1200, 4367},
/*h(2187)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2187, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_374_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(446)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR  ZEROING=0 MASK=0*/ {5600}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 446;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_375_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2276)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2276;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_377_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2742)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2742, 4370},
/*h(158)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {158, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_575_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1186)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1186;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_380_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3208)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3208, 4399},
/*h(1234)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1234, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_382_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3297)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3297;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_383_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(713)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 713;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_385_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2776)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2776, 4403},
/*h(192)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {192, 4369},
/*h(1179)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1179, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_387_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3242, 4399},
/*h(658)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {658, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_388_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1268)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1268;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_390_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(137)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {137, 4401},
/*h(747)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {747, 4403},
/*h(2721)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2721, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_577_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(665)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {665, 4403},
/*h(2262)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2262, 4368},
/*h(3249)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3249, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_392_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2200)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2200;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_393_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2810)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2810, 4403},
/*h(226)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {226, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_1_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(233)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 233;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_395_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3276)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3276, 4398},
/*h(692)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {692, 4370},
/*h(2289)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2289, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_397_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2755)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2755, 4371},
/*h(171)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {171, 4401},
/*h(1158)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {1158, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_400_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2234)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2234;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_402_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2700)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2700;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_403_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(726)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {726, 4370},
/*h(3310)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3310, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_405_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(1192)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1192, 4399},
/*h(2179)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2179, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_406_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(438)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR  ZEROING=0 MASK=0*/ {4442}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 438;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_408_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2268)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2268;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_68_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3267)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3267, 4367},
/*h(2280)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2280, 4401},
/*h(683)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {683, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_410_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(150)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {150, 4368},
/*h(760)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {760, 4403},
/*h(2734)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2734, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_412_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3200)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3200;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_413_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1226)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1226;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_415_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(705)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {705, 4371},
/*h(2302)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2302, 4400},
/*h(3289)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3289, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_417_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2768)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2768, 4371},
/*h(1171)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1171, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_418_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(184)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 184;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_420_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3234)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3234, 4367},
/*h(650)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {650, 4403},
/*h(1260)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1260, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_422_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(129)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {129, 4369},
/*h(2713)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2713, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_423_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3323)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3323, 4399},
/*h(739)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {739, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_425_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2802)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2802, 4371},
/*h(218)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {218, 4401},
/*h(2192)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2192, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_427_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(684)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {684, 4402},
/*h(3268)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3268, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_428_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2281)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2281;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_430_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2747)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2747, 4403},
/*h(163)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {163, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_432_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2226)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2226;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_433_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(252)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 252;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_435_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2692)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2692, 4370},
/*h(3302)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3302, 4366},
/*h(718)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {718, 4402}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((9*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_437_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1184)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1184;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_329_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1462)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR  ZEROING=0 MASK=0*/ {4444}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1462;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_440_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2260)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2260, 4368},
/*h(1273)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1273, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_442_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2726)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2726, 4370},
/*h(142)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {142, 4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_443_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(752)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 752;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_445_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1218)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1218;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_447_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3281)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3281, 4367},
/*h(697)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {697, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_448_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2294)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2294;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_450_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2760)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2760, 4403},
/*h(176)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {176, 4369},
/*h(1163)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1163, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_452_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(642)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {642, 4371},
/*h(3226)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3226, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_453_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1252)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1252;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_455_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(731)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {731, 4403},
/*h(2705)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2705, 4371},
/*h(3315)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3315, 4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_457_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2184)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2184;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_458_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {210, 4369},
/*h(2794)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2794, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_460_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3260)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {3260, 4398},
/*h(676)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {676, 4370},
/*h(2273)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2273, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_462_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2739)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2739, 4371},
/*h(155)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {155, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_465_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2218)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2218, 4401},
/*h(244)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {244, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_467_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(3294)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 3294;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_468_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(710)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {4370}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 710;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_470_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1176)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1176;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_472_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2252)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2252;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_473_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1265)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1265;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_475_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(744)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {744, 4403},
/*h(2718)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {2718, 4402},
/*h(134)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {134, 4368}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_477_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_480_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2286)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {2286, 4400},
/*h(3273)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3273, 4399},
/*h(689)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {689, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_482_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(1155)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {1155, 4367},
/*h(168)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {168, 4401},
/*h(2752)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2752, 4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_485_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3218)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {3218, 4367},
/*h(1244)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {1244, 4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 5) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_487_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2697)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2697, 4403},
/*h(3307)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3307, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_488_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(723)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 723;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_490_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2786)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2786, 4371},
/*h(202)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {202, 4401},
/*h(2176)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {2176, 4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_492_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(2265)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2265, 4401},
/*h(668)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {668, 4402},
/*h(3252)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3252, 4366}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 11) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_493_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1278)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {4398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1278;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_495_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(147)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {147, 4369},
/*h(2731)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2731, 4403}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_497_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(2210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4369}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 2210;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_498_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(236)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {4400}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 236;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_500_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(3286)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {3286, 4366},
/*h(702)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {702, 4402},
/*h(2299)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {2299, 4401}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 5) % 3);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_502_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1168)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1168;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_505_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(2244)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {2244, 4368},
/*h(1257)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {1257, 4399}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_507_l1(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(3320)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {3320, 4399},
/*h(2710)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {2710, 4370}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((4*key % 3) % 2);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_508_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(736)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4371}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 736;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2_510_l1(const xed_decoded_inst_t* d)
{
typedef struct { xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[1] = {
/*h(1202)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {4367}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = key - 1202;
if(hidx == 0) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x39_vv2(const xed_decoded_inst_t* d)
{
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
static const lu_entry_t lu_table[582] = {
/*h(1220)=0 */ {1220, xed3_phash_find_map0x0F38_opcode0x39_vv2_0_l1},
/*h(233)=1 */ {233, xed3_phash_find_map0x0F38_opcode0x39_vv2_1_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2296)=3 */ {2296, xed3_phash_find_map0x0F38_opcode0x39_vv2_3_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(178)=5 */ {178, xed3_phash_find_map0x0F38_opcode0x39_vv2_5_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3228)=7 */ {3228, xed3_phash_find_map0x0F38_opcode0x39_vv2_7_l1},
/*h(2241)=8 */ {2241, xed3_phash_find_map0x0F38_opcode0x39_vv2_8_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2707)=10 */ {2707, xed3_phash_find_map0x0F38_opcode0x39_vv2_10_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2186)=12 */ {2186, xed3_phash_find_map0x0F38_opcode0x39_vv2_12_l1},
/*h(2796)=13 */ {2796, xed3_phash_find_map0x0F38_opcode0x39_vv2_13_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3262)=15 */ {3262, xed3_phash_find_map0x0F38_opcode0x39_vv2_15_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1233)=20 */ {1233, xed3_phash_find_map0x0F38_opcode0x39_vv2_20_l1},
/*h(246)=21 */ {246, xed3_phash_find_map0x0F38_opcode0x39_vv2_21_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3296)=23 */ {3296, xed3_phash_find_map0x0F38_opcode0x39_vv2_23_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1178)=25 */ {1178, xed3_phash_find_map0x0F38_opcode0x39_vv2_25_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1267)=28 */ {1267, xed3_phash_find_map0x0F38_opcode0x39_vv2_28_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2720)=30 */ {2720, xed3_phash_find_map0x0F38_opcode0x39_vv2_30_l1},
/*h(746)=31 */ {746, xed3_phash_find_map0x0F38_opcode0x39_vv2_31_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1212)=33 */ {1212, xed3_phash_find_map0x0F38_opcode0x39_vv2_33_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3275)=35 */ {3275, xed3_phash_find_map0x0F38_opcode0x39_vv2_35_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(170)=38 */ {170, xed3_phash_find_map0x0F38_opcode0x39_vv2_38_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1246)=40 */ {1246, xed3_phash_find_map0x0F38_opcode0x39_vv2_40_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2699)=42 */ {2699, xed3_phash_find_map0x0F38_opcode0x39_vv2_42_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(958)=44 */ {958, xed3_phash_find_map0x0F38_opcode0x39_vv2_44_l1},
/*h(204)=45 */ {204, xed3_phash_find_map0x0F38_opcode0x39_vv2_45_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(670)=48 */ {670, xed3_phash_find_map0x0F38_opcode0x39_vv2_48_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1225)=53 */ {1225, xed3_phash_find_map0x0F38_opcode0x39_vv2_53_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(704)=55 */ {704, xed3_phash_find_map0x0F38_opcode0x39_vv2_55_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1170)=58 */ {1170, xed3_phash_find_map0x0F38_opcode0x39_vv2_58_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3233)=60 */ {3233, xed3_phash_find_map0x0F38_opcode0x39_vv2_60_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2712)=62 */ {2712, xed3_phash_find_map0x0F38_opcode0x39_vv2_62_l1},
/*h(3322)=63 */ {3322, xed3_phash_find_map0x0F38_opcode0x39_vv2_63_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1204)=65 */ {1204, xed3_phash_find_map0x0F38_opcode0x39_vv2_65_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3267)=68 */ {3267, xed3_phash_find_map0x0F38_opcode0x39_vv2_68_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(162)=70 */ {162, xed3_phash_find_map0x0F38_opcode0x39_vv2_70_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3212)=72 */ {3212, xed3_phash_find_map0x0F38_opcode0x39_vv2_72_l1},
/*h(251)=73 */ {251, xed3_phash_find_map0x0F38_opcode0x39_vv2_73_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2691)=75 */ {2691, xed3_phash_find_map0x0F38_opcode0x39_vv2_75_l1},
/*h(950)=76 */ {950, xed3_phash_find_map0x0F38_opcode0x39_vv2_76_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2780)=78 */ {2780, xed3_phash_find_map0x0F38_opcode0x39_vv2_78_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(662)=80 */ {662, xed3_phash_find_map0x0F38_opcode0x39_vv2_80_l1},
/*h(1272)=81 */ {1272, xed3_phash_find_map0x0F38_opcode0x39_vv2_81_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2204)=85 */ {2204, xed3_phash_find_map0x0F38_opcode0x39_vv2_85_l1},
/*h(230)=86 */ {230, xed3_phash_find_map0x0F38_opcode0x39_vv2_86_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(696)=88 */ {696, xed3_phash_find_map0x0F38_opcode0x39_vv2_88_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1162)=90 */ {1162, xed3_phash_find_map0x0F38_opcode0x39_vv2_90_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(641)=92 */ {641, xed3_phash_find_map0x0F38_opcode0x39_vv2_92_l1},
/*h(2238)=93 */ {2238, xed3_phash_find_map0x0F38_opcode0x39_vv2_93_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2704)=95 */ {2704, xed3_phash_find_map0x0F38_opcode0x39_vv2_95_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(209)=98 */ {209, xed3_phash_find_map0x0F38_opcode0x39_vv2_98_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2272)=100 */ {2272, xed3_phash_find_map0x0F38_opcode0x39_vv2_100_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(764)=103 */ {764, xed3_phash_find_map0x0F38_opcode0x39_vv2_103_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1230)=105 */ {1230, xed3_phash_find_map0x0F38_opcode0x39_vv2_105_l1},
/*h(243)=106 */ {243, xed3_phash_find_map0x0F38_opcode0x39_vv2_106_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2772)=110 */ {2772, xed3_phash_find_map0x0F38_opcode0x39_vv2_110_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3238)=112 */ {3238, xed3_phash_find_map0x0F38_opcode0x39_vv2_112_l1},
/*h(1264)=113 */ {1264, xed3_phash_find_map0x0F38_opcode0x39_vv2_113_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2196)=117 */ {2196, xed3_phash_find_map0x0F38_opcode0x39_vv2_117_l1},
/*h(1209)=118 */ {1209, xed3_phash_find_map0x0F38_opcode0x39_vv2_118_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3272)=120 */ {3272, xed3_phash_find_map0x0F38_opcode0x39_vv2_120_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1154)=122 */ {1154, xed3_phash_find_map0x0F38_opcode0x39_vv2_122_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2230)=125 */ {2230, xed3_phash_find_map0x0F38_opcode0x39_vv2_125_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2696)=127 */ {2696, xed3_phash_find_map0x0F38_opcode0x39_vv2_127_l1},
/*h(3306)=128 */ {3306, xed3_phash_find_map0x0F38_opcode0x39_vv2_128_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(201)=130 */ {201, xed3_phash_find_map0x0F38_opcode0x39_vv2_130_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3251)=132 */ {3251, xed3_phash_find_map0x0F38_opcode0x39_vv2_132_l1},
/*h(667)=133 */ {667, xed3_phash_find_map0x0F38_opcode0x39_vv2_133_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2730)=135 */ {2730, xed3_phash_find_map0x0F38_opcode0x39_vv2_135_l1},
/*h(756)=136 */ {756, xed3_phash_find_map0x0F38_opcode0x39_vv2_136_l1},
/*h(2209)=137 */ {2209, xed3_phash_find_map0x0F38_opcode0x39_vv2_137_l1},
/*h(1222)=138 */ {1222, xed3_phash_find_map0x0F38_opcode0x39_vv2_138_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2298)=140 */ {2298, xed3_phash_find_map0x0F38_opcode0x39_vv2_140_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2764)=143 */ {2764, xed3_phash_find_map0x0F38_opcode0x39_vv2_143_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2243)=145 */ {2243, xed3_phash_find_map0x0F38_opcode0x39_vv2_145_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1201)=150 */ {1201, xed3_phash_find_map0x0F38_opcode0x39_vv2_150_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(680)=153 */ {680, xed3_phash_find_map0x0F38_opcode0x39_vv2_153_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3209)=157 */ {3209, xed3_phash_find_map0x0F38_opcode0x39_vv2_157_l1},
/*h(1235)=158 */ {1235, xed3_phash_find_map0x0F38_opcode0x39_vv2_158_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2688)=160 */ {2688, xed3_phash_find_map0x0F38_opcode0x39_vv2_160_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1180)=163 */ {1180, xed3_phash_find_map0x0F38_opcode0x39_vv2_163_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2256)=165 */ {2256, xed3_phash_find_map0x0F38_opcode0x39_vv2_165_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2722)=167 */ {2722, xed3_phash_find_map0x0F38_opcode0x39_vv2_167_l1},
/*h(748)=168 */ {748, xed3_phash_find_map0x0F38_opcode0x39_vv2_168_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1214)=170 */ {1214, xed3_phash_find_map0x0F38_opcode0x39_vv2_170_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2290)=173 */ {2290, xed3_phash_find_map0x0F38_opcode0x39_vv2_173_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(172)=175 */ {172, xed3_phash_find_map0x0F38_opcode0x39_vv2_175_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3222)=177 */ {3222, xed3_phash_find_map0x0F38_opcode0x39_vv2_177_l1},
/*h(1248)=178 */ {1248, xed3_phash_find_map0x0F38_opcode0x39_vv2_178_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2180)=182 */ {2180, xed3_phash_find_map0x0F38_opcode0x39_vv2_182_l1},
/*h(1193)=183 */ {1193, xed3_phash_find_map0x0F38_opcode0x39_vv2_183_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3256)=185 */ {3256, xed3_phash_find_map0x0F38_opcode0x39_vv2_185_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(761)=188 */ {761, xed3_phash_find_map0x0F38_opcode0x39_vv2_188_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1227)=190 */ {1227, xed3_phash_find_map0x0F38_opcode0x39_vv2_190_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(706)=193 */ {706, xed3_phash_find_map0x0F38_opcode0x39_vv2_193_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1172)=195 */ {1172, xed3_phash_find_map0x0F38_opcode0x39_vv2_195_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(651)=197 */ {651, xed3_phash_find_map0x0F38_opcode0x39_vv2_197_l1},
/*h(2248)=198 */ {2248, xed3_phash_find_map0x0F38_opcode0x39_vv2_198_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3324)=200 */ {3324, xed3_phash_find_map0x0F38_opcode0x39_vv2_200_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2193)=202 */ {2193, xed3_phash_find_map0x0F38_opcode0x39_vv2_202_l1},
/*h(1206)=203 */ {1206, xed3_phash_find_map0x0F38_opcode0x39_vv2_203_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2282)=205 */ {2282, xed3_phash_find_map0x0F38_opcode0x39_vv2_205_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2748)=208 */ {2748, xed3_phash_find_map0x0F38_opcode0x39_vv2_208_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1240)=210 */ {1240, xed3_phash_find_map0x0F38_opcode0x39_vv2_210_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(198)=215 */ {198, xed3_phash_find_map0x0F38_opcode0x39_vv2_215_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(664)=217 */ {664, xed3_phash_find_map0x0F38_opcode0x39_vv2_217_l1},
/*h(1274)=218 */ {1274, xed3_phash_find_map0x0F38_opcode0x39_vv2_218_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(753)=220 */ {753, xed3_phash_find_map0x0F38_opcode0x39_vv2_220_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2206)=222 */ {2206, xed3_phash_find_map0x0F38_opcode0x39_vv2_222_l1},
/*h(1219)=223 */ {1219, xed3_phash_find_map0x0F38_opcode0x39_vv2_223_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3282)=225 */ {3282, xed3_phash_find_map0x0F38_opcode0x39_vv2_225_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1164)=227 */ {1164, xed3_phash_find_map0x0F38_opcode0x39_vv2_227_l1},
/*h(177)=228 */ {177, xed3_phash_find_map0x0F38_opcode0x39_vv2_228_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(643)=230 */ {643, xed3_phash_find_map0x0F38_opcode0x39_vv2_230_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2706)=232 */ {2706, xed3_phash_find_map0x0F38_opcode0x39_vv2_232_l1},
/*h(3316)=233 */ {3316, xed3_phash_find_map0x0F38_opcode0x39_vv2_233_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2795)=235 */ {2795, xed3_phash_find_map0x0F38_opcode0x39_vv2_235_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2274)=238 */ {2274, xed3_phash_find_map0x0F38_opcode0x39_vv2_238_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2740)=240 */ {2740, xed3_phash_find_map0x0F38_opcode0x39_vv2_240_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2219)=242 */ {2219, xed3_phash_find_map0x0F38_opcode0x39_vv2_242_l1},
/*h(1232)=243 */ {1232, xed3_phash_find_map0x0F38_opcode0x39_vv2_243_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1177)=247 */ {1177, xed3_phash_find_map0x0F38_opcode0x39_vv2_247_l1},
/*h(2774)=248 */ {2774, xed3_phash_find_map0x0F38_opcode0x39_vv2_248_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1266)=250 */ {1266, xed3_phash_find_map0x0F38_opcode0x39_vv2_250_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(745)=253 */ {745, xed3_phash_find_map0x0F38_opcode0x39_vv2_253_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1211)=255 */ {1211, xed3_phash_find_map0x0F38_opcode0x39_vv2_255_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3274)=257 */ {3274, xed3_phash_find_map0x0F38_opcode0x39_vv2_257_l1},
/*h(690)=258 */ {690, xed3_phash_find_map0x0F38_opcode0x39_vv2_258_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(169)=260 */ {169, xed3_phash_find_map0x0F38_opcode0x39_vv2_260_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3219)=262 */ {3219, xed3_phash_find_map0x0F38_opcode0x39_vv2_262_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2698)=265 */ {2698, xed3_phash_find_map0x0F38_opcode0x39_vv2_265_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2177)=267 */ {2177, xed3_phash_find_map0x0F38_opcode0x39_vv2_267_l1},
/*h(203)=268 */ {203, xed3_phash_find_map0x0F38_opcode0x39_vv2_268_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2266)=270 */ {2266, xed3_phash_find_map0x0F38_opcode0x39_vv2_270_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(148)=272 */ {148, xed3_phash_find_map0x0F38_opcode0x39_vv2_272_l1},
/*h(758)=273 */ {758, xed3_phash_find_map0x0F38_opcode0x39_vv2_273_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1224)=275 */ {1224, xed3_phash_find_map0x0F38_opcode0x39_vv2_275_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2300)=278 */ {2300, xed3_phash_find_map0x0F38_opcode0x39_vv2_278_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1169)=280 */ {1169, xed3_phash_find_map0x0F38_opcode0x39_vv2_280_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3232)=282 */ {3232, xed3_phash_find_map0x0F38_opcode0x39_vv2_282_l1},
/*h(1258)=283 */ {1258, xed3_phash_find_map0x0F38_opcode0x39_vv2_283_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3321)=285 */ {3321, xed3_phash_find_map0x0F38_opcode0x39_vv2_285_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2190)=287 */ {2190, xed3_phash_find_map0x0F38_opcode0x39_vv2_287_l1},
/*h(216)=288 */ {216, xed3_phash_find_map0x0F38_opcode0x39_vv2_288_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3266)=290 */ {3266, xed3_phash_find_map0x0F38_opcode0x39_vv2_290_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2745)=292 */ {2745, xed3_phash_find_map0x0F38_opcode0x39_vv2_292_l1},
/*h(161)=293 */ {161, xed3_phash_find_map0x0F38_opcode0x39_vv2_293_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(250)=295 */ {250, xed3_phash_find_map0x0F38_opcode0x39_vv2_295_l1},
/*h(1470)=296 */ {1470, xed3_phash_find_map0x0F38_opcode0x39_vv2_296_l1},
/*h(2690)=297 */ {2690, xed3_phash_find_map0x0F38_opcode0x39_vv2_297_l1},
/*h(3300)=298 */ {3300, xed3_phash_find_map0x0F38_opcode0x39_vv2_298_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1182)=300 */ {1182, xed3_phash_find_map0x0F38_opcode0x39_vv2_300_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2258)=303 */ {2258, xed3_phash_find_map0x0F38_opcode0x39_vv2_303_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(750)=305 */ {750, xed3_phash_find_map0x0F38_opcode0x39_vv2_305_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2203)=307 */ {2203, xed3_phash_find_map0x0F38_opcode0x39_vv2_307_l1},
/*h(1216)=308 */ {1216, xed3_phash_find_map0x0F38_opcode0x39_vv2_308_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2292)=310 */ {2292, xed3_phash_find_map0x0F38_opcode0x39_vv2_310_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1161)=312 */ {1161, xed3_phash_find_map0x0F38_opcode0x39_vv2_312_l1},
/*h(174)=313 */ {174, xed3_phash_find_map0x0F38_opcode0x39_vv2_313_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1250)=315 */ {1250, xed3_phash_find_map0x0F38_opcode0x39_vv2_315_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3313)=318 */ {3313, xed3_phash_find_map0x0F38_opcode0x39_vv2_318_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1195)=320 */ {1195, xed3_phash_find_map0x0F38_opcode0x39_vv2_320_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3258)=322 */ {3258, xed3_phash_find_map0x0F38_opcode0x39_vv2_322_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(153)=325 */ {153, xed3_phash_find_map0x0F38_opcode0x39_vv2_325_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2216)=327 */ {2216, xed3_phash_find_map0x0F38_opcode0x39_vv2_327_l1},
/*h(242)=328 */ {242, xed3_phash_find_map0x0F38_opcode0x39_vv2_328_l1},
/*h(1462)=329 */ {1462, xed3_phash_find_map0x0F38_opcode0x39_vv2_329_l1},
/*h(3292)=330 */ {3292, xed3_phash_find_map0x0F38_opcode0x39_vv2_330_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1174)=332 */ {1174, xed3_phash_find_map0x0F38_opcode0x39_vv2_332_l1},
/*h(2771)=333 */ {2771, xed3_phash_find_map0x0F38_opcode0x39_vv2_333_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2250)=335 */ {2250, xed3_phash_find_map0x0F38_opcode0x39_vv2_335_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(132)=337 */ {132, xed3_phash_find_map0x0F38_opcode0x39_vv2_337_l1},
/*h(3326)=338 */ {3326, xed3_phash_find_map0x0F38_opcode0x39_vv2_338_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1208)=340 */ {1208, xed3_phash_find_map0x0F38_opcode0x39_vv2_340_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2284)=343 */ {2284, xed3_phash_find_map0x0F38_opcode0x39_vv2_343_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1153)=345 */ {1153, xed3_phash_find_map0x0F38_opcode0x39_vv2_345_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3216)=347 */ {3216, xed3_phash_find_map0x0F38_opcode0x39_vv2_347_l1},
/*h(1242)=348 */ {1242, xed3_phash_find_map0x0F38_opcode0x39_vv2_348_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3305)=350 */ {3305, xed3_phash_find_map0x0F38_opcode0x39_vv2_350_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1187)=352 */ {1187, xed3_phash_find_map0x0F38_opcode0x39_vv2_352_l1},
/*h(200)=353 */ {200, xed3_phash_find_map0x0F38_opcode0x39_vv2_353_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(666)=355 */ {666, xed3_phash_find_map0x0F38_opcode0x39_vv2_355_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2729)=357 */ {2729, xed3_phash_find_map0x0F38_opcode0x39_vv2_357_l1},
/*h(755)=358 */ {755, xed3_phash_find_map0x0F38_opcode0x39_vv2_358_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(234)=360 */ {234, xed3_phash_find_map0x0F38_opcode0x39_vv2_360_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3284)=362 */ {3284, xed3_phash_find_map0x0F38_opcode0x39_vv2_362_l1},
/*h(2297)=363 */ {2297, xed3_phash_find_map0x0F38_opcode0x39_vv2_363_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1166)=365 */ {1166, xed3_phash_find_map0x0F38_opcode0x39_vv2_365_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2242)=367 */ {2242, xed3_phash_find_map0x0F38_opcode0x39_vv2_367_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2708)=370 */ {2708, xed3_phash_find_map0x0F38_opcode0x39_vv2_370_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1200)=372 */ {1200, xed3_phash_find_map0x0F38_opcode0x39_vv2_372_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(446)=374 */ {446, xed3_phash_find_map0x0F38_opcode0x39_vv2_374_l1},
/*h(2276)=375 */ {2276, xed3_phash_find_map0x0F38_opcode0x39_vv2_375_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(158)=377 */ {158, xed3_phash_find_map0x0F38_opcode0x39_vv2_377_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1234)=380 */ {1234, xed3_phash_find_map0x0F38_opcode0x39_vv2_380_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3297)=382 */ {3297, xed3_phash_find_map0x0F38_opcode0x39_vv2_382_l1},
/*h(713)=383 */ {713, xed3_phash_find_map0x0F38_opcode0x39_vv2_383_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1179)=385 */ {1179, xed3_phash_find_map0x0F38_opcode0x39_vv2_385_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(658)=387 */ {658, xed3_phash_find_map0x0F38_opcode0x39_vv2_387_l1},
/*h(1268)=388 */ {1268, xed3_phash_find_map0x0F38_opcode0x39_vv2_388_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2721)=390 */ {2721, xed3_phash_find_map0x0F38_opcode0x39_vv2_390_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2200)=392 */ {2200, xed3_phash_find_map0x0F38_opcode0x39_vv2_392_l1},
/*h(2810)=393 */ {2810, xed3_phash_find_map0x0F38_opcode0x39_vv2_393_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2289)=395 */ {2289, xed3_phash_find_map0x0F38_opcode0x39_vv2_395_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1158)=397 */ {1158, xed3_phash_find_map0x0F38_opcode0x39_vv2_397_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2234)=400 */ {2234, xed3_phash_find_map0x0F38_opcode0x39_vv2_400_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2700)=402 */ {2700, xed3_phash_find_map0x0F38_opcode0x39_vv2_402_l1},
/*h(3310)=403 */ {3310, xed3_phash_find_map0x0F38_opcode0x39_vv2_403_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2179)=405 */ {2179, xed3_phash_find_map0x0F38_opcode0x39_vv2_405_l1},
/*h(438)=406 */ {438, xed3_phash_find_map0x0F38_opcode0x39_vv2_406_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2268)=408 */ {2268, xed3_phash_find_map0x0F38_opcode0x39_vv2_408_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2734)=410 */ {2734, xed3_phash_find_map0x0F38_opcode0x39_vv2_410_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3200)=412 */ {3200, xed3_phash_find_map0x0F38_opcode0x39_vv2_412_l1},
/*h(1226)=413 */ {1226, xed3_phash_find_map0x0F38_opcode0x39_vv2_413_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2302)=415 */ {2302, xed3_phash_find_map0x0F38_opcode0x39_vv2_415_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1171)=417 */ {1171, xed3_phash_find_map0x0F38_opcode0x39_vv2_417_l1},
/*h(184)=418 */ {184, xed3_phash_find_map0x0F38_opcode0x39_vv2_418_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1260)=420 */ {1260, xed3_phash_find_map0x0F38_opcode0x39_vv2_420_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2713)=422 */ {2713, xed3_phash_find_map0x0F38_opcode0x39_vv2_422_l1},
/*h(3323)=423 */ {3323, xed3_phash_find_map0x0F38_opcode0x39_vv2_423_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2802)=425 */ {2802, xed3_phash_find_map0x0F38_opcode0x39_vv2_425_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3268)=427 */ {3268, xed3_phash_find_map0x0F38_opcode0x39_vv2_427_l1},
/*h(2281)=428 */ {2281, xed3_phash_find_map0x0F38_opcode0x39_vv2_428_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(163)=430 */ {163, xed3_phash_find_map0x0F38_opcode0x39_vv2_430_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2226)=432 */ {2226, xed3_phash_find_map0x0F38_opcode0x39_vv2_432_l1},
/*h(252)=433 */ {252, xed3_phash_find_map0x0F38_opcode0x39_vv2_433_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2692)=435 */ {2692, xed3_phash_find_map0x0F38_opcode0x39_vv2_435_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1184)=437 */ {1184, xed3_phash_find_map0x0F38_opcode0x39_vv2_437_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1273)=440 */ {1273, xed3_phash_find_map0x0F38_opcode0x39_vv2_440_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2726)=442 */ {2726, xed3_phash_find_map0x0F38_opcode0x39_vv2_442_l1},
/*h(752)=443 */ {752, xed3_phash_find_map0x0F38_opcode0x39_vv2_443_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1218)=445 */ {1218, xed3_phash_find_map0x0F38_opcode0x39_vv2_445_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3281)=447 */ {3281, xed3_phash_find_map0x0F38_opcode0x39_vv2_447_l1},
/*h(2294)=448 */ {2294, xed3_phash_find_map0x0F38_opcode0x39_vv2_448_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1163)=450 */ {1163, xed3_phash_find_map0x0F38_opcode0x39_vv2_450_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3226)=452 */ {3226, xed3_phash_find_map0x0F38_opcode0x39_vv2_452_l1},
/*h(1252)=453 */ {1252, xed3_phash_find_map0x0F38_opcode0x39_vv2_453_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2705)=455 */ {2705, xed3_phash_find_map0x0F38_opcode0x39_vv2_455_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2184)=457 */ {2184, xed3_phash_find_map0x0F38_opcode0x39_vv2_457_l1},
/*h(2794)=458 */ {2794, xed3_phash_find_map0x0F38_opcode0x39_vv2_458_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(676)=460 */ {676, xed3_phash_find_map0x0F38_opcode0x39_vv2_460_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2739)=462 */ {2739, xed3_phash_find_map0x0F38_opcode0x39_vv2_462_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(244)=465 */ {244, xed3_phash_find_map0x0F38_opcode0x39_vv2_465_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3294)=467 */ {3294, xed3_phash_find_map0x0F38_opcode0x39_vv2_467_l1},
/*h(710)=468 */ {710, xed3_phash_find_map0x0F38_opcode0x39_vv2_468_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1176)=470 */ {1176, xed3_phash_find_map0x0F38_opcode0x39_vv2_470_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2252)=472 */ {2252, xed3_phash_find_map0x0F38_opcode0x39_vv2_472_l1},
/*h(1265)=473 */ {1265, xed3_phash_find_map0x0F38_opcode0x39_vv2_473_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(744)=475 */ {744, xed3_phash_find_map0x0F38_opcode0x39_vv2_475_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1210)=477 */ {1210, xed3_phash_find_map0x0F38_opcode0x39_vv2_477_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3273)=480 */ {3273, xed3_phash_find_map0x0F38_opcode0x39_vv2_480_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1155)=482 */ {1155, xed3_phash_find_map0x0F38_opcode0x39_vv2_482_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1244)=485 */ {1244, xed3_phash_find_map0x0F38_opcode0x39_vv2_485_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3307)=487 */ {3307, xed3_phash_find_map0x0F38_opcode0x39_vv2_487_l1},
/*h(723)=488 */ {723, xed3_phash_find_map0x0F38_opcode0x39_vv2_488_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2176)=490 */ {2176, xed3_phash_find_map0x0F38_opcode0x39_vv2_490_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(668)=492 */ {668, xed3_phash_find_map0x0F38_opcode0x39_vv2_492_l1},
/*h(1278)=493 */ {1278, xed3_phash_find_map0x0F38_opcode0x39_vv2_493_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2731)=495 */ {2731, xed3_phash_find_map0x0F38_opcode0x39_vv2_495_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2210)=497 */ {2210, xed3_phash_find_map0x0F38_opcode0x39_vv2_497_l1},
/*h(236)=498 */ {236, xed3_phash_find_map0x0F38_opcode0x39_vv2_498_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3286)=500 */ {3286, xed3_phash_find_map0x0F38_opcode0x39_vv2_500_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1168)=502 */ {1168, xed3_phash_find_map0x0F38_opcode0x39_vv2_502_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1257)=505 */ {1257, xed3_phash_find_map0x0F38_opcode0x39_vv2_505_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3320)=507 */ {3320, xed3_phash_find_map0x0F38_opcode0x39_vv2_507_l1},
/*h(736)=508 */ {736, xed3_phash_find_map0x0F38_opcode0x39_vv2_508_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1202)=510 */ {1202, xed3_phash_find_map0x0F38_opcode0x39_vv2_510_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3265)=512 */ {3265, xed3_phash_find_map0x0F38_opcode0x39_vv2_512_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(160)=515 */ {160, xed3_phash_find_map0x0F38_opcode0x39_vv2_515_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1236)=517 */ {1236, xed3_phash_find_map0x0F38_opcode0x39_vv2_517_l1},
/*h(249)=518 */ {249, xed3_phash_find_map0x0F38_opcode0x39_vv2_518_l1},
/*h(2689)=519 */ {2689, xed3_phash_find_map0x0F38_opcode0x39_vv2_519_l1},
/*h(3299)=520 */ {3299, xed3_phash_find_map0x0F38_opcode0x39_vv2_520_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2778)=522 */ {2778, xed3_phash_find_map0x0F38_opcode0x39_vv2_522_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1270)=525 */ {1270, xed3_phash_find_map0x0F38_opcode0x39_vv2_525_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2723)=527 */ {2723, xed3_phash_find_map0x0F38_opcode0x39_vv2_527_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(228)=530 */ {228, xed3_phash_find_map0x0F38_opcode0x39_vv2_530_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3278)=532 */ {3278, xed3_phash_find_map0x0F38_opcode0x39_vv2_532_l1},
/*h(2291)=533 */ {2291, xed3_phash_find_map0x0F38_opcode0x39_vv2_533_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1160)=535 */ {1160, xed3_phash_find_map0x0F38_opcode0x39_vv2_535_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2236)=537 */ {2236, xed3_phash_find_map0x0F38_opcode0x39_vv2_537_l1},
/*h(1249)=538 */ {1249, xed3_phash_find_map0x0F38_opcode0x39_vv2_538_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2702)=540 */ {2702, xed3_phash_find_map0x0F38_opcode0x39_vv2_540_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1194)=542 */ {1194, xed3_phash_find_map0x0F38_opcode0x39_vv2_542_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(673)=545 */ {673, xed3_phash_find_map0x0F38_opcode0x39_vv2_545_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2736)=547 */ {2736, xed3_phash_find_map0x0F38_opcode0x39_vv2_547_l1},
/*h(762)=548 */ {762, xed3_phash_find_map0x0F38_opcode0x39_vv2_548_l1},
/*h(3202)=549 */ {3202, xed3_phash_find_map0x0F38_opcode0x39_vv2_549_l1},
/*h(1228)=550 */ {1228, xed3_phash_find_map0x0F38_opcode0x39_vv2_550_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3291)=552 */ {3291, xed3_phash_find_map0x0F38_opcode0x39_vv2_552_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(186)=555 */ {186, xed3_phash_find_map0x0F38_opcode0x39_vv2_555_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(652)=557 */ {652, xed3_phash_find_map0x0F38_opcode0x39_vv2_557_l1},
/*h(1262)=558 */ {1262, xed3_phash_find_map0x0F38_opcode0x39_vv2_558_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2715)=560 */ {2715, xed3_phash_find_map0x0F38_opcode0x39_vv2_560_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2804)=562 */ {2804, xed3_phash_find_map0x0F38_opcode0x39_vv2_562_l1},
/*h(220)=563 */ {220, xed3_phash_find_map0x0F38_opcode0x39_vv2_563_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(2283)=565 */ {2283, xed3_phash_find_map0x0F38_opcode0x39_vv2_565_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1152)=567 */ {1152, xed3_phash_find_map0x0F38_opcode0x39_vv2_567_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1241)=570 */ {1241, xed3_phash_find_map0x0F38_opcode0x39_vv2_570_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3304)=572 */ {3304, xed3_phash_find_map0x0F38_opcode0x39_vv2_572_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(1186)=575 */ {1186, xed3_phash_find_map0x0F38_opcode0x39_vv2_575_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(3249)=577 */ {3249, xed3_phash_find_map0x0F38_opcode0x39_vv2_577_l1},
/*h(1275)=578 */ {1275, xed3_phash_find_map0x0F38_opcode0x39_vv2_578_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
/*h(144)=580 */ {144, xed3_phash_find_map0x0F38_opcode0x39_vv2_580_l1},
/*empty slot2 */ {0, xed_phash_invalid_const},
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 582ULL, u.s.hi32);
return (*lu_table[hidx].l2_func)(d);
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[599] = {
/*h(1198)=0 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1198, 6463},
/*h(200)=1 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {200, 6460},
/*h(2796)=2 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2796, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2198)=5 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2198, 6459},
/*h(1200)=6 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1200, 6464},
/*h(202)=7 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {202, 6460},
/*h(2798)=8 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2798, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2200)=11 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2200, 6460},
/*h(1202)=12 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1202, 6464},
/*h(204)=13 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {204, 6459},
/*h(2800)=14 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2800, 6462},
/*empty slot1 */ {0,0},
/*h(3200)=16 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3200, 6464},
/*h(2202)=17 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2202, 6460},
/*h(1204)=18 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1204, 6463},
/*h(206)=19 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {206, 6459},
/*h(2802)=20 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2802, 6462},
/*empty slot1 */ {0,0},
/*h(3202)=22 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3202, 6464},
/*h(2204)=23 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2204, 6459},
/*h(1206)=24 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1206, 6463},
/*h(208)=25 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {208, 6460},
/*h(2804)=26 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2804, 6461},
/*empty slot1 */ {0,0},
/*h(3204)=28 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3204, 6463},
/*h(2206)=29 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2206, 6459},
/*h(1208)=30 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1208, 6464},
/*h(210)=31 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {210, 6460},
/*h(2806)=32 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2806, 6461},
/*empty slot1 */ {0,0},
/*h(3206)=34 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3206, 6463},
/*h(2208)=35 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2208, 6460},
/*h(1210)=36 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1210, 6464},
/*h(212)=37 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {212, 6459},
/*h(2808)=38 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2808, 6462},
/*empty slot1 */ {0,0},
/*h(3208)=40 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3208, 6464},
/*h(2210)=41 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2210, 6460},
/*h(1212)=42 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1212, 6463},
/*h(214)=43 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {214, 6459},
/*h(2810)=44 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2810, 6462},
/*empty slot1 */ {0,0},
/*h(3210)=46 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3210, 6464},
/*h(2212)=47 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2212, 6459},
/*h(1214)=48 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1214, 6463},
/*h(216)=49 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {216, 6460},
/*h(2812)=50 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2812, 6461},
/*empty slot1 */ {0,0},
/*h(3212)=52 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3212, 6463},
/*h(2214)=53 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2214, 6459},
/*h(1216)=54 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1216, 6464},
/*h(218)=55 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {218, 6460},
/*h(2814)=56 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2814, 6461},
/*empty slot1 */ {0,0},
/*h(3214)=58 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3214, 6463},
/*h(2216)=59 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2216, 6460},
/*h(1218)=60 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1218, 6464},
/*h(220)=61 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {220, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3216)=64 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3216, 6464},
/*h(2218)=65 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2218, 6460},
/*h(1220)=66 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1220, 6463},
/*h(222)=67 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {222, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3218)=70 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3218, 6464},
/*h(2220)=71 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2220, 6459},
/*h(1222)=72 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1222, 6463},
/*h(224)=73 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {224, 6460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3220)=76 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3220, 6463},
/*h(2222)=77 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2222, 6459},
/*h(1224)=78 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1224, 6464},
/*h(226)=79 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {226, 6460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3222)=82 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3222, 6463},
/*h(2224)=83 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2224, 6460},
/*h(1226)=84 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1226, 6464},
/*h(228)=85 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {228, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3224)=88 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3224, 6464},
/*h(2226)=89 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2226, 6460},
/*h(1228)=90 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1228, 6463},
/*h(230)=91 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {230, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3226)=94 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3226, 6464},
/*h(2228)=95 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2228, 6459},
/*h(1230)=96 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1230, 6463},
/*h(232)=97 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {232, 6460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3228)=100 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3228, 6463},
/*h(2230)=101 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2230, 6459},
/*h(1232)=102 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1232, 6464},
/*h(234)=103 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {234, 6460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3230)=106 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3230, 6463},
/*h(2232)=107 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2232, 6460},
/*h(1234)=108 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1234, 6464},
/*h(236)=109 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {236, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(3232)=112 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3232, 6464},
/*h(2234)=113 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2234, 6460},
/*h(1236)=114 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1236, 6463},
/*h(238)=115 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {238, 6459},
/*h(438)=116 EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR  ZEROING=0 MASK=0*/ {438, 6133},
/*empty slot1 */ {0,0},
/*h(3234)=118 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3234, 6464},
/*h(2236)=119 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2236, 6459},
/*h(1238)=120 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1238, 6463},
/*h(240)=121 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {240, 6460},
/*empty slot1 */ {0,0},
/*h(640)=123 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {640, 6462},
/*h(3236)=124 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3236, 6463},
/*h(2238)=125 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2238, 6459},
/*h(1240)=126 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1240, 6464},
/*h(242)=127 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {242, 6460},
/*empty slot1 */ {0,0},
/*h(642)=129 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {642, 6462},
/*h(3238)=130 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3238, 6463},
/*h(2240)=131 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2240, 6460},
/*h(1242)=132 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1242, 6464},
/*h(244)=133 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {244, 6459},
/*empty slot1 */ {0,0},
/*h(644)=135 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {644, 6461},
/*h(3240)=136 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3240, 6464},
/*h(2242)=137 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2242, 6460},
/*h(1244)=138 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1244, 6463},
/*h(246)=139 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {246, 6459},
/*empty slot1 */ {0,0},
/*h(646)=141 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {646, 6461},
/*h(3242)=142 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3242, 6464},
/*h(2244)=143 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2244, 6459},
/*h(1246)=144 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1246, 6463},
/*h(248)=145 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {248, 6460},
/*empty slot1 */ {0,0},
/*h(648)=147 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {648, 6462},
/*h(3244)=148 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3244, 6463},
/*h(2246)=149 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2246, 6459},
/*h(1248)=150 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1248, 6464},
/*h(250)=151 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {250, 6460},
/*empty slot1 */ {0,0},
/*h(650)=153 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {650, 6462},
/*h(3246)=154 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3246, 6463},
/*h(2248)=155 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2248, 6460},
/*h(1250)=156 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1250, 6464},
/*h(252)=157 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {252, 6459},
/*empty slot1 */ {0,0},
/*h(652)=159 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {652, 6461},
/*h(3248)=160 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3248, 6464},
/*h(2250)=161 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2250, 6460},
/*h(1252)=162 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1252, 6463},
/*h(254)=163 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {254, 6459},
/*empty slot1 */ {0,0},
/*h(654)=165 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {654, 6461},
/*h(3250)=166 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3250, 6464},
/*h(2252)=167 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2252, 6459},
/*h(1254)=168 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1254, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(656)=171 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {656, 6462},
/*h(3252)=172 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3252, 6463},
/*h(2254)=173 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2254, 6459},
/*h(1256)=174 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1256, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(658)=177 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {658, 6462},
/*h(3254)=178 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3254, 6463},
/*h(2256)=179 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2256, 6460},
/*h(1258)=180 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1258, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(660)=183 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {660, 6461},
/*h(3256)=184 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3256, 6464},
/*h(2258)=185 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2258, 6460},
/*h(1260)=186 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1260, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(662)=189 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {662, 6461},
/*h(3258)=190 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3258, 6464},
/*h(2260)=191 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2260, 6459},
/*h(1262)=192 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1262, 6463},
/*h(1462)=193 EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR  ZEROING=0 MASK=0*/ {1462, 6132},
/*empty slot1 */ {0,0},
/*h(664)=195 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {664, 6462},
/*h(3260)=196 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3260, 6463},
/*h(2262)=197 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2262, 6459},
/*h(1264)=198 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1264, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(666)=201 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {666, 6462},
/*h(3262)=202 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3262, 6463},
/*h(2264)=203 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2264, 6460},
/*h(1266)=204 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1266, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(668)=207 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {668, 6461},
/*h(3264)=208 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3264, 6464},
/*h(2266)=209 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2266, 6460},
/*h(1268)=210 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1268, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(670)=213 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {670, 6461},
/*h(3266)=214 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3266, 6464},
/*h(2268)=215 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2268, 6459},
/*h(1270)=216 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1270, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(672)=219 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {672, 6462},
/*h(3268)=220 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3268, 6463},
/*h(2270)=221 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2270, 6459},
/*h(1272)=222 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1272, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(674)=225 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {674, 6462},
/*h(3270)=226 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3270, 6463},
/*h(2272)=227 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2272, 6460},
/*h(1274)=228 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1274, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(676)=231 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {676, 6461},
/*h(3272)=232 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3272, 6464},
/*h(2274)=233 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2274, 6460},
/*h(1276)=234 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1276, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(678)=237 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {678, 6461},
/*h(3274)=238 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3274, 6464},
/*h(2276)=239 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2276, 6459},
/*h(1278)=240 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1278, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(680)=243 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {680, 6462},
/*h(3276)=244 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3276, 6463},
/*h(2278)=245 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2278, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(682)=249 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {682, 6462},
/*h(3278)=250 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3278, 6463},
/*h(2280)=251 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2280, 6460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(684)=255 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {684, 6461},
/*h(3280)=256 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3280, 6464},
/*h(2282)=257 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2282, 6460},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(686)=261 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {686, 6461},
/*h(3282)=262 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3282, 6464},
/*h(2284)=263 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2284, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(688)=267 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {688, 6462},
/*h(3284)=268 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3284, 6463},
/*h(2286)=269 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2286, 6459},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(690)=273 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {690, 6462},
/*h(3286)=274 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3286, 6463},
/*h(2288)=275 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2288, 6460},
/*empty slot1 */ {0,0},
/*h(2688)=277 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2688, 6462},
/*empty slot1 */ {0,0},
/*h(692)=279 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {692, 6461},
/*h(3288)=280 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3288, 6464},
/*h(2290)=281 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2290, 6460},
/*empty slot1 */ {0,0},
/*h(2690)=283 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2690, 6462},
/*empty slot1 */ {0,0},
/*h(694)=285 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {694, 6461},
/*h(3290)=286 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3290, 6464},
/*h(2292)=287 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2292, 6459},
/*empty slot1 */ {0,0},
/*h(2692)=289 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2692, 6461},
/*empty slot1 */ {0,0},
/*h(696)=291 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {696, 6462},
/*h(3292)=292 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3292, 6463},
/*h(2294)=293 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2294, 6459},
/*empty slot1 */ {0,0},
/*h(2694)=295 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2694, 6461},
/*empty slot1 */ {0,0},
/*h(698)=297 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {698, 6462},
/*h(3294)=298 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3294, 6463},
/*h(2296)=299 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2296, 6460},
/*empty slot1 */ {0,0},
/*h(2696)=301 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2696, 6462},
/*empty slot1 */ {0,0},
/*h(700)=303 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {700, 6461},
/*h(3296)=304 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3296, 6464},
/*h(2298)=305 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2298, 6460},
/*empty slot1 */ {0,0},
/*h(2698)=307 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2698, 6462},
/*empty slot1 */ {0,0},
/*h(702)=309 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {702, 6461},
/*h(3298)=310 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3298, 6464},
/*h(2300)=311 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2300, 6459},
/*empty slot1 */ {0,0},
/*h(2700)=313 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2700, 6461},
/*empty slot1 */ {0,0},
/*h(704)=315 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {704, 6462},
/*h(3300)=316 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3300, 6463},
/*h(2302)=317 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2302, 6459},
/*empty slot1 */ {0,0},
/*h(2702)=319 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2702, 6461},
/*empty slot1 */ {0,0},
/*h(706)=321 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {706, 6462},
/*h(3302)=322 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3302, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2704)=325 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2704, 6462},
/*empty slot1 */ {0,0},
/*h(708)=327 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {708, 6461},
/*h(3304)=328 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3304, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2706)=331 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2706, 6462},
/*empty slot1 */ {0,0},
/*h(710)=333 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {710, 6461},
/*h(3306)=334 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3306, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2708)=337 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2708, 6461},
/*empty slot1 */ {0,0},
/*h(712)=339 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {712, 6462},
/*h(3308)=340 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3308, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2710)=343 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2710, 6461},
/*empty slot1 */ {0,0},
/*h(714)=345 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {714, 6462},
/*h(3310)=346 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3310, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2712)=349 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2712, 6462},
/*empty slot1 */ {0,0},
/*h(716)=351 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {716, 6461},
/*h(3312)=352 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3312, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2714)=355 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2714, 6462},
/*empty slot1 */ {0,0},
/*h(718)=357 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {718, 6461},
/*h(3314)=358 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3314, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2716)=361 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2716, 6461},
/*empty slot1 */ {0,0},
/*h(720)=363 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {720, 6462},
/*h(3316)=364 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3316, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2718)=367 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2718, 6461},
/*empty slot1 */ {0,0},
/*h(722)=369 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {722, 6462},
/*h(3318)=370 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3318, 6463},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2720)=373 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2720, 6462},
/*empty slot1 */ {0,0},
/*h(724)=375 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {724, 6461},
/*h(3320)=376 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3320, 6464},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2722)=379 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2722, 6462},
/*empty slot1 */ {0,0},
/*h(726)=381 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {726, 6461},
/*h(3322)=382 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {3322, 6464},
/*empty slot1 */ {0,0},
/*h(128)=384 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {128, 6460},
/*h(2724)=385 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2724, 6461},
/*empty slot1 */ {0,0},
/*h(728)=387 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {728, 6462},
/*h(3324)=388 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3324, 6463},
/*empty slot1 */ {0,0},
/*h(130)=390 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {130, 6460},
/*h(2726)=391 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2726, 6461},
/*empty slot1 */ {0,0},
/*h(730)=393 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {730, 6462},
/*h(3326)=394 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {3326, 6463},
/*empty slot1 */ {0,0},
/*h(132)=396 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {132, 6459},
/*h(2728)=397 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2728, 6462},
/*empty slot1 */ {0,0},
/*h(732)=399 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {732, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(134)=402 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {134, 6459},
/*h(2730)=403 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2730, 6462},
/*empty slot1 */ {0,0},
/*h(734)=405 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {734, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(136)=408 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {136, 6460},
/*h(2732)=409 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2732, 6461},
/*empty slot1 */ {0,0},
/*h(736)=411 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {736, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(138)=414 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {138, 6460},
/*h(2734)=415 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2734, 6461},
/*empty slot1 */ {0,0},
/*h(738)=417 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {738, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(140)=420 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {140, 6459},
/*h(2736)=421 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2736, 6462},
/*empty slot1 */ {0,0},
/*h(740)=423 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {740, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(142)=426 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {142, 6459},
/*h(2738)=427 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2738, 6462},
/*empty slot1 */ {0,0},
/*h(742)=429 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {742, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(144)=432 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {144, 6460},
/*h(2740)=433 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2740, 6461},
/*empty slot1 */ {0,0},
/*h(744)=435 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {744, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(146)=438 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {146, 6460},
/*h(2742)=439 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2742, 6461},
/*empty slot1 */ {0,0},
/*h(746)=441 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {746, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(148)=444 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {148, 6459},
/*h(2744)=445 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2744, 6462},
/*empty slot1 */ {0,0},
/*h(748)=447 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {748, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(150)=450 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {150, 6459},
/*h(2746)=451 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2746, 6462},
/*empty slot1 */ {0,0},
/*h(750)=453 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {750, 6461},
/*h(950)=454 EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR  ZEROING=0 MASK=0*/ {950, 6134},
/*empty slot1 */ {0,0},
/*h(152)=456 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {152, 6460},
/*h(2748)=457 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2748, 6461},
/*empty slot1 */ {0,0},
/*h(752)=459 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {752, 6462},
/*empty slot1 */ {0,0},
/*h(1152)=461 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1152, 6464},
/*h(154)=462 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {154, 6460},
/*h(2750)=463 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2750, 6461},
/*empty slot1 */ {0,0},
/*h(754)=465 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {754, 6462},
/*empty slot1 */ {0,0},
/*h(1154)=467 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1154, 6464},
/*h(156)=468 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {156, 6459},
/*h(2752)=469 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2752, 6462},
/*empty slot1 */ {0,0},
/*h(756)=471 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {756, 6461},
/*empty slot1 */ {0,0},
/*h(1156)=473 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1156, 6463},
/*h(158)=474 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {158, 6459},
/*h(2754)=475 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2754, 6462},
/*empty slot1 */ {0,0},
/*h(758)=477 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {758, 6461},
/*empty slot1 */ {0,0},
/*h(1158)=479 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1158, 6463},
/*h(160)=480 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {160, 6460},
/*h(2756)=481 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2756, 6461},
/*empty slot1 */ {0,0},
/*h(760)=483 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {760, 6462},
/*empty slot1 */ {0,0},
/*h(1160)=485 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1160, 6464},
/*h(162)=486 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {162, 6460},
/*h(2758)=487 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2758, 6461},
/*empty slot1 */ {0,0},
/*h(762)=489 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {762, 6462},
/*empty slot1 */ {0,0},
/*h(1162)=491 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1162, 6464},
/*h(164)=492 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {164, 6459},
/*h(2760)=493 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2760, 6462},
/*empty slot1 */ {0,0},
/*h(764)=495 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {764, 6461},
/*empty slot1 */ {0,0},
/*h(1164)=497 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1164, 6463},
/*h(166)=498 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {166, 6459},
/*h(2762)=499 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2762, 6462},
/*empty slot1 */ {0,0},
/*h(766)=501 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {766, 6461},
/*empty slot1 */ {0,0},
/*h(1166)=503 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1166, 6463},
/*h(168)=504 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {168, 6460},
/*h(2764)=505 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2764, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1168)=509 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1168, 6464},
/*h(170)=510 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {170, 6460},
/*h(2766)=511 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2766, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1170)=515 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1170, 6464},
/*h(172)=516 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {172, 6459},
/*h(2768)=517 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2768, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1172)=521 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1172, 6463},
/*h(174)=522 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {174, 6459},
/*h(2770)=523 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2770, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1174)=527 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1174, 6463},
/*h(176)=528 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {176, 6460},
/*h(2772)=529 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2772, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1176)=533 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1176, 6464},
/*h(178)=534 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {178, 6460},
/*h(2774)=535 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2774, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2176)=538 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2176, 6460},
/*h(1178)=539 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1178, 6464},
/*h(180)=540 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {180, 6459},
/*h(2776)=541 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2776, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2178)=544 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2178, 6460},
/*h(1180)=545 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1180, 6463},
/*h(182)=546 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {182, 6459},
/*h(2778)=547 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2778, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2180)=550 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2180, 6459},
/*h(1182)=551 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1182, 6463},
/*h(184)=552 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {184, 6460},
/*h(2780)=553 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2780, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2182)=556 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2182, 6459},
/*h(1184)=557 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1184, 6464},
/*h(186)=558 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {186, 6460},
/*h(2782)=559 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2782, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2184)=562 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2184, 6460},
/*h(1186)=563 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1186, 6464},
/*h(188)=564 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {188, 6459},
/*h(2784)=565 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2784, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2186)=568 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2186, 6460},
/*h(1188)=569 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1188, 6463},
/*h(190)=570 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {190, 6459},
/*h(2786)=571 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2786, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2188)=574 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2188, 6459},
/*h(1190)=575 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1190, 6463},
/*h(192)=576 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {192, 6460},
/*h(2788)=577 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2788, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2190)=580 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2190, 6459},
/*h(1192)=581 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1192, 6464},
/*h(194)=582 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {194, 6460},
/*h(2790)=583 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {2790, 6461},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2192)=586 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2192, 6460},
/*h(1194)=587 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {1194, 6464},
/*h(196)=588 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {196, 6459},
/*h(2792)=589 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2792, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2194)=592 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2194, 6460},
/*h(1196)=593 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {1196, 6463},
/*h(198)=594 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {198, 6459},
/*h(2794)=595 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {2794, 6462},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2196)=598 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {2196, 6459}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 599);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6485},
/*h(76)=1 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6454},
/*h(8)=2 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6487},
/*h(12)=3 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6456},
/*h(41)=4 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6489},
/*h(45)=5 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6458},
/*h(74)=6 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6484},
/*h(78)=7 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6453},
/*h(10)=8 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6486},
/*h(14)=9 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6455},
/*h(40)=10 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6489},
/*h(44)=11 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6458},
/*h(73)=12 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6485},
/*h(77)=13 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6454},
/*h(9)=14 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6487},
/*h(13)=15 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6456},
/*h(42)=16 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6488},
/*h(46)=17 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6457}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 4191},
/*h(4)=1 EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 4190},
/*h(38)=2 EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 4193},
/*h(20)=3 EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 4192},
/*h(6)=4 EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 4189},
/*h(36)=5 EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 4194}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4178},
/*h(76)=1 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4261},
/*h(8)=2 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4180},
/*h(12)=3 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4263},
/*h(41)=4 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4182},
/*h(45)=5 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4265},
/*h(74)=6 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4177},
/*h(78)=7 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4260},
/*h(10)=8 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4179},
/*h(14)=9 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4262},
/*h(40)=10 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4182},
/*h(44)=11 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4265},
/*h(73)=12 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4178},
/*h(77)=13 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4261},
/*h(9)=14 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4180},
/*h(13)=15 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4263},
/*h(42)=16 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4181},
/*h(46)=17 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4264}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256*/ {22, 5875},
/*h(4)=1 EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 5874},
/*h(38)=2 EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512*/ {38, 5877},
/*h(20)=3 EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 5876},
/*h(6)=4 EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128*/ {6, 5873},
/*h(36)=5 EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 5878}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x3f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5824},
/*h(76)=1 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5851},
/*h(8)=2 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5826},
/*h(12)=3 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5853},
/*h(41)=4 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5828},
/*h(45)=5 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5855},
/*h(74)=6 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5823},
/*h(78)=7 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5850},
/*h(10)=8 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5825},
/*h(14)=9 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5852},
/*h(40)=10 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5828},
/*h(44)=11 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5855},
/*h(73)=12 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5824},
/*h(77)=13 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5851},
/*h(9)=14 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5826},
/*h(13)=15 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5853},
/*h(42)=16 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5827},
/*h(46)=17 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5854}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x40_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5693},
/*h(76)=1 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5731},
/*h(8)=2 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5695},
/*h(12)=3 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5727},
/*h(41)=4 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5697},
/*h(45)=5 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5729},
/*h(74)=6 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5692},
/*h(78)=7 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5730},
/*h(10)=8 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5694},
/*h(14)=9 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5726},
/*h(40)=10 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5697},
/*h(44)=11 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5729},
/*h(73)=12 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5693},
/*h(77)=13 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5731},
/*h(9)=14 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5695},
/*h(13)=15 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5727},
/*h(42)=16 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5696},
/*h(46)=17 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5728}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x42_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[47] = {
/*h(89)=0 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 5461},
/*empty slot1 */ {0,0},
/*h(602)=2 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5457},
/*h(348)=3 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 5488},
/*h(94)=4 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5485},
/*empty slot1 */ {0,0},
/*h(607)=6 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {607, 5483},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(345)=10 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 5463},
/*h(91)=11 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {91, 5458},
/*empty slot1 */ {0,0},
/*h(604)=13 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5484},
/*h(350)=14 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5487},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(863)=17 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {863, 5483},
/*h(88)=18 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 5461},
/*empty slot1 */ {0,0},
/*h(601)=20 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 5459},
/*h(347)=21 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {347, 5458},
/*h(93)=22 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 5486},
/*empty slot1 */ {0,0},
/*h(606)=24 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5482},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(344)=28 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 5463},
/*h(90)=29 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5460},
/*empty slot1 */ {0,0},
/*h(603)=31 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {603, 5458},
/*h(349)=32 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 5488},
/*h(95)=33 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {95, 5483},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=38 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 5459},
/*h(346)=39 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5462},
/*h(92)=40 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 5486},
/*h(859)=41 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {859, 5458},
/*h(605)=42 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5484},
/*h(351)=43 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {351, 5483},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 47ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x43_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 6514},
/*h(15)=2 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {15, 5295},
/*h(12)=3 EVV 0x43 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5296},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5294},
/*h(11)=6 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {11, 6515},
/*h(8)=7 EVV 0x43 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 6516}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x44_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(601)=0 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 3999},
/*h(88)=1 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4001},
/*h(94)=2 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 4046},
/*h(349)=3 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4049},
/*h(604)=4 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4045},
/*h(90)=5 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4000},
/*h(345)=6 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4003},
/*h(600)=7 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 3999},
/*h(606)=8 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 4044},
/*h(93)=9 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 4047},
/*h(348)=10 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4049},
/*h(602)=11 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 3998},
/*h(89)=12 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4001},
/*h(344)=13 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4003},
/*h(350)=14 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 4048},
/*h(605)=15 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4045},
/*h(92)=16 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 4047},
/*h(346)=17 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4002}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((11*key % 83) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x45_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4255},
/*h(76)=1 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4184},
/*h(8)=2 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4257},
/*h(12)=3 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4186},
/*h(41)=4 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4259},
/*h(45)=5 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4188},
/*h(74)=6 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4254},
/*h(78)=7 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4183},
/*h(10)=8 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4256},
/*h(14)=9 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4185},
/*h(40)=10 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4259},
/*h(44)=11 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4188},
/*h(73)=12 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4255},
/*h(77)=13 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4184},
/*h(9)=14 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4257},
/*h(13)=15 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4186},
/*h(42)=16 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4258},
/*h(46)=17 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4187}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x46_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5260},
/*h(76)=1 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5221},
/*h(8)=2 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5262},
/*h(12)=3 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5223},
/*h(41)=4 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5264},
/*h(45)=5 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5225},
/*h(74)=6 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5259},
/*h(78)=7 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5220},
/*h(10)=8 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5261},
/*h(14)=9 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5222},
/*h(40)=10 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5264},
/*h(44)=11 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5225},
/*h(73)=12 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5260},
/*h(77)=13 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5221},
/*h(9)=14 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5262},
/*h(13)=15 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5223},
/*h(42)=16 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5263},
/*h(46)=17 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5224}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x47_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6743},
/*h(76)=1 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6768},
/*h(8)=2 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6745},
/*h(12)=3 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6770},
/*h(41)=4 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6747},
/*h(45)=5 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6772},
/*h(74)=6 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6742},
/*h(78)=7 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6767},
/*h(10)=8 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6744},
/*h(14)=9 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6769},
/*h(40)=10 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6747},
/*h(44)=11 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6772},
/*h(73)=12 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6743},
/*h(77)=13 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6768},
/*h(9)=14 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6745},
/*h(13)=15 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6770},
/*h(42)=16 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6746},
/*h(46)=17 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6771}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(601)=0 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 5656},
/*h(88)=1 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 5658},
/*h(94)=2 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5641},
/*h(349)=3 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 5644},
/*h(604)=4 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5640},
/*h(90)=5 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5657},
/*h(345)=6 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 5660},
/*h(600)=7 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 5656},
/*h(606)=8 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5639},
/*h(93)=9 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 5642},
/*h(348)=10 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 5644},
/*h(602)=11 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5655},
/*h(89)=12 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 5658},
/*h(344)=13 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 5660},
/*h(350)=14 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5643},
/*h(605)=15 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5640},
/*h(92)=16 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 5642},
/*h(346)=17 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5659}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((11*key % 83) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(10)=0 EVV 0x4D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5053},
/*h(12)=1 EVV 0x4D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5039},
/*h(14)=2 EVV 0x4D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5038},
/*h(8)=3 EVV 0x4D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5054}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(601)=0 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 6426},
/*h(88)=1 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 6428},
/*h(94)=2 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 6418},
/*h(349)=3 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 6421},
/*h(604)=4 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 6417},
/*h(90)=5 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6427},
/*h(345)=6 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 6430},
/*h(600)=7 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 6426},
/*h(606)=8 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 6416},
/*h(93)=9 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 6419},
/*h(348)=10 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 6421},
/*h(602)=11 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6425},
/*h(89)=12 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 6428},
/*h(344)=13 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 6430},
/*h(350)=14 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 6420},
/*h(605)=15 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 6417},
/*h(92)=16 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 6419},
/*h(346)=17 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6429}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((11*key % 83) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x4f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(10)=0 EVV 0x4F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 3799},
/*h(12)=1 EVV 0x4F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 3815},
/*h(14)=2 EVV 0x4F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 3814},
/*h(8)=3 EVV 0x4F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 3800}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x50_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5593},
/*h(10)=3 EVV 0x50 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5588},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5591},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5593},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5589},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5591},
/*h(74)=13 EVV 0x50 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5592},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5589},
/*h(42)=17 EVV 0x50 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5590}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x51_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4495},
/*h(10)=3 EVV 0x51 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4490},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4493},
/*empty slot1 */ {0,0},
/*h(72)=8 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4495},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4491},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4493},
/*h(74)=13 EVV 0x51 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4494},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4491},
/*h(42)=17 EVV 0x51 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4492}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x52_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6604},
/*h(10)=3 EVV 0x52 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6599},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6602},
/*h(80)=7 EVV 0x52 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0  VL512  W0    ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 5574},
/*h(72)=8 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6604},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6600},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6602},
/*h(74)=13 EVV 0x52 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6603},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6600},
/*h(42)=17 EVV 0x52 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6601}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x53_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(73)=2 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4957},
/*h(10)=3 EVV 0x53 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4952},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(41)=6 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4955},
/*h(80)=7 EVV 0x53 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0  VL512  W0    ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 4037},
/*h(72)=8 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4957},
/*empty slot1 */ {0,0},
/*h(9)=10 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4953},
/*empty slot1 */ {0,0},
/*h(40)=12 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4955},
/*h(74)=13 EVV 0x53 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4956},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(8)=16 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4953},
/*h(42)=17 EVV 0x53 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4954}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x54_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(348)=0 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 5883},
/*h(346)=1 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4606},
/*h(344)=2 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {344, 4607},
/*h(94)=3 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5880},
/*h(92)=4 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 5881},
/*h(90)=5 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4604},
/*h(88)=6 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {88, 4605},
/*h(606)=7 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5884},
/*h(604)=8 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 5885},
/*h(602)=9 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4608},
/*h(600)=10 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_8_BITS() NELEM_FULLMEM()*/ {600, 4609},
/*h(350)=11 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5882}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((15*key % 31) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x55_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(601)=0 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4592},
/*h(88)=1 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4594},
/*h(94)=2 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 4581},
/*h(349)=3 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4584},
/*h(604)=4 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4580},
/*h(90)=5 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4593},
/*h(345)=6 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4596},
/*h(600)=7 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4592},
/*h(606)=8 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 4579},
/*h(93)=9 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 4582},
/*h(348)=10 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4584},
/*h(602)=11 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4591},
/*h(89)=12 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4594},
/*h(344)=13 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4596},
/*h(350)=14 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 4583},
/*h(605)=15 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4580},
/*h(92)=16 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 4582},
/*h(346)=17 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4595}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((11*key % 83) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x58_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(602)=0 EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5105},
/*h(600)=1 EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE1()*/ {600, 5104},
/*h(346)=2 EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5113},
/*h(344)=3 EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE1()*/ {344, 5112},
/*h(90)=4 EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5109},
/*h(88)=5 EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE1()*/ {88, 5108}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x59_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(348)=0 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE1()*/ {348, 5181},
/*h(346)=1 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4412},
/*h(344)=2 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE2()*/ {344, 4413},
/*h(94)=3 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5179},
/*h(92)=4 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE1()*/ {92, 5178},
/*h(90)=5 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4410},
/*h(88)=6 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE2()*/ {88, 4411},
/*h(606)=7 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5176},
/*h(604)=8 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE1()*/ {604, 5175},
/*h(602)=9 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4414},
/*h(600)=10 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE2()*/ {600, 4415},
/*h(350)=11 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5182}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((15*key % 31) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x5a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(348)=0 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 4207},
/*h(604)=1 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 4208},
/*h(344)=2 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 5351},
/*h(600)=3 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 5350}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x5b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(604)=0 EVV 0x5B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 6329},
/*h(600)=1 EVV 0x5B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 5317}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x62_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(348)=0 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_16_BITS() NELEM_GSCAT()*/ {348, 5570},
/*h(346)=1 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5526},
/*h(344)=2 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_8_BITS() NELEM_GSCAT()*/ {344, 5525},
/*h(94)=3 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5569},
/*h(92)=4 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_16_BITS() NELEM_GSCAT()*/ {92, 5568},
/*h(90)=5 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5524},
/*h(88)=6 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_8_BITS() NELEM_GSCAT()*/ {88, 5523},
/*h(606)=7 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5573},
/*h(604)=8 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_16_BITS() NELEM_GSCAT()*/ {604, 5572},
/*h(602)=9 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5528},
/*h(600)=10 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_8_BITS() NELEM_GSCAT()*/ {600, 5527},
/*h(350)=11 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5571}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((15*key % 31) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x63_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[31] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=2 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_GSCAT()*/ {600, 4912},
/*h(94)=3 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 3958},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1118)=6 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1118, 3958},
/*empty slot1 */ {0,0},
/*h(602)=8 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4913},
/*h(344)=9 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_GSCAT()*/ {344, 4910},
/*empty slot1 */ {0,0},
/*h(1626)=11 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 4913},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=14 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_GSCAT()*/ {604, 3961},
/*h(346)=15 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4911},
/*h(88)=16 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_8_BITS() NELEM_GSCAT()*/ {88, 4908},
/*empty slot1 */ {0,0},
/*h(1370)=18 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 4911},
/*empty slot1 */ {0,0},
/*h(606)=20 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 3962},
/*h(348)=21 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_GSCAT()*/ {348, 3959},
/*h(90)=22 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4909},
/*h(1630)=23 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1630, 3962},
/*empty slot1 */ {0,0},
/*h(1114)=25 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 4909},
/*empty slot1 */ {0,0},
/*h(350)=27 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 3960},
/*h(92)=28 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_16_BITS() NELEM_GSCAT()*/ {92, 3957},
/*empty slot1 */ {0,0},
/*h(1374)=30 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1374, 3960}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 31);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x64_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4249},
/*h(76)=1 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4166},
/*h(8)=2 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4251},
/*h(12)=3 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4168},
/*h(41)=4 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4253},
/*h(45)=5 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4170},
/*h(74)=6 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4248},
/*h(78)=7 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4165},
/*h(10)=8 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4250},
/*h(14)=9 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4167},
/*h(40)=10 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4253},
/*h(44)=11 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4170},
/*h(73)=12 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4249},
/*h(77)=13 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4166},
/*h(9)=14 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4251},
/*h(13)=15 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4168},
/*h(42)=16 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4252},
/*h(46)=17 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4169}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x65_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6518},
/*h(76)=1 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6546},
/*h(8)=2 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6520},
/*h(12)=3 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6548},
/*h(41)=4 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6522},
/*h(45)=5 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6550},
/*h(74)=6 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6517},
/*h(78)=7 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6545},
/*h(10)=8 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6519},
/*h(14)=9 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6547},
/*h(40)=10 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6522},
/*h(44)=11 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6550},
/*h(73)=12 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6518},
/*h(77)=13 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6546},
/*h(9)=14 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6520},
/*h(13)=15 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6548},
/*h(42)=16 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6521},
/*h(46)=17 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6549}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x66_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4203},
/*h(72)=1 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 4235},
/*h(42)=2 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4232},
/*h(78)=3 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4205},
/*h(12)=4 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 4202},
/*h(74)=5 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4234},
/*h(8)=6 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 4231},
/*h(44)=7 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 4204},
/*h(14)=8 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4201},
/*h(40)=9 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 4233},
/*h(76)=10 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 4206},
/*h(10)=11 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4230}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x70_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(14)=0 EVV 0x70 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5720},
/*h(46)=1 EVV 0x70 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5722},
/*h(78)=2 EVV 0x70 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5724},
/*h(12)=3 EVV 0x70 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 5721},
/*h(44)=4 EVV 0x70 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5723},
/*h(76)=5 EVV 0x70 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5725}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((9*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x71_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5750},
/*h(76)=1 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6691},
/*h(8)=2 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5746},
/*h(12)=3 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6687},
/*h(41)=4 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5748},
/*h(45)=5 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6689},
/*h(74)=6 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5749},
/*h(78)=7 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6690},
/*h(10)=8 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5745},
/*h(14)=9 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6686},
/*h(40)=10 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5748},
/*h(44)=11 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6689},
/*h(73)=12 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5750},
/*h(77)=13 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6691},
/*h(9)=14 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5746},
/*h(13)=15 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6687},
/*h(42)=16 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5747},
/*h(46)=17 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6688}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x72_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(14)=0 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 3855},
/*h(46)=1 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 3857},
/*h(78)=2 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 3859},
/*h(12)=3 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 3856},
/*h(44)=4 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 3858},
/*h(76)=5 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 3860}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((9*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x73_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 3848},
/*h(76)=1 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 3872},
/*h(8)=2 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 3844},
/*h(12)=3 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 3868},
/*h(41)=4 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 3846},
/*h(45)=5 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 3870},
/*h(74)=6 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 3847},
/*h(78)=7 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 3871},
/*h(10)=8 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 3843},
/*h(14)=9 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 3867},
/*h(40)=10 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 3846},
/*h(44)=11 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 3870},
/*h(73)=12 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 3848},
/*h(77)=13 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 3872},
/*h(9)=14 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 3844},
/*h(13)=15 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 3868},
/*h(42)=16 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 3845},
/*h(46)=17 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 3869}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x75_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5808},
/*h(72)=1 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 4566},
/*h(42)=2 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4563},
/*h(78)=3 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5810},
/*h(12)=4 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 5807},
/*h(74)=5 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4565},
/*h(8)=6 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 4562},
/*h(44)=7 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5809},
/*h(14)=8 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5806},
/*h(40)=9 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 4564},
/*h(76)=10 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5811},
/*h(10)=11 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4561}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x76_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5863},
/*h(76)=1 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5830},
/*h(8)=2 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5865},
/*h(12)=3 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5832},
/*h(41)=4 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5867},
/*h(45)=5 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5834},
/*h(74)=6 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5862},
/*h(78)=7 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5829},
/*h(10)=8 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5864},
/*h(14)=9 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5831},
/*h(40)=10 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5867},
/*h(44)=11 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5834},
/*h(73)=12 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5863},
/*h(77)=13 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5830},
/*h(9)=14 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5865},
/*h(13)=15 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5832},
/*h(42)=16 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5866},
/*h(46)=17 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5833}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x77_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4720},
/*h(76)=1 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4673},
/*h(8)=2 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4722},
/*h(12)=3 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4675},
/*h(41)=4 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4724},
/*h(45)=5 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4677},
/*h(74)=6 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4719},
/*h(78)=7 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4672},
/*h(10)=8 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4721},
/*h(14)=9 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4674},
/*h(40)=10 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4724},
/*h(44)=11 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4677},
/*h(73)=12 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4720},
/*h(77)=13 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4673},
/*h(9)=14 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4722},
/*h(13)=15 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4675},
/*h(42)=16 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4723},
/*h(46)=17 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4676}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x78_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(602)=0 EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5937},
/*h(600)=1 EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_8_BITS() NELEM_TUPLE1_BYTE()*/ {600, 5938},
/*h(346)=2 EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5934},
/*h(344)=3 EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_8_BITS() NELEM_TUPLE1_BYTE()*/ {344, 5935},
/*h(90)=4 EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5931},
/*h(88)=5 EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_8_BITS() NELEM_TUPLE1_BYTE()*/ {88, 5932}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x79_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(602)=0 EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6078},
/*h(600)=1 EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_16_BITS() NELEM_TUPLE1_WORD()*/ {600, 6079},
/*h(346)=2 EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6075},
/*h(344)=3 EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_16_BITS() NELEM_TUPLE1_WORD()*/ {344, 6076},
/*h(90)=4 EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6072},
/*h(88)=5 EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_16_BITS() NELEM_TUPLE1_WORD()*/ {88, 6073}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(602)=0 EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5939},
/*h(90)=1 EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5933},
/*h(346)=2 EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5936}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[3] = {
/*h(602)=0 EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 6080},
/*h(90)=1 EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 6074},
/*h(346)=2 EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 6077}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[36] = {
/*h(1398)=0 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  not64  NOEVSR*/ {1398, 5114},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1382)=4 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  not64  NOEVSR*/ {1382, 5114},
/*h(374)=5 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR*/ {374, 5110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(358)=9 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR*/ {358, 5110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2426)=12 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  mode64  W1  NOEVSR*/ {2426, 5177},
/*empty slot1 */ {0,0},
/*h(2418)=14 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  not64  NOEVSR*/ {2418, 5106},
/*empty slot1 */ {0,0},
/*h(2410)=16 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  mode64 W0  NOEVSR*/ {2410, 5107},
/*h(1402)=17 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  mode64  NOEVSR*/ {1402, 5183},
/*h(2402)=18 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  not64  NOEVSR*/ {2402, 5106},
/*h(1394)=19 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  not64  NOEVSR*/ {1394, 5114},
/*empty slot1 */ {0,0},
/*h(1386)=21 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  mode64 W0  NOEVSR*/ {1386, 5115},
/*h(378)=22 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  mode64  NOEVSR*/ {378, 5180},
/*h(1378)=23 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  not64  NOEVSR*/ {1378, 5114},
/*h(370)=24 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR*/ {370, 5110},
/*empty slot1 */ {0,0},
/*h(362)=26 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  mode64 W0  NOEVSR*/ {362, 5111},
/*empty slot1 */ {0,0},
/*h(354)=28 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR*/ {354, 5110},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2422)=31 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  not64  NOEVSR*/ {2422, 5106},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(2406)=35 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  not64  NOEVSR*/ {2406, 5106}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 36ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6433},
/*h(72)=1 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6415},
/*h(42)=2 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6412},
/*h(78)=3 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6435},
/*h(12)=4 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6432},
/*h(74)=5 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6414},
/*h(8)=6 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6411},
/*h(44)=7 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6434},
/*h(14)=8 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6431},
/*h(40)=9 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6413},
/*h(76)=10 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6436},
/*h(10)=11 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6410}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6405},
/*h(76)=1 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6445},
/*h(8)=2 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6407},
/*h(12)=3 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6447},
/*h(41)=4 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6409},
/*h(45)=5 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6449},
/*h(74)=6 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6404},
/*h(78)=7 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6444},
/*h(10)=8 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6406},
/*h(14)=9 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6446},
/*h(40)=10 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6409},
/*h(44)=11 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6449},
/*h(73)=12 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6405},
/*h(77)=13 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6445},
/*h(9)=14 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6407},
/*h(13)=15 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6447},
/*h(42)=16 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6408},
/*h(46)=17 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6448}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x7f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6233},
/*h(76)=1 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6558},
/*h(8)=2 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6235},
/*h(12)=3 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6560},
/*h(41)=4 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6237},
/*h(45)=5 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6562},
/*h(74)=6 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6232},
/*h(78)=7 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6557},
/*h(10)=8 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6234},
/*h(14)=9 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6559},
/*h(40)=10 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6237},
/*h(44)=11 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6562},
/*h(73)=12 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6233},
/*h(77)=13 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6558},
/*h(9)=14 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6235},
/*h(13)=15 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6560},
/*h(42)=16 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6236},
/*h(46)=17 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6561}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x83_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6283},
/*h(46)=1 EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6280},
/*h(12)=2 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6279},
/*h(77)=3 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6283},
/*h(13)=4 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6279},
/*h(78)=5 EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6282},
/*h(44)=6 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6281},
/*h(14)=7 EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6278},
/*h(45)=8 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6281}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x88_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(348)=0 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 4780},
/*h(346)=1 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4807},
/*h(344)=2 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 4806},
/*h(94)=3 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 4779},
/*h(92)=4 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 4778},
/*h(90)=5 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4805},
/*h(88)=6 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 4804},
/*h(606)=7 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 4777},
/*h(604)=8 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 4776},
/*h(602)=9 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4803},
/*h(600)=10 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 4802},
/*h(350)=11 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 4781}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((15*key % 31) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x89_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(348)=0 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 5566},
/*h(346)=1 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5534},
/*h(344)=2 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 5533},
/*h(94)=3 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5565},
/*h(92)=4 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 5564},
/*h(90)=5 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5532},
/*h(88)=6 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 5531},
/*h(606)=7 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5563},
/*h(604)=8 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 5562},
/*h(602)=9 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5530},
/*h(600)=10 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 5529},
/*h(350)=11 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5567}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((15*key % 31) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[31] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=2 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 5776},
/*h(94)=3 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 5764},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1118)=6 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1118, 5764},
/*empty slot1 */ {0,0},
/*h(602)=8 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5777},
/*h(344)=9 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 5780},
/*empty slot1 */ {0,0},
/*h(1626)=11 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 5777},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=14 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 5761},
/*h(346)=15 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 5781},
/*h(88)=16 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 5778},
/*empty slot1 */ {0,0},
/*h(1370)=18 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 5781},
/*empty slot1 */ {0,0},
/*h(606)=20 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5762},
/*h(348)=21 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 5765},
/*h(90)=22 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 5779},
/*h(1630)=23 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1630, 5762},
/*empty slot1 */ {0,0},
/*h(1114)=25 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 5779},
/*empty slot1 */ {0,0},
/*h(350)=27 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 5766},
/*h(92)=28 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 5763},
/*empty slot1 */ {0,0},
/*h(1374)=30 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1374, 5766}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 31);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[31] = {
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=2 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 4902},
/*h(94)=3 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 4930},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(1118)=6 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {1118, 4930},
/*empty slot1 */ {0,0},
/*h(602)=8 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4903},
/*h(344)=9 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 4906},
/*empty slot1 */ {0,0},
/*h(1626)=11 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {1626, 4903},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=14 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 4927},
/*h(346)=15 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4907},
/*h(88)=16 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 4904},
/*empty slot1 */ {0,0},
/*h(1370)=18 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {1370, 4907},
/*empty slot1 */ {0,0},
/*h(606)=20 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 4928},
/*h(348)=21 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 4931},
/*h(90)=22 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4905},
/*h(1630)=23 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {1630, 4928},
/*empty slot1 */ {0,0},
/*h(1114)=25 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {1114, 4905},
/*empty slot1 */ {0,0},
/*h(350)=27 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 4932},
/*h(92)=28 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  NOEVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 4929},
/*empty slot1 */ {0,0},
/*h(1374)=30 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {1374, 4932}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (3*key % 31);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4027},
/*h(72)=1 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 3976},
/*h(42)=2 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 3973},
/*h(78)=3 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4029},
/*h(12)=4 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 4026},
/*h(74)=5 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 3975},
/*h(8)=6 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 3972},
/*h(44)=7 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 4028},
/*h(14)=8 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4025},
/*h(40)=9 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 3974},
/*h(76)=10 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 4030},
/*h(10)=11 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 3971}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x8f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(42)=0 EVV 0x8F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0*/ {42, 4887},
/*h(8)=1 EVV 0x8F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 4886},
/*h(72)=2 EVV 0x8F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 4890},
/*h(10)=3 EVV 0x8F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0*/ {10, 4885},
/*h(74)=4 EVV 0x8F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0*/ {74, 4889},
/*h(40)=5 EVV 0x8F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ZEROING=0  ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 4888}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((8*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x90_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 6683},
/*h(486)=1 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 6663},
/*h(1510)=2 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 6664},
/*h(484)=3 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 6663},
/*h(2534)=4 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 6662},
/*h(1508)=5 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 6664},
/*h(2532)=6 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 6662},
/*h(502)=7 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 6684},
/*h(1526)=8 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 6685},
/*h(500)=9 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 6684},
/*h(2550)=10 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 6683},
/*h(1524)=11 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 6685}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x91_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 4849},
/*h(486)=1 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 4819},
/*h(1510)=2 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 4820},
/*h(484)=3 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 4819},
/*h(2534)=4 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 4818},
/*h(1508)=5 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 4820},
/*h(2532)=6 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 4818},
/*h(502)=7 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 4850},
/*h(1526)=8 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 4851},
/*h(500)=9 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 4850},
/*h(2550)=10 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 4849},
/*h(1524)=11 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 4851}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x92_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 4830},
/*h(486)=1 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 4815},
/*h(1510)=2 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 4816},
/*h(484)=3 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 4815},
/*h(2534)=4 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 4814},
/*h(1508)=5 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 4816},
/*h(2532)=6 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 4814},
/*h(502)=7 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 4831},
/*h(1526)=8 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 4832},
/*h(500)=9 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 4831},
/*h(2550)=10 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 4830},
/*h(1524)=11 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 4832}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x93_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 4080},
/*h(486)=1 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 4093},
/*h(1510)=2 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 4094},
/*h(484)=3 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 4093},
/*h(2534)=4 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 4092},
/*h(1508)=5 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 4094},
/*h(2532)=6 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 4092},
/*h(502)=7 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 4081},
/*h(1526)=8 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 4082},
/*h(500)=9 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 4081},
/*h(2550)=10 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 4080},
/*h(1524)=11 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 4082}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x96_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6654},
/*h(14)=1 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6643},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6653},
/*h(15)=4 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6641},
/*h(111)=5 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6641},
/*h(43)=6 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6649},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6646},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6650},
/*h(45)=12 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6646},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6650},
/*h(46)=15 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6645},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6648},
/*h(47)=18 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6641},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6649},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6642},
/*h(8)=24 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6652},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6642},
/*h(9)=27 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6652},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6640},
/*h(10)=30 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6651},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6641},
/*h(11)=33 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6649},
/*h(107)=34 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6649},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6644},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6654},
/*h(13)=39 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6644},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x97_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6187},
/*h(14)=1 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6156},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6186},
/*h(15)=4 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6154},
/*h(111)=5 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6154},
/*h(43)=6 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6182},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6159},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6183},
/*h(45)=12 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6159},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6183},
/*h(46)=15 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6158},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6181},
/*h(47)=18 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6154},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6182},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6155},
/*h(8)=24 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6185},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6155},
/*h(9)=27 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6185},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6153},
/*h(10)=30 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6184},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6154},
/*h(11)=33 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6182},
/*h(107)=34 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6182},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6157},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6187},
/*h(13)=39 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6157},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x98_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5479},
/*h(14)=1 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5469},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5478},
/*h(15)=4 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5467},
/*h(111)=5 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5467},
/*h(43)=6 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 5474},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5472},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5475},
/*h(45)=12 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5472},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5475},
/*h(46)=15 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5471},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5473},
/*h(47)=18 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5467},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 5474},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5468},
/*h(8)=24 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5477},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5468},
/*h(9)=27 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5477},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5466},
/*h(10)=30 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5476},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5467},
/*h(11)=33 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 5474},
/*h(107)=34 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 5474},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5470},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5479},
/*h(13)=39 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5470},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x99_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5234},
/*h(15)=2 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 5200},
/*h(12)=3 EVV 0x99 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5201},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5199},
/*h(11)=6 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5235},
/*h(8)=7 EVV 0x99 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5236}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 3939},
/*h(14)=1 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 3949},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 3938},
/*h(15)=4 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 3947},
/*h(111)=5 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 3947},
/*h(43)=6 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 3934},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 3952},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 3935},
/*h(45)=12 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 3952},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 3935},
/*h(46)=15 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 3951},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 3933},
/*h(47)=18 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 3947},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 3934},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 3948},
/*h(8)=24 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 3937},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 3948},
/*h(9)=27 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 3937},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 3946},
/*h(10)=30 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 3936},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 3947},
/*h(11)=33 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 3934},
/*h(107)=34 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 3934},
/*h(80)=35 EVV 0x9A VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 4323},
/*h(12)=36 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 3950},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 3939},
/*h(13)=39 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 3950},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 4619},
/*h(15)=2 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 4670},
/*empty slot1 */ {0,0},
/*h(12)=4 EVV 0x9B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4671},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 4669},
/*h(11)=7 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 4620},
/*h(16)=8 EVV 0x9B VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {16, 6201},
/*h(8)=9 EVV 0x9B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4621}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9c_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6698},
/*h(14)=1 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6658},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6697},
/*h(15)=4 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6656},
/*h(111)=5 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6656},
/*h(43)=6 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6693},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6661},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6694},
/*h(45)=12 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6661},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6694},
/*h(46)=15 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6660},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6692},
/*h(47)=18 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6656},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6693},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6657},
/*h(8)=24 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6696},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6657},
/*h(9)=27 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6696},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6655},
/*h(10)=30 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6695},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6656},
/*h(11)=33 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6693},
/*h(107)=34 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6693},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6659},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6698},
/*h(13)=39 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6659},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5967},
/*h(15)=2 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 5947},
/*h(12)=3 EVV 0x9D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5948},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5946},
/*h(11)=6 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5968},
/*h(8)=7 EVV 0x9D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5969}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5615},
/*h(14)=1 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5442},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5614},
/*h(15)=4 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5440},
/*h(111)=5 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5440},
/*h(43)=6 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 5610},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5445},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5611},
/*h(45)=12 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5445},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5611},
/*h(46)=15 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5444},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5609},
/*h(47)=18 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5440},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 5610},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5441},
/*h(8)=24 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5613},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5441},
/*h(9)=27 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5613},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5439},
/*h(10)=30 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5612},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5440},
/*h(11)=33 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 5610},
/*h(107)=34 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 5610},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5443},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5615},
/*h(13)=39 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5443},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0x9f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5661},
/*h(15)=2 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 5653},
/*h(12)=3 EVV 0x9F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5654},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5652},
/*h(11)=6 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5662},
/*h(8)=7 EVV 0x9F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5663}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa0_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 6611},
/*h(486)=1 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 6591},
/*h(1510)=2 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 6592},
/*h(484)=3 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 6591},
/*h(2534)=4 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 6590},
/*h(1508)=5 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 6592},
/*h(2532)=6 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 6590},
/*h(502)=7 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 6612},
/*h(1526)=8 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 6613},
/*h(500)=9 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 6612},
/*h(2550)=10 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 6611},
/*h(1524)=11 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 6613}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa1_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 6326},
/*h(486)=1 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 6354},
/*h(1510)=2 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 6355},
/*h(484)=3 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 6354},
/*h(2534)=4 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 6353},
/*h(1508)=5 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 6355},
/*h(2532)=6 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 6353},
/*h(502)=7 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 6327},
/*h(1526)=8 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 6328},
/*h(500)=9 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 6327},
/*h(2550)=10 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 6326},
/*h(1524)=11 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 6328}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa2_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 6392},
/*h(486)=1 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 6383},
/*h(1510)=2 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 6384},
/*h(484)=3 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 6383},
/*h(2534)=4 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 6382},
/*h(1508)=5 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 6384},
/*h(2532)=6 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 6382},
/*h(502)=7 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 6393},
/*h(1526)=8 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 6394},
/*h(500)=9 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 6393},
/*h(2550)=10 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 6392},
/*h(1524)=11 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 6394}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa3_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(2548)=0 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5985},
/*h(486)=1 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5401},
/*h(1510)=2 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5402},
/*h(484)=3 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W0 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5401},
/*h(2534)=4 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5400},
/*h(1508)=5 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W0 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5402},
/*h(2532)=6 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W0 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5400},
/*h(502)=7 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5986},
/*h(1526)=8 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5987},
/*h(500)=9 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL128  W1 UISA_VMODRM_XMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5986},
/*h(2550)=10 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL512  W1 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5985},
/*h(1524)=11 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0   VL256  W1 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5987}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((5*key % 37) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6513},
/*h(14)=1 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6526},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6512},
/*h(15)=4 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6524},
/*h(111)=5 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6524},
/*h(43)=6 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6508},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6529},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6509},
/*h(45)=12 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6529},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6509},
/*h(46)=15 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6528},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6507},
/*h(47)=18 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6524},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6508},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6525},
/*h(8)=24 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6511},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6525},
/*h(9)=27 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6511},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6523},
/*h(10)=30 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6510},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6524},
/*h(11)=33 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6508},
/*h(107)=34 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6508},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6527},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6513},
/*h(13)=39 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6527},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa7_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4628},
/*h(14)=1 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4653},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4627},
/*h(15)=4 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 4651},
/*h(111)=5 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 4651},
/*h(43)=6 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 4623},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4656},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4624},
/*h(45)=12 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4656},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4624},
/*h(46)=15 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4655},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4622},
/*h(47)=18 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 4651},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 4623},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4652},
/*h(8)=24 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4626},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4652},
/*h(9)=27 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4626},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4650},
/*h(10)=30 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4625},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 4651},
/*h(11)=33 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 4623},
/*h(107)=34 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 4623},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4654},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4628},
/*h(13)=39 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4654},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6620},
/*h(14)=1 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6580},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6619},
/*h(15)=4 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6578},
/*h(111)=5 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6578},
/*h(43)=6 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6615},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6583},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6616},
/*h(45)=12 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6583},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6616},
/*h(46)=15 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6582},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6614},
/*h(47)=18 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6578},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6615},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6579},
/*h(8)=24 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6618},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6579},
/*h(9)=27 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6618},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6577},
/*h(10)=30 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6617},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6578},
/*h(11)=33 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6615},
/*h(107)=34 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6615},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6581},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6620},
/*h(13)=39 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6581},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xa9_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5870},
/*h(15)=2 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 5815},
/*h(12)=3 EVV 0xA9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5816},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5814},
/*h(11)=6 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5871},
/*h(8)=7 EVV 0xA9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5872}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xaa_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4384},
/*h(14)=1 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4419},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4383},
/*h(15)=4 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 4417},
/*h(111)=5 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 4417},
/*h(43)=6 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 4379},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4422},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4380},
/*h(45)=12 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4422},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4380},
/*h(46)=15 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4421},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4378},
/*h(47)=18 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 4417},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 4379},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4418},
/*h(8)=24 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4382},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4418},
/*h(9)=27 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4382},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4416},
/*h(10)=30 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4381},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 4417},
/*h(11)=33 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 4379},
/*h(107)=34 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 4379},
/*h(80)=35 EVV 0xAA VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 3842},
/*h(12)=36 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4420},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4384},
/*h(13)=39 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4420},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xab_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5040},
/*h(15)=2 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 5036},
/*empty slot1 */ {0,0},
/*h(12)=4 EVV 0xAB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5037},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5035},
/*h(11)=7 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5041},
/*h(16)=8 EVV 0xAB VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {16, 6310},
/*h(8)=9 EVV 0xAB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5042}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xac_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4753},
/*h(14)=1 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4795},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4752},
/*h(15)=4 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 4793},
/*h(111)=5 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 4793},
/*h(43)=6 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 4748},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4798},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4749},
/*h(45)=12 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4798},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4749},
/*h(46)=15 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4797},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4747},
/*h(47)=18 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 4793},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 4748},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4794},
/*h(8)=24 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4751},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4794},
/*h(9)=27 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4751},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4792},
/*h(10)=30 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4750},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 4793},
/*h(11)=33 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 4748},
/*h(107)=34 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 4748},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4796},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4753},
/*h(13)=39 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4796},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xad_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 4059},
/*h(15)=2 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 4084},
/*h(12)=3 EVV 0xAD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4085},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 4083},
/*h(11)=6 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 4060},
/*h(8)=7 EVV 0xAD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4061}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xae_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6071},
/*h(14)=1 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6122},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6070},
/*h(15)=4 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6120},
/*h(111)=5 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6120},
/*h(43)=6 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6066},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6125},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6067},
/*h(45)=12 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6125},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6067},
/*h(46)=15 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6124},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6065},
/*h(47)=18 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6120},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6066},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6121},
/*h(8)=24 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6069},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6121},
/*h(9)=27 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6069},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6119},
/*h(10)=30 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6068},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6120},
/*h(11)=33 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6066},
/*h(107)=34 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6066},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6123},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6071},
/*h(13)=39 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6123},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xaf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5773},
/*h(15)=2 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 4096},
/*h(12)=3 EVV 0xAF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4097},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 4095},
/*h(11)=6 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5774},
/*h(8)=7 EVV 0xAF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5775}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6180},
/*h(46)=1 EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6177},
/*h(12)=2 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6176},
/*h(77)=3 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6180},
/*h(13)=4 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6176},
/*h(78)=5 EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6179},
/*h(44)=6 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6178},
/*h(14)=7 EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6175},
/*h(45)=8 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6178}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb5_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4409},
/*h(46)=1 EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4406},
/*h(12)=2 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4405},
/*h(77)=3 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4409},
/*h(13)=4 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4405},
/*h(78)=5 EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4408},
/*h(44)=6 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4407},
/*h(14)=7 EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4404},
/*h(45)=8 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4407}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 3813},
/*h(14)=1 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 3819},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 3812},
/*h(15)=4 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 3817},
/*h(111)=5 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 3817},
/*h(43)=6 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 3808},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 3822},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 3809},
/*h(45)=12 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 3822},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 3809},
/*h(46)=15 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 3821},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 3807},
/*h(47)=18 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 3817},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 3808},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 3818},
/*h(8)=24 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 3811},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 3818},
/*h(9)=27 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 3811},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 3816},
/*h(10)=30 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 3810},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 3817},
/*h(11)=33 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 3808},
/*h(107)=34 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 3808},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 3820},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 3813},
/*h(13)=39 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 3820},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb7_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 3932},
/*h(14)=1 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6359},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 3931},
/*h(15)=4 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6357},
/*h(111)=5 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6357},
/*h(43)=6 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 3927},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6362},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 3928},
/*h(45)=12 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6362},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 3928},
/*h(46)=15 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6361},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 3926},
/*h(47)=18 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6357},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 3927},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6358},
/*h(8)=24 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 3930},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6358},
/*h(9)=27 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 3930},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6356},
/*h(10)=30 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 3929},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6357},
/*h(11)=33 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 3927},
/*h(107)=34 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 3927},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6360},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 3932},
/*h(13)=39 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6360},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6118},
/*h(14)=1 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5119},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6117},
/*h(15)=4 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5117},
/*h(111)=5 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5117},
/*h(43)=6 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5122},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6114},
/*h(45)=12 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5122},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6114},
/*h(46)=15 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5121},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6112},
/*h(47)=18 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5117},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6113},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5118},
/*h(8)=24 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6116},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5118},
/*h(9)=27 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6116},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5116},
/*h(10)=30 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6115},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5117},
/*h(11)=33 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6113},
/*h(107)=34 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6113},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5120},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6118},
/*h(13)=39 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5120},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xb9_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 4872},
/*h(15)=2 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 4899},
/*h(12)=3 EVV 0xB9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4900},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 4898},
/*h(11)=6 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 4873},
/*h(8)=7 EVV 0xB9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4874}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xba_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 4791},
/*h(14)=1 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 4757},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 4790},
/*h(15)=4 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 4755},
/*h(111)=5 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 4755},
/*h(43)=6 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 4786},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 4760},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 4787},
/*h(45)=12 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 4760},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 4787},
/*h(46)=15 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 4759},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 4785},
/*h(47)=18 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 4755},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 4786},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 4756},
/*h(8)=24 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 4789},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 4756},
/*h(9)=27 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 4789},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 4754},
/*h(10)=30 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 4788},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 4755},
/*h(11)=33 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 4786},
/*h(107)=34 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 4786},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 4758},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 4791},
/*h(13)=39 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 4758},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 4869},
/*h(15)=2 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 4679},
/*h(12)=3 EVV 0xBB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4680},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 4678},
/*h(11)=6 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 4870},
/*h(8)=7 EVV 0xBB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4871}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbc_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 6336},
/*h(14)=1 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 6372},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6335},
/*h(15)=4 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 6370},
/*h(111)=5 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 6370},
/*h(43)=6 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 6331},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 6375},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 6332},
/*h(45)=12 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 6375},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 6332},
/*h(46)=15 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 6374},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6330},
/*h(47)=18 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 6370},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 6331},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 6371},
/*h(8)=24 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 6334},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 6371},
/*h(9)=27 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 6334},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 6369},
/*h(10)=30 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6333},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 6370},
/*h(11)=33 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 6331},
/*h(107)=34 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 6331},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 6373},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 6336},
/*h(13)=39 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 6373},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbd_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5275},
/*h(15)=2 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 5292},
/*h(12)=3 EVV 0xBD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5293},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5291},
/*h(11)=6 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 5276},
/*h(8)=7 EVV 0xBD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5277}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbe_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {41, 5704},
/*h(14)=1 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1*/ {14, 5757},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 5703},
/*h(15)=4 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {15, 5755},
/*h(111)=5 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {111, 5755},
/*h(43)=6 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {43, 5699},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {44, 5760},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {72, 5700},
/*h(45)=12 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ESIZE_64_BITS() NELEM_FULL()*/ {45, 5760},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ESIZE_32_BITS() NELEM_FULL()*/ {73, 5700},
/*h(46)=15 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1*/ {46, 5759},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 5698},
/*h(47)=18 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {47, 5755},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {75, 5699},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {76, 5756},
/*h(8)=24 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {8, 5702},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ESIZE_64_BITS() NELEM_FULL()*/ {77, 5756},
/*h(9)=27 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ESIZE_32_BITS() NELEM_FULL()*/ {9, 5702},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1*/ {78, 5754},
/*h(10)=30 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 5701},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W1*/ {79, 5755},
/*h(11)=33 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {11, 5699},
/*h(107)=34 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND()  W0*/ {107, 5699},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {12, 5758},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ESIZE_32_BITS() NELEM_FULL()*/ {40, 5704},
/*h(13)=39 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ESIZE_64_BITS() NELEM_FULL()*/ {13, 5758},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xbf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 6401},
/*h(15)=2 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W1*/ {15, 6423},
/*h(12)=3 EVV 0xBF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 6424},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 6422},
/*h(11)=6 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND()  W0*/ {11, 6402},
/*h(8)=7 EVV 0xBF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 6403}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(601)=0 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4346},
/*h(88)=1 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4348},
/*h(94)=2 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR*/ {94, 4335},
/*h(349)=3 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4338},
/*h(604)=4 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4334},
/*h(90)=5 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR*/ {90, 4347},
/*h(345)=6 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4350},
/*h(600)=7 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4346},
/*h(606)=8 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 4333},
/*h(93)=9 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {93, 4336},
/*h(348)=10 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4338},
/*h(602)=11 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4345},
/*h(89)=12 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4348},
/*h(344)=13 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4350},
/*h(350)=14 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR*/ {350, 4337},
/*h(605)=15 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4334},
/*h(92)=16 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {92, 4336},
/*h(346)=17 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR*/ {346, 4349}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((11*key % 83) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc6_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[16] = {
/*h(20326)=0 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20326, 5337},
/*h(20372)=1 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20372, 4868},
/*h(20310)=2 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20310, 5848},
/*h(20452)=3 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20452, 5387},
/*h(20390)=4 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20390, 5835},
/*h(20260)=5 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20260, 5849},
/*h(20436)=6 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20436, 5879},
/*h(20374)=7 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20374, 4868},
/*h(20244)=8 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20244, 4901},
/*h(20454)=9 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20454, 5387},
/*h(20324)=10 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20324, 5337},
/*h(20262)=11 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20262, 5849},
/*h(20438)=12 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20438, 5879},
/*h(20308)=13 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20308, 5848},
/*h(20246)=14 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20246, 4901},
/*h(20388)=15 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_YMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20388, 5835}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REG_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 17) % 16);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc7_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[16] = {
/*h(20326)=0 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20326, 6639},
/*h(20372)=1 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20372, 5078},
/*h(20310)=2 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20310, 4829},
/*h(20452)=3 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20452, 6647},
/*h(20390)=4 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20390, 5886},
/*h(20260)=5 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20260, 5894},
/*h(20436)=6 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20436, 4817},
/*h(20374)=7 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20374, 5078},
/*h(20244)=8 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20244, 5088},
/*h(20454)=9 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20454, 6647},
/*h(20324)=10 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20324, 6639},
/*h(20262)=11 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20262, 5894},
/*h(20438)=12 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20438, 4817},
/*h(20308)=13 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20308, 4829},
/*h(20246)=14 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0   VL512  W0 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_32_BITS() NELEM_GSCAT()*/ {20246, 5088},
/*h(20388)=15 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0   VL512  W1 RM=4 UISA_VMODRM_ZMM() eanot16  NOVSR  ZEROING=0  ESIZE_64_BITS() NELEM_GSCAT()*/ {20388, 5886}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REG_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
hidx = ((3*key % 17) % 16);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xc8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[28] = {
/*empty slot1 */ {0,0},
/*h(604)=1 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5426},
/*h(605)=2 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5426},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=6 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5424},
/*empty slot1 */ {0,0},
/*h(95)=8 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {95, 5425},
/*h(351)=9 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {351, 5425},
/*h(607)=10 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {607, 5425},
/*h(863)=11 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {863, 5425},
/*empty slot1 */ {0,0},
/*h(600)=13 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 5411},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(601)=17 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 5411},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(602)=21 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5409},
/*empty slot1 */ {0,0},
/*h(91)=23 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {91, 5410},
/*h(347)=24 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {347, 5410},
/*h(603)=25 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {603, 5410},
/*h(859)=26 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {859, 5410},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 31) % 28);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xca_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[28] = {
/*empty slot1 */ {0,0},
/*h(604)=1 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4683},
/*h(605)=2 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4683},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=6 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 4681},
/*empty slot1 */ {0,0},
/*h(95)=8 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {95, 4682},
/*h(351)=9 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {351, 4682},
/*h(607)=10 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {607, 4682},
/*h(863)=11 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {863, 4682},
/*empty slot1 */ {0,0},
/*h(600)=13 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4715},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(601)=17 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4715},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(602)=21 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 4713},
/*empty slot1 */ {0,0},
/*h(91)=23 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {91, 4714},
/*h(347)=24 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {347, 4714},
/*h(603)=25 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {603, 4714},
/*h(859)=26 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {859, 4714},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 31) % 28);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5738},
/*h(15)=2 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {15, 5684},
/*h(12)=3 EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5685},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5683},
/*h(11)=6 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {11, 5739},
/*h(8)=7 EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5740}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcc_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[28] = {
/*empty slot1 */ {0,0},
/*h(604)=1 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5549},
/*h(605)=2 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5549},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(606)=6 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR*/ {606, 5547},
/*empty slot1 */ {0,0},
/*h(95)=8 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {95, 5548},
/*h(351)=9 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {351, 5548},
/*h(607)=10 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {607, 5548},
/*h(863)=11 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR*/ {863, 5548},
/*empty slot1 */ {0,0},
/*h(600)=13 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {600, 5522},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(601)=17 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ESIZE_32_BITS() NELEM_FULL()*/ {601, 5522},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(602)=21 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR*/ {602, 5520},
/*empty slot1 */ {0,0},
/*h(91)=23 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {91, 5521},
/*h(347)=24 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {347, 5521},
/*h(603)=25 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {603, 5521},
/*h(859)=26 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR*/ {859, 5521},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((4*key % 31) % 28);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcd_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0*/ {10, 5095},
/*h(15)=2 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1*/ {15, 5086},
/*h(12)=3 EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1    ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5087},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1*/ {14, 5085},
/*h(11)=6 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0*/ {11, 5096},
/*h(8)=7 EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0    ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5097}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xcf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(42)=0 EVV 0xCF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0*/ {42, 6378},
/*h(8)=1 EVV 0xCF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6377},
/*h(72)=2 EVV 0xCF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6381},
/*h(10)=3 EVV 0xCF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0*/ {10, 6376},
/*h(74)=4 EVV 0xCF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0*/ {74, 6380},
/*h(40)=5 EVV 0xCF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6379}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xdc_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 4822},
/*h(78)=2 EVV 0xDC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0 MASK=0*/ {78, 4825},
/*empty slot1 */ {0,0},
/*h(46)=4 EVV 0xDC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0 MASK=0*/ {46, 4823},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0xDC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0*/ {14, 4821},
/*h(74)=7 EVV 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 4826},
/*empty slot1 */ {0,0},
/*h(42)=9 EVV 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 4824}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xdd_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xDD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 5064},
/*h(78)=2 EVV 0xDD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0 MASK=0*/ {78, 5067},
/*empty slot1 */ {0,0},
/*h(46)=4 EVV 0xDD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0 MASK=0*/ {46, 5065},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0xDD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0*/ {14, 5063},
/*h(74)=7 EVV 0xDD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 5068},
/*empty slot1 */ {0,0},
/*h(42)=9 EVV 0xDD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 5066}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xde_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xDE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 4087},
/*h(78)=2 EVV 0xDE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0 MASK=0*/ {78, 4090},
/*empty slot1 */ {0,0},
/*h(46)=4 EVV 0xDE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0 MASK=0*/ {46, 4088},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0xDE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0*/ {14, 4086},
/*h(74)=7 EVV 0xDE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 4091},
/*empty slot1 */ {0,0},
/*h(42)=9 EVV 0xDE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 4089}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F38_opcode0xdf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0xDF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 5312},
/*h(78)=2 EVV 0xDF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0 MASK=0*/ {78, 5315},
/*empty slot1 */ {0,0},
/*h(46)=4 EVV 0xDF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0 MASK=0*/ {46, 5313},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0xDF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0*/ {14, 5311},
/*h(74)=7 EVV 0xDF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 5316},
/*empty slot1 */ {0,0},
/*h(42)=9 EVV 0xDF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0  ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 5314}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x0_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*h(348)=0 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4022},
/*empty slot1 */ {0,0},
/*h(604)=2 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4018},
/*h(350)=3 EVV 0x00 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 4021},
/*empty slot1 */ {0,0},
/*h(606)=5 EVV 0x00 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 4017},
/*h(349)=6 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4022},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(605)=9 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4018}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*h(348)=0 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 6501},
/*empty slot1 */ {0,0},
/*h(604)=2 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 6497},
/*h(350)=3 EVV 0x01 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 6500},
/*empty slot1 */ {0,0},
/*h(606)=5 EVV 0x01 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 6496},
/*h(349)=6 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 6501},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(605)=9 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 6497}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5798},
/*h(76)=1 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5789},
/*h(8)=2 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 5800},
/*h(12)=3 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 5791},
/*h(41)=4 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 5802},
/*h(45)=5 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5793},
/*h(74)=6 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 5797},
/*h(78)=7 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5788},
/*h(10)=8 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 5799},
/*h(14)=9 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 5790},
/*h(40)=10 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 5802},
/*h(44)=11 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5793},
/*h(73)=12 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5798},
/*h(77)=13 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5789},
/*h(9)=14 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 5800},
/*h(13)=15 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 5791},
/*h(42)=16 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 5801},
/*h(46)=17 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5792}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x4_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(89)=0 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4067},
/*h(602)=1 EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 4062},
/*empty slot1 */ {0,0},
/*h(345)=3 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4071},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(88)=6 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4067},
/*h(601)=7 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4063},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(344)=10 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4071},
/*h(90)=11 EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {90, 4066},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=14 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4063},
/*h(346)=15 EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 4070},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x5_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(94)=0 EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR UIMM8()*/ {94, 5161},
/*h(350)=1 EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 5165},
/*h(606)=2 EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 5157},
/*h(92)=3 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {92, 5162},
/*h(348)=4 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 5166},
/*h(604)=5 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5158},
/*h(93)=6 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {93, 5162},
/*h(349)=7 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 5166},
/*h(605)=8 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5158}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = ((3*key % 13) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x8_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[13] = {
/*h(91)=0 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {91, 5451},
/*h(347)=1 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {347, 5451},
/*h(603)=2 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {603, 5451},
/*h(859)=3 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {859, 5451},
/*h(88)=4 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 5454},
/*h(344)=5 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 5456},
/*h(600)=6 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 5452},
/*h(89)=7 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 5454},
/*h(345)=8 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 5456},
/*h(601)=9 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 5452},
/*h(90)=10 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {90, 5453},
/*h(346)=11 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 5455},
/*h(602)=12 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 5450}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (3*key % 13);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x9_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[23] = {
/*empty slot1 */ {0,0},
/*h(348)=1 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 5495},
/*h(94)=2 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR UIMM8()*/ {94, 5492},
/*h(607)=3 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {607, 5490},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(604)=6 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 5491},
/*h(350)=7 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 5494},
/*h(863)=8 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {863, 5490},
/*empty slot1 */ {0,0},
/*h(93)=10 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {93, 5493},
/*empty slot1 */ {0,0},
/*h(606)=12 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 5489},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(349)=15 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 5495},
/*h(95)=16 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {95, 5490},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(92)=19 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {92, 5493},
/*h(605)=20 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 5491},
/*h(351)=21 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {351, 5490},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 23ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xa_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[5] = {
/*h(10)=0 EVV 0x0A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0   UIMM8()*/ {10, 5196},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(11)=3 EVV 0x0A V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0   UIMM8()*/ {11, 5197},
/*h(8)=4 EVV 0x0A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0   UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5198}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xb_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[5] = {
/*empty slot1 */ {0,0},
/*h(15)=1 EVV 0x0B V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1   UIMM8()*/ {15, 5245},
/*h(12)=2 EVV 0x0B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1   UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5246},
/*h(14)=3 EVV 0x0B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1   UIMM8()*/ {14, 5244},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(22)=0 EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256     UIMM8()*/ {22, 4962},
/*h(4)=1 EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128     UIMM8()  ESIZE_64_BITS() NELEM_FULLMEM()*/ {4, 4961},
/*h(38)=2 EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512     UIMM8()*/ {38, 4964},
/*h(20)=3 EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256     UIMM8()  ESIZE_64_BITS() NELEM_FULLMEM()*/ {20, 4963},
/*h(6)=4 EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128     UIMM8()*/ {6, 4960},
/*h(36)=5 EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512     UIMM8()  ESIZE_64_BITS() NELEM_FULLMEM()*/ {36, 4965}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
hidx = ((5*key % 13) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x14_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(94)=0 EVV 0x14 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {94, 5622},
/*h(90)=1 EVV 0x14 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_GPR_WRITER_STORE_BYTE()*/ {90, 5623}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x15_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(94)=0 EVV 0x15 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {94, 5630},
/*h(90)=1 EVV 0x15 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_16_BITS() NELEM_GPR_WRITER_STORE_WORD()*/ {90, 5631}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x16_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[17] = {
/*h(746)=0 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {746, 5626},
/*h(738)=1 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {738, 5626},
/*empty slot1 */ {0,0},
/*h(722)=3 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  mode64 W0  NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {722, 5627},
/*h(714)=4 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {714, 5626},
/*h(706)=5 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {706, 5626},
/*empty slot1 */ {0,0},
/*h(758)=7 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  mode64  NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {758, 5628},
/*h(750)=8 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {750, 5624},
/*h(742)=9 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {742, 5624},
/*empty slot1 */ {0,0},
/*h(726)=11 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  mode64 W0  NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {726, 5625},
/*h(718)=12 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {718, 5624},
/*h(710)=13 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64  NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {710, 5624},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(754)=16 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  mode64  NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_64_BITS() NELEM_GPR_WRITER_STORE()*/ {754, 5629}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x17_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(94)=0 EVV 0x17 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()*/ {94, 4466},
/*h(90)=1 EVV 0x17 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128    NOEVSR  ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {90, 4467}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x18_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*h(42)=0 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 6208},
/*h(78)=1 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 3955},
/*h(40)=2 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {40, 6209},
/*h(76)=3 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {76, 3956},
/*h(46)=4 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 3953},
/*h(74)=5 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 6206},
/*h(44)=6 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {44, 3954},
/*h(72)=7 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {72, 6207}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((28*key % 29) % 8);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x19_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[17] = {
/*h(602)=0 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 5043},
/*h(348)=1 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 5742},
/*empty slot1 */ {0,0},
/*h(1374)=3 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {1374, 5741},
/*h(604)=4 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 5744},
/*h(350)=5 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 5741},
/*h(1630)=6 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {1630, 5743},
/*empty slot1 */ {0,0},
/*h(606)=8 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 5743},
/*empty slot1 */ {0,0},
/*h(344)=10 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 5046},
/*empty slot1 */ {0,0},
/*h(1370)=12 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {1370, 5045},
/*h(600)=13 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 5044},
/*h(346)=14 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 5045},
/*h(1626)=15 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {1626, 5043},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(78)=0 EVV 0x1A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 3969},
/*h(72)=1 EVV 0x1A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_TUPLE8()*/ {72, 6200},
/*h(74)=2 EVV 0x1A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 6199},
/*h(76)=3 EVV 0x1A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_TUPLE4()*/ {76, 3970}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(602)=0 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 5055},
/*h(604)=1 EVV 0x1B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 4058},
/*h(1630)=2 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {1630, 4057},
/*h(606)=3 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 4057},
/*h(600)=4 EVV 0x1B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 5056},
/*h(1626)=5 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {1626, 5055}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 6ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1d_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[23] = {
/*empty slot1 */ {0,0},
/*h(602)=1 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 6751},
/*h(1115)=2 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {1115, 6752},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(91)=5 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {91, 6752},
/*empty slot1 */ {0,0},
/*h(1371)=7 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {1371, 6752},
/*h(88)=8 EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 6755},
/*empty slot1 */ {0,0},
/*h(347)=10 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {347, 6752},
/*h(1114)=11 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {1114, 6754},
/*h(1627)=12 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {1627, 6752},
/*h(344)=13 EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 6757},
/*h(90)=14 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {90, 6754},
/*h(603)=15 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {603, 6752},
/*h(1370)=16 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {1370, 6756},
/*h(1883)=17 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {1883, 6752},
/*h(600)=18 EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 6753},
/*h(346)=19 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 6756},
/*h(859)=20 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {859, 6752},
/*h(1626)=21 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {1626, 6751},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 23ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5551},
/*h(76)=1 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5509},
/*h(8)=2 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 5553},
/*h(12)=3 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 5511},
/*h(41)=4 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 5555},
/*h(45)=5 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5513},
/*h(74)=6 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0 UIMM8()*/ {74, 5550},
/*h(78)=7 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0 UIMM8()*/ {78, 5508},
/*h(10)=8 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 UIMM8()*/ {10, 5552},
/*h(14)=9 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0 UIMM8()*/ {14, 5510},
/*h(40)=10 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 5555},
/*h(44)=11 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5513},
/*h(73)=12 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5551},
/*h(77)=13 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5509},
/*h(9)=14 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 5553},
/*h(13)=15 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 5511},
/*h(42)=16 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0 UIMM8()*/ {42, 5554},
/*h(46)=17 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0 UIMM8()*/ {46, 5512}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x1f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5413},
/*h(76)=1 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5395},
/*h(8)=2 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 5415},
/*h(12)=3 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 5397},
/*h(41)=4 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 5417},
/*h(45)=5 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5399},
/*h(74)=6 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0 UIMM8()*/ {74, 5412},
/*h(78)=7 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0 UIMM8()*/ {78, 5394},
/*h(10)=8 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 UIMM8()*/ {10, 5414},
/*h(14)=9 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0 UIMM8()*/ {14, 5396},
/*h(40)=10 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 5417},
/*h(44)=11 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5399},
/*h(73)=12 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5413},
/*h(77)=13 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5395},
/*h(9)=14 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 5415},
/*h(13)=15 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 5397},
/*h(42)=16 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0 UIMM8()*/ {42, 5416},
/*h(46)=17 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0 UIMM8()*/ {46, 5398}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x20_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(10)=0 EVV 0x20 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_8_BITS() NELEM_GPR_READER_BYTE()*/ {10, 5813},
/*h(14)=1 EVV 0x20 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {14, 5812}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x21_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[2] = {
/*h(18)=0 EVV 0x21 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE1()*/ {18, 4959},
/*h(22)=1 EVV 0x21 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 MASK=0 UIMM8()*/ {22, 4958}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-1));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x22_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[16] = {
/*h(102)=0 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64    ZEROING=0 MASK=0 UIMM8()*/ {102, 4275},
/*empty slot1 */ {0,0},
/*h(86)=2 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  mode64 W0    ZEROING=0 MASK=0 UIMM8()*/ {86, 4276},
/*h(78)=3 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64    ZEROING=0 MASK=0 UIMM8()*/ {78, 4275},
/*h(70)=4 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64    ZEROING=0 MASK=0 UIMM8()*/ {70, 4275},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(114)=7 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1  mode64    ZEROING=0 MASK=0 UIMM8()  ESIZE_64_BITS() NELEM_GPR_READER()*/ {114, 4527},
/*h(106)=8 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64    ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_READER()*/ {106, 4277},
/*h(98)=9 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64    ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_READER()*/ {98, 4277},
/*h(82)=10 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  mode64 W0    ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_READER()*/ {82, 4278},
/*h(74)=11 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64    ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_READER()*/ {74, 4277},
/*h(66)=12 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  not64    ZEROING=0 MASK=0 UIMM8()  ESIZE_32_BITS() NELEM_GPR_READER()*/ {66, 4277},
/*empty slot1 */ {0,0},
/*h(118)=14 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  mode64    ZEROING=0 MASK=0 UIMM8()*/ {118, 4526},
/*h(110)=15 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  not64    ZEROING=0 MASK=0 UIMM8()*/ {110, 4275}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-4));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x23_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5586},
/*h(73)=1 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 4469},
/*h(77)=2 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5585},
/*h(41)=3 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 4471},
/*h(45)=4 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5587},
/*h(72)=5 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 4469},
/*h(76)=6 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5585},
/*h(40)=7 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 4471},
/*h(44)=8 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5587},
/*h(74)=9 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 4468},
/*h(78)=10 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5584},
/*h(42)=11 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 4470}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 43) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x25_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 3896},
/*h(76)=1 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 3880},
/*h(8)=2 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 3898},
/*h(12)=3 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 3882},
/*h(41)=4 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 3900},
/*h(45)=5 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 3884},
/*h(74)=6 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 3895},
/*h(78)=7 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 3879},
/*h(10)=8 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 3897},
/*h(14)=9 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 3881},
/*h(40)=10 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 3900},
/*h(44)=11 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 3884},
/*h(73)=12 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 3896},
/*h(77)=13 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 3880},
/*h(9)=14 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 3898},
/*h(13)=15 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 3882},
/*h(42)=16 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 3899},
/*h(46)=17 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 3883}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x26_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[47] = {
/*h(89)=0 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4994},
/*empty slot1 */ {0,0},
/*h(602)=2 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 4990},
/*h(348)=3 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4951},
/*h(94)=4 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR UIMM8()*/ {94, 4948},
/*empty slot1 */ {0,0},
/*h(607)=6 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {607, 4946},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(345)=10 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4996},
/*h(91)=11 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {91, 4991},
/*empty slot1 */ {0,0},
/*h(604)=13 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4947},
/*h(350)=14 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 4950},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(863)=17 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {863, 4946},
/*h(88)=18 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4994},
/*empty slot1 */ {0,0},
/*h(601)=20 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4992},
/*h(347)=21 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {347, 4991},
/*h(93)=22 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {93, 4949},
/*empty slot1 */ {0,0},
/*h(606)=24 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 4945},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(344)=28 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4996},
/*h(90)=29 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {90, 4993},
/*empty slot1 */ {0,0},
/*h(603)=31 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {603, 4991},
/*h(349)=32 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4951},
/*h(95)=33 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {95, 4946},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=38 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4992},
/*h(346)=39 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 4995},
/*h(92)=40 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {92, 4949},
/*h(859)=41 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {859, 4991},
/*h(605)=42 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4947},
/*h(351)=43 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {351, 4946},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 47ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x27_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0   UIMM8()*/ {10, 4324},
/*h(15)=2 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1   UIMM8()*/ {15, 4308},
/*h(12)=3 EVV 0x27 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1   UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4309},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1   UIMM8()*/ {14, 4307},
/*h(11)=6 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0   UIMM8()*/ {11, 4325},
/*h(8)=7 EVV 0x27 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0   UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4326}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x38_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*h(42)=0 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 3986},
/*h(78)=1 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5784},
/*h(40)=2 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {40, 3987},
/*h(76)=3 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {76, 5785},
/*h(46)=4 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5782},
/*h(74)=5 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 3984},
/*h(44)=6 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {44, 5783},
/*h(72)=7 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {72, 3985}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((28*key % 29) % 8);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x39_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[17] = {
/*h(602)=0 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 6222},
/*h(348)=1 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 6203},
/*empty slot1 */ {0,0},
/*h(1374)=3 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {1374, 6202},
/*h(604)=4 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 6205},
/*h(350)=5 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 6202},
/*h(1630)=6 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {1630, 6204},
/*empty slot1 */ {0,0},
/*h(606)=8 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 6204},
/*empty slot1 */ {0,0},
/*h(344)=10 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 6225},
/*empty slot1 */ {0,0},
/*h(1370)=12 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {1370, 6224},
/*h(600)=13 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 6223},
/*h(346)=14 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 6224},
/*h(1626)=15 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {1626, 6222},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3a_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(78)=0 EVV 0x3A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5786},
/*h(72)=1 EVV 0x3A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_TUPLE8()*/ {72, 5233},
/*h(74)=2 EVV 0x3A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 5232},
/*h(76)=3 EVV 0x3A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_TUPLE4()*/ {76, 5787}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3b_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(602)=0 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 6238},
/*h(604)=1 EVV 0x3B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 6198},
/*h(1630)=2 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {1630, 6197},
/*h(606)=3 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 6197},
/*h(600)=4 EVV 0x3B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 6239},
/*h(1626)=5 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {1626, 6238}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 6ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3e_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0 UIMM8()*/ {46, 5059},
/*h(72)=1 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 5540},
/*h(42)=2 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0 UIMM8()*/ {42, 5537},
/*h(78)=3 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0 UIMM8()*/ {78, 5061},
/*h(12)=4 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 5058},
/*h(74)=5 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0 UIMM8()*/ {74, 5539},
/*h(8)=6 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 5536},
/*h(44)=7 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5060},
/*h(14)=8 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0 UIMM8()*/ {14, 5057},
/*h(40)=9 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 5538},
/*h(76)=10 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5062},
/*h(10)=11 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 UIMM8()*/ {10, 5535}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x3f_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1    ZEROING=0 UIMM8()*/ {46, 5390},
/*h(72)=1 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0    ZEROING=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 5423},
/*h(42)=2 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0    ZEROING=0 UIMM8()*/ {42, 5420},
/*h(78)=3 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1    ZEROING=0 UIMM8()*/ {78, 5392},
/*h(12)=4 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1    ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 5389},
/*h(74)=5 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0    ZEROING=0 UIMM8()*/ {74, 5422},
/*h(8)=6 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0    ZEROING=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 5419},
/*h(44)=7 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1    ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5391},
/*h(14)=8 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1    ZEROING=0 UIMM8()*/ {14, 5388},
/*h(40)=9 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0    ZEROING=0 UIMM8()  ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 5421},
/*h(76)=10 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1    ZEROING=0 UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5393},
/*h(10)=11 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0    ZEROING=0 UIMM8()*/ {10, 5418}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
hidx = ((8*key % 23) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x42_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(42)=0 EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 4766},
/*h(8)=1 EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W0   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {8, 4765},
/*h(72)=2 EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W0   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {72, 4769},
/*h(10)=3 EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 4764},
/*h(74)=4 EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 4768},
/*h(40)=5 EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W0   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {40, 4767}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x43_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[12] = {
/*h(46)=0 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5448},
/*h(73)=1 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5136},
/*h(77)=2 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5447},
/*h(41)=3 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 5138},
/*h(45)=4 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5449},
/*h(72)=5 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5136},
/*h(76)=6 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5447},
/*h(40)=7 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 5138},
/*h(44)=8 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5449},
/*h(74)=9 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 5135},
/*h(78)=10 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5446},
/*h(42)=11 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 5137}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((8*key % 43) % 12);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x44_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[10] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x44 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128      ZEROING=0 MASK=0 UIMM8()  ESIZE_64_BITS() NELEM_FULLMEM()*/ {10, 6285},
/*h(78)=2 EVV 0x44 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512      ZEROING=0 MASK=0 UIMM8()*/ {78, 6288},
/*empty slot1 */ {0,0},
/*h(46)=4 EVV 0x44 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256      ZEROING=0 MASK=0 UIMM8()*/ {46, 6286},
/*empty slot1 */ {0,0},
/*h(14)=6 EVV 0x44 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128      ZEROING=0 MASK=0 UIMM8()*/ {14, 6284},
/*h(74)=7 EVV 0x44 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512      ZEROING=0 MASK=0 UIMM8()  ESIZE_64_BITS() NELEM_FULLMEM()*/ {74, 6289},
/*empty slot1 */ {0,0},
/*h(42)=9 EVV 0x44 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256      ZEROING=0 MASK=0 UIMM8()  ESIZE_64_BITS() NELEM_FULLMEM()*/ {42, 6287}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x50_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 6299},
/*h(14)=1 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 6255},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 6298},
/*h(15)=4 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {15, 6260},
/*h(111)=5 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {111, 6260},
/*h(43)=6 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {43, 6301},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 6258},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 6302},
/*h(45)=12 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 6258},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 6302},
/*h(46)=15 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 6257},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 6300},
/*h(47)=18 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {47, 6260},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {75, 6301},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 6261},
/*h(8)=24 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 6297},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 6261},
/*h(9)=27 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 6297},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 6259},
/*h(10)=30 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 6296},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {79, 6260},
/*h(11)=33 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {11, 6301},
/*h(107)=34 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {107, 6301},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 6256},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 6299},
/*h(13)=39 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 6256},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x51_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0   UIMM8()*/ {10, 3901},
/*h(15)=2 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1   UIMM8()*/ {15, 3886},
/*h(12)=3 EVV 0x51 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1   UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 3887},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1   UIMM8()*/ {14, 3885},
/*h(11)=6 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0   UIMM8()*/ {11, 3902},
/*h(8)=7 EVV 0x51 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0   UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 3903}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x54_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[41] = {
/*h(41)=0 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 5358},
/*h(14)=1 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 5376},
/*empty slot1 */ {0,0},
/*h(42)=3 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 5357},
/*h(15)=4 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {15, 5374},
/*h(111)=5 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {111, 5374},
/*h(43)=6 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {43, 5353},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(44)=9 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5379},
/*empty slot1 */ {0,0},
/*h(72)=11 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5354},
/*h(45)=12 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5379},
/*empty slot1 */ {0,0},
/*h(73)=14 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5354},
/*h(46)=15 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5378},
/*empty slot1 */ {0,0},
/*h(74)=17 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 5352},
/*h(47)=18 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {47, 5374},
/*empty slot1 */ {0,0},
/*h(75)=20 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {75, 5353},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(76)=23 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5375},
/*h(8)=24 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 5356},
/*empty slot1 */ {0,0},
/*h(77)=26 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5375},
/*h(9)=27 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 5356},
/*empty slot1 */ {0,0},
/*h(78)=29 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5373},
/*h(10)=30 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 5355},
/*empty slot1 */ {0,0},
/*h(79)=32 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1   UIMM8()*/ {79, 5374},
/*h(11)=33 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {11, 5353},
/*h(107)=34 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0   UIMM8()*/ {107, 5353},
/*empty slot1 */ {0,0},
/*h(12)=36 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 5377},
/*empty slot1 */ {0,0},
/*h(40)=38 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 5358},
/*h(13)=39 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 5377},
/*empty slot1 */ {0,0}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = (3*key % 41);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x55_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0   UIMM8()*/ {10, 5982},
/*h(15)=2 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1   UIMM8()*/ {15, 6018},
/*h(12)=3 EVV 0x55 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1   UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 6019},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1   UIMM8()*/ {14, 6017},
/*h(11)=6 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0   UIMM8()*/ {11, 5983},
/*h(8)=7 EVV 0x55 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0   UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5984}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x56_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[47] = {
/*h(89)=0 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 6263},
/*empty slot1 */ {0,0},
/*h(602)=2 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR UIMM8()*/ {602, 6266},
/*h(348)=3 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 3838},
/*h(94)=4 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR UIMM8()*/ {94, 3835},
/*empty slot1 */ {0,0},
/*h(607)=6 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {607, 3840},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(345)=10 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 6265},
/*h(91)=11 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {91, 6267},
/*empty slot1 */ {0,0},
/*h(604)=13 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 3841},
/*h(350)=14 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR UIMM8()*/ {350, 3837},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(863)=17 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {863, 3840},
/*h(88)=18 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 6263},
/*empty slot1 */ {0,0},
/*h(601)=20 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 6268},
/*h(347)=21 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {347, 6267},
/*h(93)=22 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {93, 3836},
/*empty slot1 */ {0,0},
/*h(606)=24 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR UIMM8()*/ {606, 3839},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(344)=28 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 6265},
/*h(90)=29 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR UIMM8()*/ {90, 6262},
/*empty slot1 */ {0,0},
/*h(603)=31 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {603, 6267},
/*h(349)=32 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 3838},
/*h(95)=33 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {95, 3840},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*h(600)=38 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 6268},
/*h(346)=39 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR UIMM8()*/ {346, 6264},
/*h(92)=40 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {92, 3836},
/*h(859)=41 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W0  NOEVSR UIMM8()*/ {859, 6267},
/*h(605)=42 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 3841},
/*h(351)=43 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE()  W1  NOEVSR UIMM8()*/ {351, 3840},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0},
/*empty slot1 */ {0,0}
};
xed_union64_t t, u;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
hidx = (t.u64 = 2654435769  * key, u.u64 = t.s.lo32 * 47ULL, u.s.hi32);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x57_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[8] = {
/*empty slot1 */ {0,0},
/*h(10)=1 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0   UIMM8()*/ {10, 5803},
/*h(15)=2 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W1   UIMM8()*/ {15, 5795},
/*h(12)=3 EVV 0x57 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1   UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5796},
/*empty slot1 */ {0,0},
/*h(14)=5 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1   UIMM8()*/ {14, 5794},
/*h(11)=6 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE()  W0   UIMM8()*/ {11, 5804},
/*h(8)=7 EVV 0x57 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0   UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5805}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-3));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x66_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(601)=0 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {601, 4441},
/*h(88)=1 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {88, 4437},
/*h(94)=2 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1  NOEVSR  ZEROING=0 UIMM8()*/ {94, 4445},
/*h(349)=3 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {349, 4448},
/*h(604)=4 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {604, 4450},
/*h(90)=5 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0  NOEVSR  ZEROING=0 UIMM8()*/ {90, 4436},
/*h(345)=6 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {345, 4439},
/*h(600)=7 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {600, 4441},
/*h(606)=8 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1  NOEVSR  ZEROING=0 UIMM8()*/ {606, 4449},
/*h(93)=9 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {93, 4446},
/*h(348)=10 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {348, 4448},
/*h(602)=11 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0  NOEVSR  ZEROING=0 UIMM8()*/ {602, 4440},
/*h(89)=12 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {89, 4437},
/*h(344)=13 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {344, 4439},
/*h(350)=14 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1  NOEVSR  ZEROING=0 UIMM8()*/ {350, 4447},
/*h(605)=15 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {605, 4450},
/*h(92)=16 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {92, 4446},
/*h(346)=17 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0  NOEVSR  ZEROING=0 UIMM8()*/ {346, 4438}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
hidx = ((11*key % 83) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x67_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[4] = {
/*h(94)=0 EVV 0x67 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W1  NOEVSR  ZEROING=0 UIMM8()*/ {94, 3769},
/*h(88)=1 EVV 0x67 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 3758},
/*h(90)=2 EVV 0x67 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  W0  NOEVSR  ZEROING=0 UIMM8()*/ {90, 3757},
/*h(92)=3 EVV 0x67 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_SCALAR()*/ {92, 3770}
};
xed_union64_t t;
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
hidx = (t.u64 = 2654435769  * key,  t.s.lo32 >> (32-2));
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x70_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(14)=0 EVV 0x70 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 3793},
/*h(46)=1 EVV 0x70 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 3795},
/*h(78)=2 EVV 0x70 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 3797},
/*h(12)=3 EVV 0x70 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 3794},
/*h(44)=4 EVV 0x70 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 3796},
/*h(76)=5 EVV 0x70 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 3798}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((9*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x71_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 3768},
/*h(76)=1 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 3788},
/*h(8)=2 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 3764},
/*h(12)=3 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 3784},
/*h(41)=4 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 3766},
/*h(45)=5 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 3786},
/*h(74)=6 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 3767},
/*h(78)=7 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 3787},
/*h(10)=8 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 3763},
/*h(14)=9 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 3783},
/*h(40)=10 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 3766},
/*h(44)=11 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 3786},
/*h(73)=12 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 3768},
/*h(77)=13 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 3788},
/*h(9)=14 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 3764},
/*h(13)=15 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 3784},
/*h(42)=16 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 3765},
/*h(46)=17 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 3785}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x72_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[6] = {
/*h(14)=0 EVV 0x72 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 5325},
/*h(46)=1 EVV 0x72 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5327},
/*h(78)=2 EVV 0x72 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5329},
/*h(12)=3 EVV 0x72 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL128  W1   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 5326},
/*h(44)=4 EVV 0x72 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL256  W1   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 5328},
/*h(76)=5 EVV 0x72 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM()  VL512  W1   UIMM8()  ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 5330}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((9*key % 7) % 6);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0x73_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[18] = {
/*h(72)=0 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {72, 5364},
/*h(76)=1 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 4365},
/*h(8)=2 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {8, 5360},
/*h(12)=3 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 4361},
/*h(41)=4 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {41, 5362},
/*h(45)=5 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 4363},
/*h(74)=6 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W0   UIMM8()*/ {74, 5363},
/*h(78)=7 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 4364},
/*h(10)=8 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W0   UIMM8()*/ {10, 5359},
/*h(14)=9 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 4360},
/*h(40)=10 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {40, 5362},
/*h(44)=11 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 4363},
/*h(73)=12 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {73, 5364},
/*h(77)=13 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 4365},
/*h(9)=14 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0   UIMM8()  ESIZE_32_BITS() NELEM_FULL()*/ {9, 5360},
/*h(13)=15 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 4361},
/*h(42)=16 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W0   UIMM8()*/ {42, 5361},
/*h(46)=17 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 4362}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 47) % 18);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xce_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 4158},
/*h(46)=1 EVV 0xCE V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 4155},
/*h(12)=2 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 4154},
/*h(77)=3 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 4158},
/*h(13)=4 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 4154},
/*h(78)=5 EVV 0xCE V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 4157},
/*h(44)=6 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 4156},
/*h(14)=7 EVV 0xCE V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 4153},
/*h(45)=8 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 4156}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
static xed_uint32_t xed3_phash_find_map0x0F3A_opcode0xcf_vv2(const xed_decoded_inst_t* d)
{
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
static const lu_entry_t lu_table[9] = {
/*h(76)=0 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {76, 5432},
/*h(46)=1 EVV 0xCF V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL256  W1   UIMM8()*/ {46, 5429},
/*h(12)=2 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {12, 5428},
/*h(77)=3 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {77, 5432},
/*h(13)=4 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {13, 5428},
/*h(78)=5 EVV 0xCF V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL512  W1   UIMM8()*/ {78, 5431},
/*h(44)=6 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {44, 5430},
/*h(14)=7 EVV 0xCF V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn]  VL128  W1   UIMM8()*/ {14, 5427},
/*h(45)=8 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1   UIMM8()  ESIZE_64_BITS() NELEM_FULL()*/ {45, 5430}
};
xed_uint64_t key = 0;
xed_uint64_t hidx = 0;
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
hidx = ((12*key % 19) % 9);
if(lu_table[hidx].key == key) {
    return lu_table[hidx].value;
}
else{
    return 0;
}
}
#endif
