/// @file xed-chip-features-table.c

// This file was automatically generated.
// Do not edit this file.

/*BEGIN_LEGAL

Copyright (c) 2018 Intel Corporation

  Licensed under the Apache License, Version 2.0 (the "License");
  you may not use this file except in compliance with the License.
  You may obtain a copy of the License at

      http://www.apache.org/licenses/LICENSE-2.0

  Unless required by applicable law or agreed to in writing, software
  distributed under the License is distributed on an "AS IS" BASIS,
  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  See the License for the specific language governing permissions and
  limitations under the License.
  
END_LEGAL */
#include "xed-internal-header.h"
#include "xed-isa-set-enum.h"
#include "xed-chip-enum.h"
xed_uint64_t xed_chip_features[XED_CHIP_LAST][4];
void xed_init_chip_model_info(void)
{
   const xed_uint64_t one=1;
   xed_chip_features[XED_CHIP_I86][0] = 0;
   xed_chip_features[XED_CHIP_I86][1] = 0
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I86][2] = 0;
   xed_chip_features[XED_CHIP_I86][3] = 0;
   xed_chip_features[XED_CHIP_I86FP][0] = 0;
   xed_chip_features[XED_CHIP_I86FP][1] = 0
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I86FP][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I86FP][3] = 0;
   xed_chip_features[XED_CHIP_I186][0] = 0;
   xed_chip_features[XED_CHIP_I186][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I186][2] = 0;
   xed_chip_features[XED_CHIP_I186][3] = 0;
   xed_chip_features[XED_CHIP_I186FP][0] = 0;
   xed_chip_features[XED_CHIP_I186FP][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I186FP][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I186FP][3] = 0;
   xed_chip_features[XED_CHIP_I286REAL][0] = 0;
   xed_chip_features[XED_CHIP_I286REAL][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I286REAL][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I286REAL][3] = 0;
   xed_chip_features[XED_CHIP_I286][0] = 0;
   xed_chip_features[XED_CHIP_I286][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I286][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I286][3] = 0;
   xed_chip_features[XED_CHIP_I2186FP][0] = 0;
   xed_chip_features[XED_CHIP_I2186FP][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I2186FP][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I2186FP][3] = 0;
   xed_chip_features[XED_CHIP_I386REAL][0] = 0;
   xed_chip_features[XED_CHIP_I386REAL][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I386REAL][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I386REAL][3] = 0;
   xed_chip_features[XED_CHIP_I386][0] = 0;
   xed_chip_features[XED_CHIP_I386][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I386][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I386][3] = 0;
   xed_chip_features[XED_CHIP_I386FP][0] = 0;
   xed_chip_features[XED_CHIP_I386FP][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I386FP][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I386FP][3] = 0;
   xed_chip_features[XED_CHIP_I486REAL][0] = 0;
   xed_chip_features[XED_CHIP_I486REAL][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I486REAL][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I486REAL][3] = 0;
   xed_chip_features[XED_CHIP_I486][0] = 0;
   xed_chip_features[XED_CHIP_I486][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64));
   xed_chip_features[XED_CHIP_I486][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_I486][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUMREAL][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUMREAL][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64));
   xed_chip_features[XED_CHIP_PENTIUMREAL][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUMREAL][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUM][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUM][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64));
   xed_chip_features[XED_CHIP_PENTIUM][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUM][3] = 0;
   xed_chip_features[XED_CHIP_QUARK][0] = 0;
   xed_chip_features[XED_CHIP_QUARK][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64));
   xed_chip_features[XED_CHIP_QUARK][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_QUARK][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUMMMXREAL][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUMMMXREAL][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_RDPMC-64));
   xed_chip_features[XED_CHIP_PENTIUMMMXREAL][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUMMMXREAL][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUMMMX][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUMMMX][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_RDPMC-64));
   xed_chip_features[XED_CHIP_PENTIUMMMX][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUMMMX][3] = 0;
   xed_chip_features[XED_CHIP_ALLREAL][0] = 0;
   xed_chip_features[XED_CHIP_ALLREAL][1] = 0
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_RDPMC-64));
   xed_chip_features[XED_CHIP_ALLREAL][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_ALLREAL][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUMPRO][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUMPRO][1] = 0
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64));
   xed_chip_features[XED_CHIP_PENTIUMPRO][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUMPRO][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUM2][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUM2][1] = 0
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64));
   xed_chip_features[XED_CHIP_PENTIUM2][2] = 0
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUM2][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUM3][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUM3][1] = 0
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64));
   xed_chip_features[XED_CHIP_PENTIUM3][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUM3][3] = 0;
   xed_chip_features[XED_CHIP_PENTIUM4][0] = 0;
   xed_chip_features[XED_CHIP_PENTIUM4][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64));
   xed_chip_features[XED_CHIP_PENTIUM4][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENTIUM4][3] = 0;
   xed_chip_features[XED_CHIP_P4PRESCOTT][0] = 0;
   xed_chip_features[XED_CHIP_P4PRESCOTT][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64));
   xed_chip_features[XED_CHIP_P4PRESCOTT][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_P4PRESCOTT][3] = 0;
   xed_chip_features[XED_CHIP_P4PRESCOTT_NOLAHF][0] = 0;
   xed_chip_features[XED_CHIP_P4PRESCOTT_NOLAHF][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64));
   xed_chip_features[XED_CHIP_P4PRESCOTT_NOLAHF][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_P4PRESCOTT_NOLAHF][3] = 0;
   xed_chip_features[XED_CHIP_P4PRESCOTT_VTX][0] = 0;
   xed_chip_features[XED_CHIP_P4PRESCOTT_VTX][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64));
   xed_chip_features[XED_CHIP_P4PRESCOTT_VTX][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_P4PRESCOTT_VTX][3] = 0;
   xed_chip_features[XED_CHIP_CORE2][0] = 0;
   xed_chip_features[XED_CHIP_CORE2][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64));
   xed_chip_features[XED_CHIP_CORE2][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_CORE2][3] = 0;
   xed_chip_features[XED_CHIP_PENRYN][0] = 0;
   xed_chip_features[XED_CHIP_PENRYN][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_PENRYN][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_PENRYN][3] = 0;
   xed_chip_features[XED_CHIP_PENRYN_E][0] = 0;
   xed_chip_features[XED_CHIP_PENRYN_E][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_PENRYN_E][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128));
   xed_chip_features[XED_CHIP_PENRYN_E][3] = 0;
   xed_chip_features[XED_CHIP_NEHALEM][0] = 0;
   xed_chip_features[XED_CHIP_NEHALEM][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_NEHALEM][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_NEHALEM][3] = 0;
   xed_chip_features[XED_CHIP_WESTMERE][0] = 0
      |(one<<XED_ISA_SET_AES);
   xed_chip_features[XED_CHIP_WESTMERE][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_WESTMERE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_WESTMERE][3] = 0;
   xed_chip_features[XED_CHIP_BONNELL][0] = 0;
   xed_chip_features[XED_CHIP_BONNELL][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64));
   xed_chip_features[XED_CHIP_BONNELL][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_BONNELL][3] = 0;
   xed_chip_features[XED_CHIP_SALTWELL][0] = 0;
   xed_chip_features[XED_CHIP_SALTWELL][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64));
   xed_chip_features[XED_CHIP_SALTWELL][2] = 0
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_SALTWELL][3] = 0;
   xed_chip_features[XED_CHIP_SILVERMONT][0] = 0
      |(one<<XED_ISA_SET_AES);
   xed_chip_features[XED_CHIP_SILVERMONT][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_SILVERMONT][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128));
   xed_chip_features[XED_CHIP_SILVERMONT][3] = 0;
   xed_chip_features[XED_CHIP_AMD][0] = 0
      |(one<<XED_ISA_SET_3DNOW)
      |(one<<XED_ISA_SET_AMD);
   xed_chip_features[XED_CHIP_AMD][1] = 0
      |(one<<(XED_ISA_SET_CLZERO-64))
      |(one<<(XED_ISA_SET_FMA4-64))
      |(one<<(XED_ISA_SET_MONITORX-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64));
   xed_chip_features[XED_CHIP_AMD][2] = 0
      |(one<<(XED_ISA_SET_SSE4A-128))
      |(one<<(XED_ISA_SET_SVM-128))
      |(one<<(XED_ISA_SET_TBM-128))
      |(one<<(XED_ISA_SET_XOP-128));
   xed_chip_features[XED_CHIP_AMD][3] = 0;
   xed_chip_features[XED_CHIP_GOLDMONT][0] = 0
      |(one<<XED_ISA_SET_AES);
   xed_chip_features[XED_CHIP_GOLDMONT][1] = 0
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_GOLDMONT][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_GOLDMONT][3] = 0;
   xed_chip_features[XED_CHIP_GOLDMONT_PLUS][0] = 0
      |(one<<XED_ISA_SET_AES);
   xed_chip_features[XED_CHIP_GOLDMONT_PLUS][1] = 0
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_PT-64))
      |(one<<(XED_ISA_SET_RDPID-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_GOLDMONT_PLUS][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_GOLDMONT_PLUS][3] = 0;
   xed_chip_features[XED_CHIP_TREMONT][0] = 0
      |(one<<XED_ISA_SET_AES);
   xed_chip_features[XED_CHIP_TREMONT][1] = 0
      |(one<<(XED_ISA_SET_CLDEMOTE-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CLWB-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_ENCLV-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_GFNI-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MOVDIR-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_PT-64))
      |(one<<(XED_ISA_SET_RDPID-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_TREMONT][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_WAITPKG-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_TREMONT][3] = 0;
   xed_chip_features[XED_CHIP_SANDYBRIDGE][0] = 0
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVXAES);
   xed_chip_features[XED_CHIP_SANDYBRIDGE][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_SANDYBRIDGE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128));
   xed_chip_features[XED_CHIP_SANDYBRIDGE][3] = 0;
   xed_chip_features[XED_CHIP_IVYBRIDGE][0] = 0
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVXAES);
   xed_chip_features[XED_CHIP_IVYBRIDGE][1] = 0
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_IVYBRIDGE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128));
   xed_chip_features[XED_CHIP_IVYBRIDGE][3] = 0;
   xed_chip_features[XED_CHIP_HASWELL][0] = 0
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_HASWELL][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_HASWELL][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128));
   xed_chip_features[XED_CHIP_HASWELL][3] = 0;
   xed_chip_features[XED_CHIP_BROADWELL][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_BROADWELL][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_BROADWELL][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128));
   xed_chip_features[XED_CHIP_BROADWELL][3] = 0;
   xed_chip_features[XED_CHIP_SKYLAKE][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_SKYLAKE][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_SKYLAKE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_SKYLAKE][3] = 0;
   xed_chip_features[XED_CHIP_SKYLAKE_SERVER][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512BW_128)
      |(one<<XED_ISA_SET_AVX512BW_128N)
      |(one<<XED_ISA_SET_AVX512BW_256)
      |(one<<XED_ISA_SET_AVX512BW_512)
      |(one<<XED_ISA_SET_AVX512BW_KOP)
      |(one<<XED_ISA_SET_AVX512CD_128)
      |(one<<XED_ISA_SET_AVX512CD_256)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512DQ_128)
      |(one<<XED_ISA_SET_AVX512DQ_128N)
      |(one<<XED_ISA_SET_AVX512DQ_256)
      |(one<<XED_ISA_SET_AVX512DQ_512)
      |(one<<XED_ISA_SET_AVX512DQ_KOP)
      |(one<<XED_ISA_SET_AVX512DQ_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_256)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_SKYLAKE_SERVER][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CLWB-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PKU-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_SKYLAKE_SERVER][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_SKYLAKE_SERVER][3] = 0;
   xed_chip_features[XED_CHIP_KNL][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512ER_512)
      |(one<<XED_ISA_SET_AVX512ER_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512PF_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_KNL][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHWT1-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_KNL][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128));
   xed_chip_features[XED_CHIP_KNL][3] = 0;
   xed_chip_features[XED_CHIP_KNM][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512ER_512)
      |(one<<XED_ISA_SET_AVX512ER_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512PF_512)
      |(one<<XED_ISA_SET_AVX512_4FMAPS_512)
      |(one<<XED_ISA_SET_AVX512_4FMAPS_SCALAR)
      |(one<<XED_ISA_SET_AVX512_4VNNIW_512)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_KNM][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHWT1-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_KNM][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128));
   xed_chip_features[XED_CHIP_KNM][3] = 0;
   xed_chip_features[XED_CHIP_CANNONLAKE][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512BW_128)
      |(one<<XED_ISA_SET_AVX512BW_128N)
      |(one<<XED_ISA_SET_AVX512BW_256)
      |(one<<XED_ISA_SET_AVX512BW_512)
      |(one<<XED_ISA_SET_AVX512BW_KOP)
      |(one<<XED_ISA_SET_AVX512CD_128)
      |(one<<XED_ISA_SET_AVX512CD_256)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512DQ_128)
      |(one<<XED_ISA_SET_AVX512DQ_128N)
      |(one<<XED_ISA_SET_AVX512DQ_256)
      |(one<<XED_ISA_SET_AVX512DQ_512)
      |(one<<XED_ISA_SET_AVX512DQ_KOP)
      |(one<<XED_ISA_SET_AVX512DQ_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_256)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512_IFMA_128)
      |(one<<XED_ISA_SET_AVX512_IFMA_256)
      |(one<<XED_ISA_SET_AVX512_IFMA_512)
      |(one<<XED_ISA_SET_AVX512_VBMI_128)
      |(one<<XED_ISA_SET_AVX512_VBMI_256)
      |(one<<XED_ISA_SET_AVX512_VBMI_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_CANNONLAKE][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PKU-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_CANNONLAKE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_CANNONLAKE][3] = 0;
   xed_chip_features[XED_CHIP_ICELAKE][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512BW_128)
      |(one<<XED_ISA_SET_AVX512BW_128N)
      |(one<<XED_ISA_SET_AVX512BW_256)
      |(one<<XED_ISA_SET_AVX512BW_512)
      |(one<<XED_ISA_SET_AVX512BW_KOP)
      |(one<<XED_ISA_SET_AVX512CD_128)
      |(one<<XED_ISA_SET_AVX512CD_256)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512DQ_128)
      |(one<<XED_ISA_SET_AVX512DQ_128N)
      |(one<<XED_ISA_SET_AVX512DQ_256)
      |(one<<XED_ISA_SET_AVX512DQ_512)
      |(one<<XED_ISA_SET_AVX512DQ_KOP)
      |(one<<XED_ISA_SET_AVX512DQ_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_256)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512_BITALG_128)
      |(one<<XED_ISA_SET_AVX512_BITALG_256)
      |(one<<XED_ISA_SET_AVX512_BITALG_512)
      |(one<<XED_ISA_SET_AVX512_GFNI_128)
      |(one<<XED_ISA_SET_AVX512_GFNI_256)
      |(one<<XED_ISA_SET_AVX512_GFNI_512)
      |(one<<XED_ISA_SET_AVX512_IFMA_128)
      |(one<<XED_ISA_SET_AVX512_IFMA_256)
      |(one<<XED_ISA_SET_AVX512_IFMA_512)
      |(one<<XED_ISA_SET_AVX512_VAES_128)
      |(one<<XED_ISA_SET_AVX512_VAES_256)
      |(one<<XED_ISA_SET_AVX512_VAES_512)
      |(one<<XED_ISA_SET_AVX512_VBMI2_128)
      |(one<<XED_ISA_SET_AVX512_VBMI2_256)
      |(one<<XED_ISA_SET_AVX512_VBMI2_512)
      |(one<<XED_ISA_SET_AVX512_VBMI_128)
      |(one<<XED_ISA_SET_AVX512_VBMI_256)
      |(one<<XED_ISA_SET_AVX512_VBMI_512)
      |(one<<XED_ISA_SET_AVX512_VNNI_128)
      |(one<<XED_ISA_SET_AVX512_VNNI_256)
      |(one<<XED_ISA_SET_AVX512_VNNI_512)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_512)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_AVX_GFNI)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_ICELAKE][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CLWB-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_GFNI-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PKU-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPID-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_ICELAKE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VAES-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VPCLMULQDQ-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_ICELAKE][3] = 0;
   xed_chip_features[XED_CHIP_ICELAKE_SERVER][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512BW_128)
      |(one<<XED_ISA_SET_AVX512BW_128N)
      |(one<<XED_ISA_SET_AVX512BW_256)
      |(one<<XED_ISA_SET_AVX512BW_512)
      |(one<<XED_ISA_SET_AVX512BW_KOP)
      |(one<<XED_ISA_SET_AVX512CD_128)
      |(one<<XED_ISA_SET_AVX512CD_256)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512DQ_128)
      |(one<<XED_ISA_SET_AVX512DQ_128N)
      |(one<<XED_ISA_SET_AVX512DQ_256)
      |(one<<XED_ISA_SET_AVX512DQ_512)
      |(one<<XED_ISA_SET_AVX512DQ_KOP)
      |(one<<XED_ISA_SET_AVX512DQ_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_256)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512_BITALG_128)
      |(one<<XED_ISA_SET_AVX512_BITALG_256)
      |(one<<XED_ISA_SET_AVX512_BITALG_512)
      |(one<<XED_ISA_SET_AVX512_GFNI_128)
      |(one<<XED_ISA_SET_AVX512_GFNI_256)
      |(one<<XED_ISA_SET_AVX512_GFNI_512)
      |(one<<XED_ISA_SET_AVX512_IFMA_128)
      |(one<<XED_ISA_SET_AVX512_IFMA_256)
      |(one<<XED_ISA_SET_AVX512_IFMA_512)
      |(one<<XED_ISA_SET_AVX512_VAES_128)
      |(one<<XED_ISA_SET_AVX512_VAES_256)
      |(one<<XED_ISA_SET_AVX512_VAES_512)
      |(one<<XED_ISA_SET_AVX512_VBMI2_128)
      |(one<<XED_ISA_SET_AVX512_VBMI2_256)
      |(one<<XED_ISA_SET_AVX512_VBMI2_512)
      |(one<<XED_ISA_SET_AVX512_VBMI_128)
      |(one<<XED_ISA_SET_AVX512_VBMI_256)
      |(one<<XED_ISA_SET_AVX512_VBMI_512)
      |(one<<XED_ISA_SET_AVX512_VNNI_128)
      |(one<<XED_ISA_SET_AVX512_VNNI_256)
      |(one<<XED_ISA_SET_AVX512_VNNI_512)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_512)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_AVX_GFNI)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_ICELAKE_SERVER][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CLWB-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_GFNI-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PCONFIG-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PKU-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_RDPID-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SGX_ENCLV-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_ICELAKE_SERVER][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VAES-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VPCLMULQDQ-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_WBNOINVD-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_ICELAKE_SERVER][3] = 0;
   xed_chip_features[XED_CHIP_FUTURE][0] = 0
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512BW_128)
      |(one<<XED_ISA_SET_AVX512BW_128N)
      |(one<<XED_ISA_SET_AVX512BW_256)
      |(one<<XED_ISA_SET_AVX512BW_512)
      |(one<<XED_ISA_SET_AVX512BW_KOP)
      |(one<<XED_ISA_SET_AVX512CD_128)
      |(one<<XED_ISA_SET_AVX512CD_256)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512DQ_128)
      |(one<<XED_ISA_SET_AVX512DQ_128N)
      |(one<<XED_ISA_SET_AVX512DQ_256)
      |(one<<XED_ISA_SET_AVX512DQ_512)
      |(one<<XED_ISA_SET_AVX512DQ_KOP)
      |(one<<XED_ISA_SET_AVX512DQ_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_256)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512_BITALG_128)
      |(one<<XED_ISA_SET_AVX512_BITALG_256)
      |(one<<XED_ISA_SET_AVX512_BITALG_512)
      |(one<<XED_ISA_SET_AVX512_GFNI_128)
      |(one<<XED_ISA_SET_AVX512_GFNI_256)
      |(one<<XED_ISA_SET_AVX512_GFNI_512)
      |(one<<XED_ISA_SET_AVX512_IFMA_128)
      |(one<<XED_ISA_SET_AVX512_IFMA_256)
      |(one<<XED_ISA_SET_AVX512_IFMA_512)
      |(one<<XED_ISA_SET_AVX512_VAES_128)
      |(one<<XED_ISA_SET_AVX512_VAES_256)
      |(one<<XED_ISA_SET_AVX512_VAES_512)
      |(one<<XED_ISA_SET_AVX512_VBMI2_128)
      |(one<<XED_ISA_SET_AVX512_VBMI2_256)
      |(one<<XED_ISA_SET_AVX512_VBMI2_512)
      |(one<<XED_ISA_SET_AVX512_VBMI_128)
      |(one<<XED_ISA_SET_AVX512_VBMI_256)
      |(one<<XED_ISA_SET_AVX512_VBMI_512)
      |(one<<XED_ISA_SET_AVX512_VNNI_128)
      |(one<<XED_ISA_SET_AVX512_VNNI_256)
      |(one<<XED_ISA_SET_AVX512_VNNI_512)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_512)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_AVX_GFNI)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_FUTURE][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CET-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CLWB-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_GFNI-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PKU-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_PT-64))
      |(one<<(XED_ISA_SET_RDPID-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_FUTURE][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_VAES-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VPCLMULQDQ-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_FUTURE][3] = 0;
   xed_chip_features[XED_CHIP_ALL][0] = 0
      |(one<<XED_ISA_SET_3DNOW)
      |(one<<XED_ISA_SET_ADOX_ADCX)
      |(one<<XED_ISA_SET_AES)
      |(one<<XED_ISA_SET_AMD)
      |(one<<XED_ISA_SET_AVX)
      |(one<<XED_ISA_SET_AVX2)
      |(one<<XED_ISA_SET_AVX2GATHER)
      |(one<<XED_ISA_SET_AVX512BW_128)
      |(one<<XED_ISA_SET_AVX512BW_128N)
      |(one<<XED_ISA_SET_AVX512BW_256)
      |(one<<XED_ISA_SET_AVX512BW_512)
      |(one<<XED_ISA_SET_AVX512BW_KOP)
      |(one<<XED_ISA_SET_AVX512CD_128)
      |(one<<XED_ISA_SET_AVX512CD_256)
      |(one<<XED_ISA_SET_AVX512CD_512)
      |(one<<XED_ISA_SET_AVX512DQ_128)
      |(one<<XED_ISA_SET_AVX512DQ_128N)
      |(one<<XED_ISA_SET_AVX512DQ_256)
      |(one<<XED_ISA_SET_AVX512DQ_512)
      |(one<<XED_ISA_SET_AVX512DQ_KOP)
      |(one<<XED_ISA_SET_AVX512DQ_SCALAR)
      |(one<<XED_ISA_SET_AVX512ER_512)
      |(one<<XED_ISA_SET_AVX512ER_SCALAR)
      |(one<<XED_ISA_SET_AVX512F_128)
      |(one<<XED_ISA_SET_AVX512F_128N)
      |(one<<XED_ISA_SET_AVX512F_256)
      |(one<<XED_ISA_SET_AVX512F_512)
      |(one<<XED_ISA_SET_AVX512F_KOP)
      |(one<<XED_ISA_SET_AVX512F_SCALAR)
      |(one<<XED_ISA_SET_AVX512PF_512)
      |(one<<XED_ISA_SET_AVX512_4FMAPS_512)
      |(one<<XED_ISA_SET_AVX512_4FMAPS_SCALAR)
      |(one<<XED_ISA_SET_AVX512_4VNNIW_512)
      |(one<<XED_ISA_SET_AVX512_BITALG_128)
      |(one<<XED_ISA_SET_AVX512_BITALG_256)
      |(one<<XED_ISA_SET_AVX512_BITALG_512)
      |(one<<XED_ISA_SET_AVX512_GFNI_128)
      |(one<<XED_ISA_SET_AVX512_GFNI_256)
      |(one<<XED_ISA_SET_AVX512_GFNI_512)
      |(one<<XED_ISA_SET_AVX512_IFMA_128)
      |(one<<XED_ISA_SET_AVX512_IFMA_256)
      |(one<<XED_ISA_SET_AVX512_IFMA_512)
      |(one<<XED_ISA_SET_AVX512_VAES_128)
      |(one<<XED_ISA_SET_AVX512_VAES_256)
      |(one<<XED_ISA_SET_AVX512_VAES_512)
      |(one<<XED_ISA_SET_AVX512_VBMI2_128)
      |(one<<XED_ISA_SET_AVX512_VBMI2_256)
      |(one<<XED_ISA_SET_AVX512_VBMI2_512)
      |(one<<XED_ISA_SET_AVX512_VBMI_128)
      |(one<<XED_ISA_SET_AVX512_VBMI_256)
      |(one<<XED_ISA_SET_AVX512_VBMI_512)
      |(one<<XED_ISA_SET_AVX512_VNNI_128)
      |(one<<XED_ISA_SET_AVX512_VNNI_256)
      |(one<<XED_ISA_SET_AVX512_VNNI_512)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPCLMULQDQ_512)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_128)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_256)
      |(one<<XED_ISA_SET_AVX512_VPOPCNTDQ_512)
      |(one<<XED_ISA_SET_AVXAES)
      |(one<<XED_ISA_SET_AVX_GFNI)
      |(one<<XED_ISA_SET_BMI1);
   xed_chip_features[XED_CHIP_ALL][1] = 0
      |(one<<(XED_ISA_SET_BMI2-64))
      |(one<<(XED_ISA_SET_CET-64))
      |(one<<(XED_ISA_SET_CLDEMOTE-64))
      |(one<<(XED_ISA_SET_CLFLUSHOPT-64))
      |(one<<(XED_ISA_SET_CLFSH-64))
      |(one<<(XED_ISA_SET_CLWB-64))
      |(one<<(XED_ISA_SET_CLZERO-64))
      |(one<<(XED_ISA_SET_CMOV-64))
      |(one<<(XED_ISA_SET_CMPXCHG16B-64))
      |(one<<(XED_ISA_SET_ENCLV-64))
      |(one<<(XED_ISA_SET_F16C-64))
      |(one<<(XED_ISA_SET_FAT_NOP-64))
      |(one<<(XED_ISA_SET_FCMOV-64))
      |(one<<(XED_ISA_SET_FMA-64))
      |(one<<(XED_ISA_SET_FMA4-64))
      |(one<<(XED_ISA_SET_FXSAVE-64))
      |(one<<(XED_ISA_SET_FXSAVE64-64))
      |(one<<(XED_ISA_SET_GFNI-64))
      |(one<<(XED_ISA_SET_I186-64))
      |(one<<(XED_ISA_SET_I286PROTECTED-64))
      |(one<<(XED_ISA_SET_I286REAL-64))
      |(one<<(XED_ISA_SET_I386-64))
      |(one<<(XED_ISA_SET_I486-64))
      |(one<<(XED_ISA_SET_I486REAL-64))
      |(one<<(XED_ISA_SET_I86-64))
      |(one<<(XED_ISA_SET_INVPCID-64))
      |(one<<(XED_ISA_SET_LAHF-64))
      |(one<<(XED_ISA_SET_LONGMODE-64))
      |(one<<(XED_ISA_SET_LZCNT-64))
      |(one<<(XED_ISA_SET_MONITOR-64))
      |(one<<(XED_ISA_SET_MONITORX-64))
      |(one<<(XED_ISA_SET_MOVBE-64))
      |(one<<(XED_ISA_SET_MOVDIR-64))
      |(one<<(XED_ISA_SET_MPX-64))
      |(one<<(XED_ISA_SET_PAUSE-64))
      |(one<<(XED_ISA_SET_PCLMULQDQ-64))
      |(one<<(XED_ISA_SET_PCONFIG-64))
      |(one<<(XED_ISA_SET_PENTIUMMMX-64))
      |(one<<(XED_ISA_SET_PENTIUMREAL-64))
      |(one<<(XED_ISA_SET_PKU-64))
      |(one<<(XED_ISA_SET_POPCNT-64))
      |(one<<(XED_ISA_SET_PPRO-64))
      |(one<<(XED_ISA_SET_PREFETCHW-64))
      |(one<<(XED_ISA_SET_PREFETCHWT1-64))
      |(one<<(XED_ISA_SET_PREFETCH_NOP-64))
      |(one<<(XED_ISA_SET_PT-64))
      |(one<<(XED_ISA_SET_RDPID-64))
      |(one<<(XED_ISA_SET_RDPMC-64))
      |(one<<(XED_ISA_SET_RDRAND-64))
      |(one<<(XED_ISA_SET_RDSEED-64))
      |(one<<(XED_ISA_SET_RDTSCP-64))
      |(one<<(XED_ISA_SET_RDWRFSGS-64))
      |(one<<(XED_ISA_SET_RTM-64))
      |(one<<(XED_ISA_SET_SGX-64))
      |(one<<(XED_ISA_SET_SGX_ENCLV-64))
      |(one<<(XED_ISA_SET_SHA-64))
      |(one<<(XED_ISA_SET_SMAP-64))
      |(one<<(XED_ISA_SET_SMX-64))
      |(one<<(XED_ISA_SET_SSE-64))
      |(one<<(XED_ISA_SET_SSE2-64))
      |(one<<(XED_ISA_SET_SSE2MMX-64))
      |(one<<(XED_ISA_SET_SSE3-64))
      |(one<<(XED_ISA_SET_SSE3X87-64))
      |(one<<(XED_ISA_SET_SSE4-64));
   xed_chip_features[XED_CHIP_ALL][2] = 0
      |(one<<(XED_ISA_SET_SSE42-128))
      |(one<<(XED_ISA_SET_SSE4A-128))
      |(one<<(XED_ISA_SET_SSEMXCSR-128))
      |(one<<(XED_ISA_SET_SSE_PREFETCH-128))
      |(one<<(XED_ISA_SET_SSSE3-128))
      |(one<<(XED_ISA_SET_SSSE3MMX-128))
      |(one<<(XED_ISA_SET_SVM-128))
      |(one<<(XED_ISA_SET_TBM-128))
      |(one<<(XED_ISA_SET_VAES-128))
      |(one<<(XED_ISA_SET_VMFUNC-128))
      |(one<<(XED_ISA_SET_VPCLMULQDQ-128))
      |(one<<(XED_ISA_SET_VTX-128))
      |(one<<(XED_ISA_SET_WAITPKG-128))
      |(one<<(XED_ISA_SET_WBNOINVD-128))
      |(one<<(XED_ISA_SET_X87-128))
      |(one<<(XED_ISA_SET_XOP-128))
      |(one<<(XED_ISA_SET_XSAVE-128))
      |(one<<(XED_ISA_SET_XSAVEC-128))
      |(one<<(XED_ISA_SET_XSAVEOPT-128))
      |(one<<(XED_ISA_SET_XSAVES-128));
   xed_chip_features[XED_CHIP_ALL][3] = 0;
}
