/// @file xed3-op-chain-capture-lu.h

// This file was automatically generated.
// Do not edit this file.

#if !defined(XED3_OP_CHAIN_CAPTURE_LU_H)
# define XED3_OP_CHAIN_CAPTURE_LU_H
/*BEGIN_LEGAL

Copyright (c) 2018 Intel Corporation

  Licensed under the Apache License, Version 2.0 (the "License");
  you may not use this file except in compliance with the License.
  You may obtain a copy of the License at

      http://www.apache.org/licenses/LICENSE-2.0

  Unless required by applicable law or agreed to in writing, software
  distributed under the License is distributed on an "AS IS" BASIS,
  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  See the License for the specific language governing permissions and
  limitations under the License.
  
END_LEGAL */
#include "xed-internal-header.h"
#include "xed3-op-chain-capture.h"
typedef xed_error_enum_t(*xed3_op_chain_function_t)(xed_decoded_inst_t*);
static xed3_op_chain_function_t xed3_op_chain_fptr_lu[6780] = {
/*NO PATTERN*/ (xed3_op_chain_function_t)0,
/* MEM0   imm_const [1] w EXPLICIT w i16
 REG0   reg       [XED_REG_LDTR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_LDTR,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_LDTR] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_LDTR,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw8 int
 REG1   reg       [XED_REG_AX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_CX] w SUPPRESSED INVALID
 REG3   reg       [XED_REG_DX] w SUPPRESSED INVALID
 REG4   reg       [XED_REG_BX] w SUPPRESSED INVALID
 REG5   reg       [XED_REG_BP] w SUPPRESSED INVALID
 REG6   reg       [XED_REG_SI] w SUPPRESSED INVALID
 REG7   reg       [XED_REG_DI] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED spw8 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=3*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_XED_REG_AX_REG2_XED_REG_CX_REG3_XED_REG_DX_REG4_XED_REG_BX_REG5_XED_REG_BP_REG6_XED_REG_SI_REG7_XED_REG_DI_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=4*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=5*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED w i16
 MEM0   imm_const [1] r SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=6*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT s64 struct
 REG0   reg       [XED_REG_GDTR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=7*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_GDTR,
/* MEM0   imm_const [1] r EXPLICIT s struct
 REG0   reg       [XED_REG_GDTR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=8*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_GDTR,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=9*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=10*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 REG1   reg       [XED_REG_ECX] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=11*/ xed3_capture_chain_ntluf_REG0_OrAX_REG1_XED_REG_ECX,
/* MEM0   imm_const [1] r EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=12*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=13*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=14*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 MEM1   imm_const [1] w SUPPRESSED spw int
 BASE1  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_SSEG1 INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=15*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_STACKPUSH_REG1_rIP_MEM1_const1_BASE1_SrSP_SEG1_FINAL_SSEG1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 REG2   nt_lookup_fn rw SUPPRESSED rIP INVALID
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=16*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_STACKPUSH_REG2_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 REG1   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=17*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_STACKPUSH_REG1_XED_REG_EIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 REG1   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=18*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_STACKPUSH_REG1_XED_REG_RIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=19*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=20*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MEM0   imm_const [1] rw EXPLICIT w i16
 REG0   nt_lookup_fn r EXPLICIT GPR16_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=21*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR16_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR16_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR16_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=22*/ xed3_capture_chain_ntluf_REG0_GPR16_B_REG1_GPR16_R_REG2_rFLAGS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=23*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=24*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT DR_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=25*/ xed3_capture_chain_ntluf_REG0_DR_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT DR_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=26*/ xed3_capture_chain_ntluf_REG0_DR_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT DR_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=27*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_DR_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B INVALID
 REG1   nt_lookup_fn r EXPLICIT DR_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=28*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_DR_R,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=29*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=30*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=31*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=32*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=33*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=34*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=35*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=36*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=37*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=38*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=39*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=40*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=41*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=42*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_MSRS] w SUPPRESSED INVALID inum=43*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EDX_REG2_XED_REG_ECX_REG3_XED_REG_MSRS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=44*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=45*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=46*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=47*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=48*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR32_R,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=49*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR64_R,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=50*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=51*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=52*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=53*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=54*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=55*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=56*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT BND_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=57*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_BND_B,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT q u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=58*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT q u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=59*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=60*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT BND_B INVALID
 REG1   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=61*/ xed3_capture_chain_ntluf_REG0_BND_B_REG1_BND_R,
/* MEM0   imm_const [1] w EXPLICIT q u32
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=62*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* MEM0   imm_const [1] w EXPLICIT q u32
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=63*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=64*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=65*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=66*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R v int
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=67*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R v int
 REG1   nt_lookup_fn r EXPLICIT GPRv_B v int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=68*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT MMX_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=69*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MMX_R,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=70*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=71*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=72*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=73*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=74*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=75*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=76*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=77*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=78*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=79*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=80*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=81*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT w u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=82*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B w u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=83*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=84*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=85*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=86*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=87*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=88*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=89*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=90*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=91*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=92*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT d u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=93*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=94*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=95*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=96*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_EIP] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_ESP] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID inum=97*/ xed3_capture_chain_ntluf_REG0_XED_REG_EIP_REG1_XED_REG_ESP_REG2_XED_REG_ECX_REG3_XED_REG_EDX,
/* REG0   reg       [XED_REG_RIP] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_RSP] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_RCX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] r SUPPRESSED INVALID inum=98*/ xed3_capture_chain_ntluf_REG0_XED_REG_RIP_REG1_XED_REG_RSP_REG2_XED_REG_RCX_REG3_XED_REG_RDX,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=99*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=100*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=101*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=102*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mem94 struct
 REG0   reg       [XED_REG_X87CONTROL] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_X87TAG] rw SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=103*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL_REG1_XED_REG_X87TAG_REG3_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem108 struct
 REG0   reg       [XED_REG_X87CONTROL] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_X87TAG] rw SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=104*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL_REG1_XED_REG_X87TAG_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=105*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=106*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=107*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=108*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=109*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=110*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=111*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=112*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=113*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=114*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=115*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=116*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=117*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=118*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=119*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=120*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=121*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=122*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=123*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=124*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=125*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=126*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 AGEN   imm_const [1] r EXPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=127*/ xed3_capture_chain_ntluf_REG0_BND_R_AGEN_const1,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=128*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=129*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=130*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=131*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=132*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 AGEN   imm_const [1] r EXPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=133*/ xed3_capture_chain_ntluf_REG0_BND_R_AGEN_const1,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=134*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=135*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=136*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=137*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=138*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=139*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=140*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=141*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT sd f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=142*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_R sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=143*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=144*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=145*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=146*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=147*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=148*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=149*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=150*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=151*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=152*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=153*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=154*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=155*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=156*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=157*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=158*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=159*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=160*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=161*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=162*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=163*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=164*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=165*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=166*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=167*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=168*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=169*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=170*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=171*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] r IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=172*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=173*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=174*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=175*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=176*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=177*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=178*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=179*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=180*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=181*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=182*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=183*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=184*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRz_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=185*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRz_B_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=186*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT p2 struct
 REG1   reg       [XED_REG_SS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=187*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_XED_REG_SS,
/* REG0   reg       [XED_REG_AH] w SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=188*/ xed3_capture_chain_ntluf_REG0_XED_REG_AH_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=189*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=190*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=191*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=192*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=193*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=194*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] r SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] rw SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=195*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=196*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=197*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=198*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=199*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=200*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=201*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=202*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=203*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=204*/ xed3_capture_chain_ntluf_REG0_OrAX,
/* REG0   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=205*/ xed3_capture_chain_ntluf_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_ECX,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=206*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=207*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=208*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=209*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=210*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=211*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=212*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=213*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=214*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT bnd32 u32
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=215*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* MEM0   imm_const [1] w EXPLICIT bnd64 u64
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=216*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* MEM0   imm_const [1] w EXPLICIT bnd64 u64
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=217*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* MEM0   imm_const [1] w EXPLICIT bnd64 u64
 REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=218*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_BND_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=219*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=220*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=221*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 IMM1   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=222*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_IMM1_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=223*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=224*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=225*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_MMX_B,
/* IMM0   imm_const [1] r EXPLICIT b u8
 REG0   nt_lookup_fn w SUPPRESSED rIP INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=226*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_rIP_REG1_rFLAGS,
/* inum=227*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=228*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=229*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=230*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=231*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=232*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=233*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS_REG4_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q f32
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=234*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q f32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=235*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=236*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=237*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=238*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=239*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_AX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_AL] r SUPPRESSED INVALID inum=240*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_REG1_XED_REG_AL,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=241*/ xed3_capture_nt_nop_ntluf,
/* REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED w i16
 MEM0   imm_const [1] w SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=242*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=243*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=244*/ xed3_capture_chain_ntluf_REG0_GPR8_B,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=245*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=246*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=247*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=248*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=249*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=250*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=251*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=252*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=253*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=254*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=255*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=256*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=257*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=258*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=259*/ xed3_capture_chain_ntluf_REG0_GPRv_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=260*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=261*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=262*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=263*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=264*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=265*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* SRM    imm       000 (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=266*/ xed3_capture_nt_nop_ntluf,
/* SRM    imm       000 (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=267*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=268*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=269*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=270*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=271*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=272*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=273*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=274*/ xed3_capture_chain_ntluf_REG0_GPRv_B_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=275*/ xed3_capture_chain_ntluf_REG0_GPRv_B_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=276*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=277*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=278*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=279*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=280*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=281*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=282*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=283*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=284*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=285*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=286*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=287*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=288*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=289*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=290*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=291*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=292*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=293*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=294*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=295*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=296*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=297*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=298*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=299*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=300*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=301*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=302*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=303*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=304*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=305*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=306*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=307*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=308*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=309*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=310*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=311*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=312*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_SB INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=313*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_REG1_rFLAGS,
/* MEM0   imm_const [1] r SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] r SUPPRESSED q i64
 BASE1  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=314*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=315*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=316*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=317*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_XMM0_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=318*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_XMM0_REG3_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=319*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=320*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* MEM0   imm_const [1] r SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] r SUPPRESSED w i16
 BASE1  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=321*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=322*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=323*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=324*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=325*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=326*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=327*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=328*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=329*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=330*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=331*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=332*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] r SUPPRESSED b u8
 BASE1  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=333*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_rFLAGS,
/* REG0   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_XCR0] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=334*/ xed3_capture_chain_ntluf_REG0_XED_REG_ECX_REG1_XED_REG_EDX_REG2_XED_REG_EAX_REG3_XED_REG_XCR0,
/* MEM0   imm_const [1] r SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] r SUPPRESSED d i32
 BASE1  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=335*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=336*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=337*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT mfpxenv struct
 REG0   reg       [XED_REG_X87CONTROL] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=338*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=339*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=340*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=341*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=342*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MEM0   imm_const [1] w SUPPRESSED dq i32
 BASE0  nt_lookup_fn r SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=343*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_MEM0_const1_BASE0_ArDI_SEG0_FINAL_DSEG,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=344*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=345*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=346*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=347*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=348*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=349*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT GPR32_R d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=350*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR32_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 MEM0   imm_const [1] r EXPLICIT xuq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=351*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B xuq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=352*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=353*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=354*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=355*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=356*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=357*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=358*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=359*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=360*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=361*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=362*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=363*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=364*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=365*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=366*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT p2 struct
 REG1   reg       [XED_REG_FS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=367*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_XED_REG_FS,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=368*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT GPR64_R q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=369*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR64_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 MEM0   imm_const [1] r EXPLICIT xud u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=370*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B xud u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=371*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=372*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=373*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=374*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* IMM0   imm_const [1] r EXPLICIT b u8
 REG0   reg       [XED_REG_AL] r IMPLICIT INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=375*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_AL_REG1_rFLAGS,
/* IMM0   imm_const [1] r EXPLICIT b u8
 REG0   nt_lookup_fn r IMPLICIT OeAX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=376*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_OeAX_REG1_rFLAGS,
/* REG0   reg       [XED_REG_DX] r IMPLICIT INVALID
 REG1   reg       [XED_REG_AL] r IMPLICIT INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=377*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_REG1_XED_REG_AL_REG2_rFLAGS,
/* REG0   reg       [XED_REG_DX] r IMPLICIT INVALID
 REG1   nt_lookup_fn r IMPLICIT OeAX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=378*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_REG1_OeAX_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=379*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* MEM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_TR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=380*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_TR,
/* REG0   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 REG1   reg       [XED_REG_TR] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=381*/ xed3_capture_chain_ntluf_REG0_GPR16_B_REG1_XED_REG_TR,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=382*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=383*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 REG3   reg       [XED_REG_TSC] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_TSCAUX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=384*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EDX_REG2_XED_REG_ECX_REG3_XED_REG_TSC_REG4_XED_REG_TSCAUX,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=385*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=386*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=387*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=388*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=389*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] w SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=390*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] r EXPLICIT p2 struct
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw2 int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM1   imm_const [1] w SUPPRESSED spw2 int
 BASE1  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_SSEG1 INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=391*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_STACKPUSH_REG1_rIP_MEM1_const1_BASE1_SrSP_SEG1_FINAL_SSEG1,
/* PTR    imm_const [1] r EXPLICIT p struct
 IMM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw2 int
 REG1   reg       [XED_REG_EIP] w SUPPRESSED INVALID
 MEM0   imm_const [1] w SUPPRESSED spw2 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=392*/ xed3_capture_chain_ntluf_PTR_const1_IMM0_const1_REG0_XED_REG_STACKPUSH_REG1_XED_REG_EIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=393*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=394*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=395*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=396*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=397*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=398*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] r SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87POP2] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=399*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87POP2_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=400*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=401*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=402*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=403*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=404*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=405*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=406*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=407*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=408*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=409*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=410*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=411*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=412*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=413*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=414*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=415*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=416*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=417*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=418*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=419*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=420*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=421*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=422*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=423*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=424*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=425*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=426*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   reg       [XED_REG_SSP] r SUPPRESSED u64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=427*/ xed3_capture_chain_ntluf_REG0_XED_REG_SSP,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=428*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=429*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=430*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=431*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=432*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_B d u32
 REG1   reg       [XED_REG_EDX] r SUPPRESSED d u32
 REG2   reg       [XED_REG_EAX] r SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=433*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XED_REG_EDX_REG2_XED_REG_EAX_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_B q u64
 REG1   reg       [XED_REG_EDX] r SUPPRESSED d u32
 REG2   reg       [XED_REG_EAX] r SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=434*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XED_REG_EDX_REG2_XED_REG_EAX_REG3_rFLAGS,
/* REG0   reg       [XED_REG_RAX] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=435*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=436*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=437*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=438*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=439*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_GPR32_B,
/* REG0   reg       [XED_REG_AX] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=440*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=441*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=442*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=443*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=444*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=445*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=446*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=447*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=448*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=449*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=450*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=451*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=452*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=453*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=454*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=455*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=456*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=457*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=458*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=459*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_RAX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID inum=460*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_REG1_XED_REG_EAX,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=461*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=462*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=463*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=464*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=465*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=466*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=467*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=468*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=469*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=470*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=471*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=472*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=473*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* MEM0   imm_const [1] w SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=474*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_EAX_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=475*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=476*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=477*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=478*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=479*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=480*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=481*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=482*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=483*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=484*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=485*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=486*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=487*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=488*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=489*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=490*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=491*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=492*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=493*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=494*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=495*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=496*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=497*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=498*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=499*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=500*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=501*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=502*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=503*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=504*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=505*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=506*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_MXCSR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=507*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_MXCSR,
/* REG0   reg       [XED_REG_EIP] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_ESP] w SUPPRESSED INVALID
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=508*/ xed3_capture_chain_ntluf_REG0_XED_REG_EIP_REG1_XED_REG_ESP_REG2_rFLAGS,
/* REG0   reg       [XED_REG_RIP] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_RSP] w SUPPRESSED INVALID
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=509*/ xed3_capture_chain_ntluf_REG0_XED_REG_RIP_REG1_XED_REG_RSP_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 MEM0   imm_const [1] r EXPLICIT xud u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=510*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B xud u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=511*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=512*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT w i16
 REG0   reg       [XED_REG_TR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=513*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_TR,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_TR] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=514*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_TR,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=515*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=516*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=517*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=518*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_RAX] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=519*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_RAX] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=520*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn w SUPPRESSED rIP INVALID
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=521*/ xed3_capture_chain_ntluf_REG0_rIP_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=522*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=523*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=524*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=525*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=526*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=527*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_AL_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AX] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=528*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AX] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=529*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_MSRS] r SUPPRESSED INVALID inum=530*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EDX_REG2_XED_REG_ECX_REG3_XED_REG_MSRS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=531*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=532*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=533*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=534*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rw EXPLICIT q u64
 REG0   reg       [XED_REG_SSP] w SUPPRESSED u64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=535*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_SSP,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_B q u8
 REG1   reg       [XED_REG_SSP] rw SUPPRESSED u64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=536*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XED_REG_SSP,
/* REG0   reg       [XED_REG_AL] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=537*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=538*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EAX] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=539*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EAX] cw SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=540*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=541*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=542*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=543*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=544*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rw EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=545*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR64_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR64_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=546*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_GPR64_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=547*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR32_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=548*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_GPR32_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=549*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=550*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=551*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=552*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=553*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED d i32
 MEM0   imm_const [1] r SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=554*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=555*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=556*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=557*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=558*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=559*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64int i64
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=560*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=561*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=562*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=563*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=564*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_RIP] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_R11] w SUPPRESSED INVALID
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=565*/ xed3_capture_chain_ntluf_REG0_XED_REG_RIP_REG1_XED_REG_RCX_REG2_XED_REG_R11_REG3_rFLAGS,
/* REG0   reg       [XED_REG_EAX] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=566*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_ECX,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=567*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=568*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=569*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=570*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=571*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=572*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] rw SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=573*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=574*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=575*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=576*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=577*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=578*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=579*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=580*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=581*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=582*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=583*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=584*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=585*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=586*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=587*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=588*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=589*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=590*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=591*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=592*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=593*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=594*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=595*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=596*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw8 int
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_EBX] r SUPPRESSED INVALID
 REG5   reg       [XED_REG_ESP] r SUPPRESSED INVALID
 REG6   reg       [XED_REG_EBP] r SUPPRESSED INVALID
 REG7   reg       [XED_REG_ESI] r SUPPRESSED INVALID
 REG8   reg       [XED_REG_EDI] r SUPPRESSED INVALID
 MEM0   imm_const [1] w SUPPRESSED spw8 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=597*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPUSH_REG1_XED_REG_EAX_REG2_XED_REG_ECX_REG3_XED_REG_EDX_REG4_XED_REG_EBX_REG5_XED_REG_ESP_REG6_XED_REG_EBP_REG7_XED_REG_ESI_REG8_XED_REG_EDI_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=598*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=599*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=600*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=601*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=602*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=603*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=604*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=605*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=606*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] cr SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED q i64
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=607*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=608*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=609*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT b u8
 REG0   reg       [XED_REG_AX] rw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=610*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_AX_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_AX] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=611*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_AX_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrDX INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=612*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_OrAX_REG1_OrDX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG2   nt_lookup_fn rw SUPPRESSED OrDX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=613*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_OrAX_REG2_OrDX_REG3_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=614*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=615*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=616*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=617*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=618*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=619*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=620*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=621*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED d i32
 MEM0   imm_const [1] w SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=622*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG1_rFLAGS,
/* MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED b u8
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=623*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED d i32
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=624*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=625*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=626*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=627*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=628*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=629*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=630*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=631*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=632*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=633*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=634*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 MEM0   imm_const [1] r EXPLICIT d u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=635*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 REG1   nt_lookup_fn r EXPLICIT MMX_B d u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=636*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=637*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=638*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=639*/ xed3_capture_chain_ntluf_REG0_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q u64
 REG1   reg       [XED_REG_SSP] r SUPPRESSED u64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=640*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XED_REG_SSP,
/* MEM0   imm_const [1] w EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=641*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=642*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=643*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=644*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=645*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=646*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=647*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=648*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_GPR64_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=649*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=650*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=651*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=652*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=653*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 MEM0   imm_const [1] r EXPLICIT xuq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=654*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B xuq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=655*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=656*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=657*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] w SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=658*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=659*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=660*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=661*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=662*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=663*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=664*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=665*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=666*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=667*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=668*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=669*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=670*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=671*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=672*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=673*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=674*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=675*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=676*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=677*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=678*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=679*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=680*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=681*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=682*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rcw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=683*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_IMM0_const1_REG2_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=684*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_XED_REG_CL_REG2_rFLAGS,
/* REG0   nt_lookup_fn rcw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG2   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=685*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_XED_REG_CL_REG3_rFLAGS,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=686*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=687*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=688*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=689*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_EAX] rcw SUPPRESSED INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=690*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=691*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=692*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* MEM0   imm_const [1] w SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] r SUPPRESSED d i32
 BASE1  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=693*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_rFLAGS,
/* MEM0   imm_const [1] w SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] r SUPPRESSED b u8
 BASE1  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=694*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=695*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=696*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=697*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=698*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=699*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=700*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=701*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=702*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=703*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=704*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPR8_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=705*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=706*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPR16_B,
/* MEM0   imm_const [1] w SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] r SUPPRESSED w i16
 BASE1  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=707*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=708*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=709*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=710*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=711*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=712*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=713*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=714*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=715*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=716*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=717*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=718*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=719*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=720*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=721*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=722*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=723*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=724*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=725*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=726*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=727*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=728*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=729*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=730*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=731*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=732*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=733*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=734*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=735*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT ss f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=736*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_R ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=737*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* MEM0   imm_const [1] w SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] r SUPPRESSED q i64
 BASE1  nt_lookup_fn rw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=738*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT CR_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=739*/ xed3_capture_chain_ntluf_REG0_CR_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT CR_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=740*/ xed3_capture_chain_ntluf_REG0_CR_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT CR_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=741*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_CR_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B INVALID
 REG1   nt_lookup_fn r EXPLICIT CR_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=742*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_CR_R,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=743*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=744*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=745*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=746*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=747*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=748*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=749*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=750*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=751*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=752*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=753*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=754*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=755*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=756*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=757*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=758*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=759*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=760*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=761*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT s64 struct
 REG0   reg       [XED_REG_GDTR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=762*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_GDTR,
/* MEM0   imm_const [1] w EXPLICIT s struct
 REG0   reg       [XED_REG_GDTR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=763*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_GDTR,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=764*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=765*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=766*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=767*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] r SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=768*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=769*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=770*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=771*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=772*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=773*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=774*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID inum=775*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=776*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=777*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=778*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=779*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=780*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=781*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=782*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=783*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=784*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=785*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=786*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=787*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED q i64
 MEM0   imm_const [1] w SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=788*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG1_rFLAGS,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw5 int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM0   imm_const [1] r SUPPRESSED spw5 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=789*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG2_rFLAGS,
/* inum=790*/ xed3_capture_nt_nop_ntluf,
/* inum=791*/ xed3_capture_nt_nop_ntluf,
/* MEM0   imm_const [1] cw SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED q i64
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=792*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED q i64
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=793*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=794*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=795*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=796*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=797*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=798*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* MEM0   imm_const [1] rw EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=799*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* MEM0   imm_const [1] r EXPLICIT b u8
 REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_AX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=800*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_AL_REG1_XED_REG_AX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_AX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=801*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_AL_REG2_XED_REG_AX_REG3_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG1   nt_lookup_fn w SUPPRESSED OrDX INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=802*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_OrAX_REG1_OrDX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG2   nt_lookup_fn w SUPPRESSED OrDX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=803*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_OrAX_REG2_OrDX_REG3_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=804*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=805*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=806*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=807*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=808*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=809*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=810*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=811*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_X87TAG] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=812*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_X87TAG,
/* REG0   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_X87TAG] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=813*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_X87TAG_REG2_XED_REG_X87POP,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=814*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=815*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=816*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=817*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=818*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=819*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] r SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=820*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM1   imm_const [1] w SUPPRESSED spw int
 BASE1  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_SSEG1 INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=821*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_STACKPUSH_MEM1_const1_BASE1_SrSP_SEG1_FINAL_SSEG1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=822*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_ES] r IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=823*/ xed3_capture_chain_ntluf_REG0_XED_REG_ES_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_CS] r IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=824*/ xed3_capture_chain_ntluf_REG0_XED_REG_CS_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_SS] r IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=825*/ xed3_capture_chain_ntluf_REG0_XED_REG_SS_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_DS] r IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=826*/ xed3_capture_chain_ntluf_REG0_XED_REG_DS_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_SB INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=827*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* IMM0   imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=828*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* IMM0   imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=829*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_FS] r IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=830*/ xed3_capture_chain_ntluf_REG0_XED_REG_FS_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_GS] r IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=831*/ xed3_capture_chain_ntluf_REG0_XED_REG_GS_REG1_XED_REG_STACKPUSH_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=832*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=833*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=834*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=835*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=836*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=837*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=838*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=839*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=840*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=841*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=842*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=843*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=844*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=845*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=846*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=847*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=848*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=849*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 AGEN   imm_const [1] r EXPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=850*/ xed3_capture_chain_ntluf_REG0_BND_R_AGEN_const1,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=851*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn r EXPLICIT BND_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=852*/ xed3_capture_chain_ntluf_REG0_BND_R_REG1_GPR32_B,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=853*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=854*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=855*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=856*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=857*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=858*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mem32real f32
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=859*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem80real f80
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=860*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT m64real f64
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=861*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=862*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=863*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=864*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=865*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=866*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=867*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_rFLAGS,
/* REG0   reg       [XED_REG_X87CONTROL] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_X87TAG] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=868*/ xed3_capture_chain_ntluf_REG0_XED_REG_X87CONTROL_REG1_XED_REG_X87TAG_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=869*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=870*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u64
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=871*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=872*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=873*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=874*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 MEM0   imm_const [1] r EXPLICIT xud u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=875*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B xud u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=876*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=877*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=878*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=879*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=880*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=881*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=882*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=883*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=884*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_LDTR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=885*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_LDTR,
/* REG0   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 REG1   reg       [XED_REG_LDTR] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=886*/ xed3_capture_chain_ntluf_REG0_GPR16_B_REG1_XED_REG_LDTR,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=887*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=888*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=889*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=890*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EAX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_EBX] r SUPPRESSED INVALID inum=891*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EBX,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=892*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=893*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=894*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=895*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_RBX] crw SUPPRESSED INVALID
 REG2   reg       [XED_REG_RCX] crw SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] crw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=896*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_RBX_REG2_XED_REG_RCX_REG3_XED_REG_RDX,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_CX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_IP] rw SUPPRESSED INVALID inum=897*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_CX_REG1_XED_REG_IP,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_RBX] crw SUPPRESSED INVALID
 REG2   reg       [XED_REG_RCX] crw SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] crw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=898*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_RBX_REG2_XED_REG_RCX_REG3_XED_REG_RDX,
/* IMM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=899*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_STACKPOP_REG1_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=900*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED d u32
 REG1   reg       [XED_REG_RBX] crw SUPPRESSED q u64
 REG2   reg       [XED_REG_RCX] crw SUPPRESSED q u64
 REG3   reg       [XED_REG_RDX] crw SUPPRESSED q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=901*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_RBX_REG2_XED_REG_RCX_REG3_XED_REG_RDX,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=902*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=903*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=904*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=905*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=906*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=907*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=908*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=909*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=910*/ xed3_capture_chain_ntluf_REG0_OrAX,
/* IMM0   imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_AL] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_AH] rw SUPPRESSED INVALID
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=911*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_AL_REG1_XED_REG_AH_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=912*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=913*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_AL] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_AH] rw SUPPRESSED INVALID
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=914*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_REG1_XED_REG_AH_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=915*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=916*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* IMM0   imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_AL] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_AH] w SUPPRESSED INVALID
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=917*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_AL_REG1_XED_REG_AH_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=918*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=919*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG3   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=920*/ xed3_capture_chain_ntluf_REG0_XED_REG_ECX_REG1_XED_REG_EDX_REG2_XED_REG_EAX_REG3_XED_REG_XCR0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=921*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=922*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q f32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=923*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=924*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=925*/ xed3_capture_nt_nop_ntluf,
/* REG0   reg       [XED_REG_AL] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_AH] rw SUPPRESSED INVALID
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=926*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_REG1_XED_REG_AH_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 MEM0   imm_const [1] r EXPLICIT q u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=927*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=928*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=929*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=930*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=931*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=932*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=933*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=934*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=935*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=936*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=937*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=938*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=939*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=940*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=941*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT q u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=942*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=943*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=944*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=945*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=946*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=947*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=948*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=949*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=950*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=951*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=952*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=953*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=954*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=955*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=956*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   nt_lookup_fn rw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=957*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_ArCX_REG1_rIP_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=958*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=959*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=960*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w SUPPRESSED rIP INVALID inum=961*/ xed3_capture_chain_ntluf_REG0_rIP,
/* REG0   nt_lookup_fn w SUPPRESSED rIP INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=962*/ xed3_capture_chain_ntluf_REG0_rIP_REG1_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 REG1   reg       [XED_REG_AL] rcw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=963*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_XED_REG_AL_REG2_rFLAGS,
/* REG0   nt_lookup_fn rcw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 REG2   reg       [XED_REG_AL] rcw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=964*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_XED_REG_AL_REG3_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED OrAX INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=965*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_OrAX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rcw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED OrAX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=966*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_OrAX_REG3_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=967*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=968*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=969*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=970*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=971*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=972*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=973*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=974*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=975*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_EAX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=976*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_EAX_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=977*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=978*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u32
 REG1   reg       [XED_REG_SSP] r SUPPRESSED u64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=979*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XED_REG_SSP,
/* MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=980*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=981*/ xed3_capture_chain_ntluf_REG0_GPR16_B_REG1_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=982*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_AL_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=983*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_AL_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EIP] w SUPPRESSED INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=984*/ xed3_capture_chain_ntluf_REG0_XED_REG_EIP_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=985*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=986*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=987*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] cw SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=988*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_AX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=989*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_AX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=990*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_RAX_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=991*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_RAX_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=992*/ xed3_capture_chain_ntluf_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_ECX,
/* REG0   reg       [XED_REG_DX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_AX] r SUPPRESSED INVALID inum=993*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_REG1_XED_REG_AX,
/* MEM0   imm_const [1] w EXPLICIT mem16 struct
 REG0   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=994*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_AX] w IMPLICIT INVALID
 REG1   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=995*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_REG1_XED_REG_X87STATUS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=996*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=997*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=998*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=999*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1000*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1001*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1002*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1003*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1004*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1005*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1006*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1007*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1008*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1009*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1010*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1011*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1012*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1013*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1014*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1015*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1016*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1017*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1018*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1019*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1020*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1021*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1022*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1023*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1024*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1025*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1026*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1027*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1028*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] r IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1029*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1030*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT p2 struct
 REG1   reg       [XED_REG_GS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1031*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_XED_REG_GS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1032*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1033*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1034*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1035*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1036*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1037*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1038*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1039*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1040*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1041*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1042*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1043*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1044*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1045*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1046*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1047*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1048*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1049*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1050*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1051*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1052*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1053*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1054*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1055*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1056*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT A_GPR_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1057*/ xed3_capture_chain_ntluf_REG0_A_GPR_B,
/* REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1058*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1059*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1060*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1061*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1062*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1063*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1064*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1065*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1066*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1067*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1068*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1069*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1070*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1071*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1072*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1073*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1074*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1075*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1076*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1077*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1078*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1079*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_MSRS] r SUPPRESSED INVALID inum=1080*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EDX_REG2_XED_REG_ECX_REG3_XED_REG_MSRS,
/* MEM0   imm_const [1] rcw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 REG1   reg       [XED_REG_AL] rcw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1081*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_XED_REG_AL_REG2_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED OrAX INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1082*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_OrAX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1083*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1084*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_GPR64_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1085*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1086*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_GPR32_B_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1087*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1088*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1089*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1090*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1091*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1092*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1093*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* inum=1094*/ xed3_capture_nt_nop_ntluf,
/* IMM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw2 int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM0   imm_const [1] r SUPPRESSED spw2 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1095*/ xed3_capture_chain_ntluf_IMM0_const1_REG0_XED_REG_STACKPOP_REG1_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw2 int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM0   imm_const [1] r SUPPRESSED spw2 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1096*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1097*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_EAX_REG2_XED_REG_EDX_REG3_XED_REG_ECX_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1098*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_EAX_REG3_XED_REG_EDX_REG4_XED_REG_ECX_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1099*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_RAX_REG2_XED_REG_RDX_REG3_XED_REG_RCX_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1100*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_RAX_REG3_XED_REG_RDX_REG4_XED_REG_RCX_REG5_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1101*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1102*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1103*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1104*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1105*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1106*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1107*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1108*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1109*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_EAX_REG2_XED_REG_EDX_REG3_XED_REG_XMM0_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1110*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_EAX_REG3_XED_REG_EDX_REG4_XED_REG_XMM0_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1111*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_RAX_REG2_XED_REG_RDX_REG3_XED_REG_XMM0_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1112*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_RAX_REG3_XED_REG_RDX_REG4_XED_REG_XMM0_REG5_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1113*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 REG1   nt_lookup_fn r EXPLICIT MMX_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1114*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1115*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1116*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1117*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1118*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT mfpxenv struct
 REG0   reg       [XED_REG_X87CONTROL] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1119*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EIP] rw SUPPRESSED INVALID inum=1120*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_ECX_REG1_XED_REG_EIP,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_RIP] rw SUPPRESSED INVALID inum=1121*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_ECX_REG1_XED_REG_RIP,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1122*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1123*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* IMM0   imm_const [1] r EXPLICIT w i16
 IMM1   imm_const [1] r EXPLICIT b u8
 REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw int
 REG1   nt_lookup_fn rw SUPPRESSED OrBP INVALID
 MEM0   imm_const [1] w SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1124*/ xed3_capture_chain_ntluf_IMM0_const1_IMM1_const1_REG0_XED_REG_STACKPUSH_REG1_OrBP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  25, 26
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  28, 29, 30
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  31, 32, 33 inum=1125*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  25, 26
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  28, 29, 30
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  31, 32, 33 inum=1126*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT bnd32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1127*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT bnd64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1128*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT bnd64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1129*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 MEM0   imm_const [1] r EXPLICIT bnd64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1130*/ xed3_capture_chain_ntluf_REG0_BND_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1131*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1132*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1133*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1134*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1135*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1136*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1137*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mfpxenv struct
 REG0   reg       [XED_REG_X87CONTROL] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1138*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL,
/* MEM0   imm_const [1] w EXPLICIT mem32int i32
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1139*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT m64int i64
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1140*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem16int i16
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1141*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1142*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1143*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1144*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1145*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1146*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1147*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1148*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1149*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1150*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1151*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1152*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1153*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1154*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1155*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1156*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED q i64
 MEM0   imm_const [1] r SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1157*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG1_rFLAGS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1158*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* MEM0   imm_const [1] r SUPPRESSED v int
 BASE0  nt_lookup_fn r SUPPRESSED ArBP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG0   nt_lookup_fn rw SUPPRESSED OrBP INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrSP INVALID inum=1159*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArBP_SEG0_FINAL_SSEG0_REG0_OrBP_REG1_OrSP,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1160*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1161*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1162*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1163*/ xed3_capture_chain_ntluf_REG0_XED_REG_AX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1164*/ xed3_capture_chain_ntluf_REG0_XED_REG_RAX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1165*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_ECX_REG2_XED_REG_EDX,
/* MEM0   imm_const [1] r EXPLICIT s64 struct
 REG0   reg       [XED_REG_IDTR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1166*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_IDTR,
/* MEM0   imm_const [1] r EXPLICIT s struct
 REG0   reg       [XED_REG_IDTR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1167*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_IDTR,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1168*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT q u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1169*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1170*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1171*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1172*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] r SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1173*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1174*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1175*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1176*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1177*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1178*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1179*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1180*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1181*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1182*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1183*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 MEM0   imm_const [1] r EXPLICIT xuq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1184*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B xuq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1185*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRz_R INVALID
 MEM0   imm_const [1] r EXPLICIT p struct
 REG1   reg       [XED_REG_DS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1186*/ xed3_capture_chain_ntluf_REG0_GPRz_R_MEM0_const1_REG1_XED_REG_DS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1187*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1188*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1189*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1190*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1191*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1192*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1193*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1194*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1195*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1196*/ xed3_capture_chain_ntluf_REG0_XED_REG_DX_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_REG1_ArCX_REG2_rFLAGS,
/* MEM0   imm_const [1] r SUPPRESSED b u8
 BASE0  nt_lookup_fn r SUPPRESSED ArBX INVALID
 INDEX  reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG0   reg       [XED_REG_AL] w SUPPRESSED INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 SCALE  imm_const [0x1] r SUPPRESSED INVALID inum=1197*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArBX_INDEX_XED_REG_AL_REG0_XED_REG_AL_SEG0_FINAL_DSEG_SCALE_const0x1,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1198*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1199*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1200*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1201*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1202*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1203*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_SB INVALID
 REG1   nt_lookup_fn rw IMPLICIT OrAX INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=1204*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_REG1_OrAX,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_SB INVALID
 REG1   nt_lookup_fn rw IMPLICIT OrAX INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=1205*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_REG1_OrAX,
/* REG0   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       111 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1206*/ xed3_capture_chain_ntluf_REG0_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1207*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1208*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR64_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1209*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1210*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1211*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1212*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1213*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1214*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1215*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT GPR64_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1216*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_GPR64_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT MMX_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1217*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MMX_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B INVALID
 REG1   nt_lookup_fn r EXPLICIT MMX_R q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1218*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_MMX_R,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1219*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1220*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT MMX_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1221*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MMX_R,
/* REG0   nt_lookup_fn w EXPLICIT MMX_B q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_R q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1222*/ xed3_capture_chain_ntluf_REG0_MMX_B_REG1_MMX_R,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1223*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1224*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1225*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1226*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT w i16
 REG0   reg       [XED_REG_CR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1227*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CR0,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CR0] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1228*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CR0,
/* MEM0   imm_const [1] r EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1229*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1230*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1231*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1232*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1233*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1234*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1235*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1236*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1237*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1238*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1239*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1240*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1241*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1242*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1243*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1244*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1245*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1246*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1247*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1248*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1249*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1250*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1251*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1252*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1253*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1254*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1255*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1256*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1257*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT mem14 struct
 REG0   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1258*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87STATUS,
/* MEM0   imm_const [1] r EXPLICIT mem28 struct
 REG0   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1259*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1260*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1261*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1262*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1263*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1264*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R,
/* MEM0   imm_const [1] w EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1265*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R,
/* MEM0   imm_const [1] w EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1266*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1267*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1268*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1269*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1270*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1271*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B,
/* MEM0   imm_const [1] w EXPLICIT w i16
 REG0   nt_lookup_fn r EXPLICIT SEG INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1272*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_SEG,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT SEG INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1273*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_SEG,
/* REG0   nt_lookup_fn w EXPLICIT SEG_MOV INVALID
 MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1274*/ xed3_capture_chain_ntluf_REG0_SEG_MOV_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT SEG_MOV INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1275*/ xed3_capture_chain_ntluf_REG0_SEG_MOV_REG1_GPR16_B,
/* REG0   reg       [XED_REG_AL] w IMPLICIT INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID inum=1276*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_MEM0_const1_SEG0_FINAL_DSEG,
/* REG0   nt_lookup_fn w IMPLICIT OrAX INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID inum=1277*/ xed3_capture_chain_ntluf_REG0_OrAX_MEM0_const1_SEG0_FINAL_DSEG,
/* MEM0   imm_const [1] w EXPLICIT b u8
 REG0   reg       [XED_REG_AL] r IMPLICIT INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID inum=1278*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_AL_SEG0_FINAL_DSEG,
/* MEM0   imm_const [1] w EXPLICIT v int
 REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID inum=1279*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_OrAX_SEG0_FINAL_DSEG,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_SB INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=1280*/ xed3_capture_chain_ntluf_REG0_GPR8_SB_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_SB INVALID
 IMM0   imm_const [1] r EXPLICIT v int
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=1281*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1282*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1283*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1284*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1285*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1286*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP_REG1_rFLAGS,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1287*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1288*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX,
/* REG0   nt_lookup_fn r EXPLICIT GPRy_B INVALID
 REG1   reg       [XED_REG_FSBASE] w SUPPRESSED y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1289*/ xed3_capture_chain_ntluf_REG0_GPRy_B_REG1_XED_REG_FSBASE,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1290*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1291*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q u16
 MEM0   imm_const [1] r EXPLICIT q u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1292*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q u16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1293*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B_IMM0_const1,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1294*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT BND_R INVALID
 AGEN   imm_const [1] r EXPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1295*/ xed3_capture_chain_ntluf_REG0_BND_R_AGEN_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1296*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1297*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] r SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] rw SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1298*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT d i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1299*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1300*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT mem32real f32
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1301*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT m64real f64
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1302*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1303*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem32int i32
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1304*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem16int i16
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1305*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT w i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1306*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B w i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1307*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1308*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1309*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1310*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1311*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1312*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1313*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1314*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1315*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1316*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1317*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1318*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1319*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1320*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem80dec b80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1321*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_EAX] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_EBX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] crw SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] w SUPPRESSED INVALID inum=1322*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EBX_REG2_XED_REG_ECX_REG3_XED_REG_EDX,
/* REG0   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_TSC] r SUPPRESSED INVALID inum=1323*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EDX_REG2_XED_REG_TSC,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1324*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1325*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R v int
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1326*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R v int
 REG1   nt_lookup_fn r EXPLICIT GPRv_B v int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1327*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1328*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1329*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 MEM0   imm_const [1] r EXPLICIT xuq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1330*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xuq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B xuq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1331*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1332*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1333*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32int i32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1334*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem16int i16
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1335*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw5 int
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MEM0   imm_const [1] r SUPPRESSED spw5 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1336*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_rIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1337*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1338*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1339*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1340*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1341*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1342*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1343*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1344*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1345*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn r EXPLICIT GPRy_B INVALID
 REG1   reg       [XED_REG_GSBASE] w SUPPRESSED y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1346*/ xed3_capture_chain_ntluf_REG0_GPRy_B_REG1_XED_REG_GSBASE,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1347*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1348*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1349*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1350*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1351*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1352*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1353*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1354*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1355*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1356*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1357*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1358*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1359*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1360*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1361*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn r EXPLICIT A_GPR_R INVALID
 MEM0   imm_const [1] r EXPLICIT zd u32
 MEM1   imm_const [1] w SUPPRESSED zd i32
 BASE1  nt_lookup_fn r SUPPRESSED A_GPR_R INVALID
 SEG1   reg       [XED_REG_ES] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1362*/ xed3_capture_chain_ntluf_REG0_A_GPR_R_MEM0_const1_MEM1_const1_BASE1_A_GPR_R_SEG1_XED_REG_ES,
/* REG0   nt_lookup_fn r EXPLICIT A_GPR_R INVALID
 MEM0   imm_const [1] r EXPLICIT zd u32
 MEM1   imm_const [1] w SUPPRESSED zd i32
 BASE1  nt_lookup_fn r SUPPRESSED A_GPR_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1363*/ xed3_capture_chain_ntluf_REG0_A_GPR_R_MEM0_const1_MEM1_const1_BASE1_A_GPR_R,
/* MEM0   imm_const [1] w EXPLICIT s struct
 REG0   reg       [XED_REG_IDTR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1364*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_IDTR,
/* MEM0   imm_const [1] w EXPLICIT s64 struct
 REG0   reg       [XED_REG_IDTR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1365*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_IDTR,
/* REG0   reg       [XED_REG_EIP] w SUPPRESSED INVALID
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1366*/ xed3_capture_chain_ntluf_REG0_XED_REG_EIP_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT GPR32_R d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1367*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR32_R,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT GPR64_R q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1368*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR64_R,
/* MEM0   imm_const [1] rw EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1369*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1370*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1371*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID inum=1372*/ xed3_capture_chain_ntluf_REG0_XED_REG_EDX_REG1_XED_REG_EAX,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1373*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1374*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1375*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1376*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1377*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1378*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1379*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1380*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1381*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1382*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1383*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1384*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRy_R y int
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  25, 26
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  28, 29, 30
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  31, 32, 33 inum=1385*/ xed3_capture_chain_ntluf_REG0_GPRy_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT GPRy_R y int
 REG1   nt_lookup_fn r EXPLICIT GPR8_B b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  25, 26
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  28, 29, 30
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  31, 32, 33 inum=1386*/ xed3_capture_chain_ntluf_REG0_GPRy_R_REG1_GPR8_B,
/* REG0   nt_lookup_fn rw EXPLICIT GPRy_R y int
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  25, 26
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  28, 29, 30
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  31, 32, 33 inum=1387*/ xed3_capture_chain_ntluf_REG0_GPRy_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT GPRy_R y int
 REG1   nt_lookup_fn r EXPLICIT GPRv_B v int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  25, 26
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  28, 29, 30
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  31, 32, 33 inum=1388*/ xed3_capture_chain_ntluf_REG0_GPRy_R_REG1_GPRv_B,
/* MEM0   imm_const [1] w SUPPRESSED b u8
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1389*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRy_B INVALID
 REG1   reg       [XED_REG_FSBASE] r SUPPRESSED y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1390*/ xed3_capture_chain_ntluf_REG0_GPRy_B_REG1_XED_REG_FSBASE,
/* MEM0   imm_const [1] w SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1391*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_rFLAGS,
/* MEM0   imm_const [1] w SUPPRESSED d i32
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1392*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1393*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* MEM0   imm_const [1] r EXPLICIT b u8
 REG0   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_AX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1394*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_AL_REG1_XED_REG_AX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_AL] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_AX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1395*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_AL_REG2_XED_REG_AX_REG3_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG1   nt_lookup_fn w SUPPRESSED OrDX INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1396*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_OrAX_REG1_OrDX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG2   nt_lookup_fn w SUPPRESSED OrDX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1397*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_OrAX_REG2_OrDX_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1398*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1399*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_IMM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1400*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1401*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_IMM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1402*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1403*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1404*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1405*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1406*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1407*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1408*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1409*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1410*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1411*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1412*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1413*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1414*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1415*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1416*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1417*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1418*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1419*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1420*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1421*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1422*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1423*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1424*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1425*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1426*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1427*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1428*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* MEM0   imm_const [1] w SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1429*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_DX_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1430*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1431*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT b u8
 REG0   reg       [XED_REG_AX] rw SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1432*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_AX_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_AX] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1433*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_AX_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrDX INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1434*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_OrAX_REG1_OrDX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn rw SUPPRESSED OrAX INVALID
 REG2   nt_lookup_fn rw SUPPRESSED OrDX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1435*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_OrAX_REG2_OrDX_REG3_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1436*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1437*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRy_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1438*/ xed3_capture_chain_ntluf_REG0_GPRy_B,
/* MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1439*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1440*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_STACKPUSH] w SUPPRESSED spw8 int
 REG1   reg       [XED_REG_AX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_CX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_DX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_BX] r SUPPRESSED INVALID
 REG5   reg       [XED_REG_SP] r SUPPRESSED INVALID
 REG6   reg       [XED_REG_BP] r SUPPRESSED INVALID
 REG7   reg       [XED_REG_SI] r SUPPRESSED INVALID
 REG8   reg       [XED_REG_DI] r SUPPRESSED INVALID
 MEM0   imm_const [1] w SUPPRESSED spw8 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1441*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPUSH_REG1_XED_REG_AX_REG2_XED_REG_CX_REG3_XED_REG_DX_REG4_XED_REG_BX_REG5_XED_REG_SP_REG6_XED_REG_BP_REG7_XED_REG_SI_REG8_XED_REG_DI_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1442*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* inum=1443*/ xed3_capture_nt_nop_ntluf,
/* MEM0   imm_const [1] w SUPPRESSED w i16
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_AX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1444*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_AX_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1445*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1446*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1447*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1448*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w SUPPRESSED q i64
 BASE0  nt_lookup_fn rw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 REG0   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1449*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_REG0_XED_REG_RAX_REG1_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT dq i32
 REG0   reg       [XED_REG_RDX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_RAX] rcw SUPPRESSED INVALID
 REG2   reg       [XED_REG_RCX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RBX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1450*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_RDX_REG1_XED_REG_RAX_REG2_XED_REG_RCX_REG3_XED_REG_RBX_REG4_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED d i32
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1451*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED d i32
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1452*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED b u8
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1453*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED b u8
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1454*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1455*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 IMM1   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  19, 20
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  25, 26, 27 inum=1456*/ xed3_capture_chain_ntluf_REG0_XMM_R_IMM0_const1_IMM1_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  19, 20
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  25, 26, 27 inum=1457*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1458*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1459*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] cw SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED w i16
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1460*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] cw SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_ESEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED w i16
 BASE1  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_DSEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1461*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArDI_SEG0_FINAL_ESEG_MEM1_const1_BASE1_ArSI_SEG1_FINAL_DSEG1_REG0_ArCX_REG1_rFLAGS,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw8 int
 REG1   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] w SUPPRESSED INVALID
 REG4   reg       [XED_REG_EBX] w SUPPRESSED INVALID
 REG5   reg       [XED_REG_EBP] w SUPPRESSED INVALID
 REG6   reg       [XED_REG_ESI] w SUPPRESSED INVALID
 REG7   reg       [XED_REG_EDI] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED spw8 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1462*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_XED_REG_EAX_REG2_XED_REG_ECX_REG3_XED_REG_EDX_REG4_XED_REG_EBX_REG5_XED_REG_EBP_REG6_XED_REG_ESI_REG7_XED_REG_EDI_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1463*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_AL] w IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1464*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w IMPLICIT OeAX INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1465*/ xed3_capture_chain_ntluf_REG0_OeAX_IMM0_const1_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] w IMPLICIT INVALID
 REG1   reg       [XED_REG_DX] r IMPLICIT INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1466*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_REG1_XED_REG_DX_REG2_rFLAGS,
/* REG0   nt_lookup_fn w IMPLICIT OeAX INVALID
 REG1   reg       [XED_REG_DX] r IMPLICIT INVALID
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1467*/ xed3_capture_chain_ntluf_REG0_OeAX_REG1_XED_REG_DX_REG2_rFLAGS,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1468*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT mem16 struct
 REG0   reg       [XED_REG_X87CONTROL] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1469*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1470*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1471*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   reg       [XED_REG_ST0] cw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1472*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1473*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1474*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1475*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1476*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1477*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1478*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1479*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1480*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1481*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1482*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1483*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1484*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1485*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1486*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1487*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1488*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1489*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1490*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1491*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1492*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1493*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1494*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1495*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1496*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1497*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1498*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1499*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT ps f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1500*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1501*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1502*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1503*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1504*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1505*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1506*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1507*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1508*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1509*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1510*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1511*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1512*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1513*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1514*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1515*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_GPR32_B,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT MMX_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1516*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MMX_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT MMX_R d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1517*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_MMX_R,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT MMX_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1518*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MMX_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT MMX_R d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1519*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_MMX_R,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1520*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1521*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1522*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1523*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1524*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1525*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1526*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1527*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1528*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1529*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT pd f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1530*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_R pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1531*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* MEM0   imm_const [1] r EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1532*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* MEM0   imm_const [1] w EXPLICIT v int
 REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM1   imm_const [1] r SUPPRESSED spw int
 BASE1  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_SSEG1 INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1533*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_STACKPOP_MEM1_const1_BASE1_SrSP_SEG1_FINAL_SSEG1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1534*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_ES] w IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1535*/ xed3_capture_chain_ntluf_REG0_XED_REG_ES_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_SS] w IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1536*/ xed3_capture_chain_ntluf_REG0_XED_REG_SS_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_DS] w IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1537*/ xed3_capture_chain_ntluf_REG0_XED_REG_DS_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_SB INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=1538*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_FS] w IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1539*/ xed3_capture_chain_ntluf_REG0_XED_REG_FS_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* REG0   reg       [XED_REG_GS] w IMPLICIT INVALID
 REG1   reg       [XED_REG_STACKPOP] r SUPPRESSED spw int
 MEM0   imm_const [1] r SUPPRESSED spw int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID inum=1540*/ xed3_capture_chain_ntluf_REG0_XED_REG_GS_REG1_XED_REG_STACKPOP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RCX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_RIP] rw SUPPRESSED INVALID inum=1541*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RCX_REG1_XED_REG_RIP,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1542*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1543*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rcw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1544*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rcw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1545*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_IMM0_const1_REG2_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1546*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_XED_REG_CL_REG2_rFLAGS,
/* REG0   nt_lookup_fn rcw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 REG2   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1547*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_XED_REG_CL_REG3_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1548*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1549*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1550*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1551*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1552*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1553*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_AH] r SUPPRESSED INVALID
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1554*/ xed3_capture_chain_ntluf_REG0_XED_REG_AH_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1555*/ xed3_capture_chain_ntluf_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1556*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1557*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1558*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1559*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1560*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1561*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1562*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1563*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1564*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1565*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1566*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1567*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1568*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1569*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1570*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1571*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1572*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG1   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1573*/ xed3_capture_chain_ntluf_REG0_X87_REG1_XED_REG_ST0_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1574*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1575*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* inum=1576*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1577*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1578*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1579*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1580*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1581*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1582*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1583*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1584*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_RDX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_RAX] r SUPPRESSED INVALID inum=1585*/ xed3_capture_chain_ntluf_REG0_XED_REG_RDX_REG1_XED_REG_RAX,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1586*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1587*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1588*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1589*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1590*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u32
 REG1   reg       [XED_REG_TSCAUX] r SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1591*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XED_REG_TSCAUX,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q u64
 REG1   reg       [XED_REG_TSCAUX] r SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1592*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XED_REG_TSCAUX,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1593*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1594*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q f32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1595*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1596*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1597*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1598*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1599*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1600*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1601*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1602*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1603*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1604*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1605*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34 inum=1606*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1607*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_ECX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1608*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_ECX_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1609*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_RCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1610*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_RCX_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1611*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1612*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT pd f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1613*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_R pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1614*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   nt_lookup_fn rw SUPPRESSED rIP INVALID
 REG1   reg       [XED_REG_EAX] cw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1615*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_rIP_REG1_XED_REG_EAX,
/* MEM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_CR0] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1616*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CR0,
/* REG0   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 REG1   reg       [XED_REG_CR0] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1617*/ xed3_capture_chain_ntluf_REG0_GPR16_B_REG1_XED_REG_CR0,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1618*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_R INVALID
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  26, 27
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  29, 30, 31
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1619*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] cr SUPPRESSED q i64
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED q i64
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1620*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 MEM0   imm_const [1] r EXPLICIT xud u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1621*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R xud u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B xud u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1622*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1623*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1624*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT ps f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1625*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1626*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1627*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1628*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* MEM0   imm_const [1] cr SUPPRESSED d i32
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED d i32
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1629*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36 inum=1630*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36 inum=1631*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1632*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1633*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1634*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1635*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1636*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1637*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1638*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1639*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1640*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1641*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1642*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1643*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1644*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1645*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1646*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1647*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1648*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1649*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1650*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1651*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1652*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1653*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1654*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1655*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] cr SUPPRESSED b u8
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED b u8
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1656*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT mfpxenv struct
 REG0   reg       [XED_REG_X87CONTROL] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1657*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL,
/* MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED w i16
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1658*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* inum=1659*/ xed3_capture_nt_nop_ntluf,
/* MEM0   imm_const [1] r EXPLICIT mem94 struct
 REG0   reg       [XED_REG_X87CONTROL] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1660*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL,
/* MEM0   imm_const [1] r EXPLICIT mem108 struct
 REG0   reg       [XED_REG_X87CONTROL] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1661*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1662*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1663*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPR8_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1664*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1665*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPR16_B,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1666*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* inum=1667*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_B d u32
 REG1   reg       [XED_REG_EDX] r SUPPRESSED d u32
 REG2   reg       [XED_REG_EAX] r SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1668*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XED_REG_EDX_REG2_XED_REG_EAX_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR64_B q u64
 REG1   reg       [XED_REG_EDX] r SUPPRESSED d u32
 REG2   reg       [XED_REG_EAX] r SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1669*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XED_REG_EDX_REG2_XED_REG_EAX_REG3_rFLAGS,
/* MEM0   imm_const [1] cr SUPPRESSED w i16
 BASE0  nt_lookup_fn rcw SUPPRESSED ArSI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MEM1   imm_const [1] cr SUPPRESSED w i16
 BASE1  nt_lookup_fn rcw SUPPRESSED ArDI INVALID
 SEG1   nt_lookup_fn r SUPPRESSED FINAL_ESEG1 INVALID
 REG0   nt_lookup_fn rcw SUPPRESSED ArCX INVALID
 REG1   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1670*/ xed3_capture_chain_ntluf_MEM0_const1_BASE0_ArSI_SEG0_FINAL_DSEG_MEM1_const1_BASE1_ArDI_SEG1_FINAL_ESEG1_REG0_ArCX_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 MEM0   imm_const [1] r EXPLICIT q u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1671*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1672*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1673*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1674*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1675*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1676*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] rw IMPLICIT f80 f80
 REG1   nt_lookup_fn rw EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1677*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1678*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1679*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1680*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1681*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem32real f32
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1682*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1683*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87PUSH_REG3_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT mem80real f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1684*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_ST0] w IMPLICIT f80 f80
 MEM0   imm_const [1] r EXPLICIT m64real f64
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1685*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_MEM0_const1_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1686*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1687*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT MMX_B q u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1688*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1689*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1690*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1691*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1692*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1693*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1694*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1695*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1696*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1697*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1698*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1699*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1700*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1701*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] r EXPLICIT w i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1702*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT GPR16_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1703*/ xed3_capture_chain_ntluf_REG0_GPR16_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1704*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1705*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1706*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1707*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1708*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS,
/* MEM0   imm_const [1] r EXPLICIT v int
 REG0   nt_lookup_fn w SUPPRESSED rIP INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1709*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rIP,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn w SUPPRESSED rIP INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1710*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_rIP,
/* RELBR  imm_const [1] r EXPLICIT z int
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID inum=1711*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP,
/* RELBR  imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID inum=1712*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_EIP] rw SUPPRESSED INVALID inum=1713*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_EIP,
/* RELBR  imm_const [1] r EXPLICIT b i8
 REG0   reg       [XED_REG_RIP] rw SUPPRESSED INVALID inum=1714*/ xed3_capture_chain_ntluf_RELBR_const1_REG0_XED_REG_RIP,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1715*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1716*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1717*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87STATUS_REG3_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1718*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1719*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1720*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1721*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1722*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1723*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1724*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1725*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1726*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1727*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1728*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1729*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1730*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1731*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1732*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1733*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1734*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r IMPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1735*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1736*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1737*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1738*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_CL_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   reg       [XED_REG_CL] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn cw SUPPRESSED rFLAGS INVALID inum=1739*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_XED_REG_CL_REG2_rFLAGS,
/* inum=1740*/ xed3_capture_nt_nop_ntluf,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   reg       [XED_REG_MXCSR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1741*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_MXCSR,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1742*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1743*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT mxsave struct
 REG0   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_XCR0] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1744*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_XCR0,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1745*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1746*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1747*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1748*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1749*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1750*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1751*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1752*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1753*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1754*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1755*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_rFLAGS,
/* REG0   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1756*/ xed3_capture_chain_ntluf_REG0_XED_REG_X87STATUS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1757*/ xed3_capture_nt_nop_ntluf,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT GPR64_R q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1758*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR64_R,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT a16 i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  10, 11
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  13, 14, 15
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  16, 17, 18 inum=1759*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT a32 i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  10, 11
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  13, 14, 15
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  16, 17, 18 inum=1760*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1761*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1762*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT GPR32_R d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1763*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR32_R,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1764*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1765*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w SUPPRESSED rIP INVALID
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1766*/ xed3_capture_chain_ntluf_REG0_rIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1767*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* REG0   reg       [XED_REG_RIP] w SUPPRESSED INVALID
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1768*/ xed3_capture_chain_ntluf_REG0_XED_REG_RIP_REG1_rFLAGS,
/* REG0   reg       [XED_REG_EIP] w SUPPRESSED INVALID
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1769*/ xed3_capture_chain_ntluf_REG0_XED_REG_EIP_REG1_rFLAGS,
/* inum=1770*/ xed3_capture_nt_nop_ntluf,
/* REG0   reg       [XED_REG_EAX] r IMPLICIT INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1771*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1772*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1773*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1774*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1775*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1776*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1777*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1778*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1779*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1780*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1781*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1782*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1783*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1784*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1785*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1786*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1787*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1788*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1789*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1790*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1791*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1792*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1793*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1794*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1795*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1796*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1797*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R pd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1798*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1799*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1800*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1801*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1802*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1803*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1804*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1805*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1806*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1807*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1808*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1809*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT mem80dec b80
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1810*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 MEM0   imm_const [1] r EXPLICIT w u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1811*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u16
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1812*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT w i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1813*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1814*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  29, 30
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  35, 36, 37 inum=1815*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  29, 30
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  35, 36, 37 inum=1816*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR64_B_IMM0_const1,
/* REG0   reg       [XED_REG_AL] w SUPPRESSED INVALID
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1817*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_REG1_rFLAGS,
/* REG0   reg       [XED_REG_ST0] r SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] r SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87POP2] rw SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] rw SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1818*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87POP2_REG3_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36 inum=1819*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  28, 29
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  31, 32, 33
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  34, 35, 36 inum=1820*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1821*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1822*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1823*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1824*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rcw EXPLICIT q i64
 REG0   reg       [XED_REG_EDX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] rcw SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EBX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1825*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_ECX_REG3_XED_REG_EBX_REG4_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT q i64
 REG0   reg       [XED_REG_EDX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] rcw SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EBX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1826*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_ECX_REG3_XED_REG_EBX_REG4_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1827*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1828*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B_IMM0_const1,
/* MEM0   imm_const [1] r EXPLICIT mprefetch i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1829*/ xed3_capture_chain_ntluf_MEM0_const1,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1830*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1831*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   reg       [XED_REG_STACKPOP] r SUPPRESSED spw5 int
 REG1   reg       [XED_REG_RIP] w SUPPRESSED INVALID
 MEM0   imm_const [1] r SUPPRESSED spw5 int
 BASE0  nt_lookup_fn rw SUPPRESSED SrSP INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_SSEG0 INVALID
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1832*/ xed3_capture_chain_ntluf_REG0_XED_REG_STACKPOP_REG1_XED_REG_RIP_MEM0_const1_BASE0_SrSP_SEG0_FINAL_SSEG0_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1833*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1834*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1835*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1836*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT mem14 struct
 REG0   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1837*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem28 struct
 REG0   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1838*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1839*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1840*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1841*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1842*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1843*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1844*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  19, 20
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  25, 26, 27 inum=1845*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG1   reg       [XED_REG_XMM0] r SUPPRESSED dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1846*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XED_REG_XMM0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG2   reg       [XED_REG_XMM0] r SUPPRESSED dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1847*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XED_REG_XMM0,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1848*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1849*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1850*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1851*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1852*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1853*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1854*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1855*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1856*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1857*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1858*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1859*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1860*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1861*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1862*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1863*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1864*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1865*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1866*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1867*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1868*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1869*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1870*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1871*/ xed3_capture_chain_ntluf_REG0_GPR8_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1872*/ xed3_capture_chain_ntluf_MEM0_const1_IMM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1873*/ xed3_capture_chain_ntluf_REG0_GPRv_B_IMM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1874*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPR8_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1875*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_GPR8_R_REG2_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 REG0   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1876*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_GPRv_R_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_R INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1877*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_GPRv_R_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1878*/ xed3_capture_chain_ntluf_REG0_GPR8_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1879*/ xed3_capture_chain_ntluf_REG0_GPR8_R_REG1_GPR8_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1880*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1881*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw IMPLICIT INVALID
 IMM0   imm_const [1] r EXPLICIT b i8
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1882*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw IMPLICIT OrAX INVALID
 IMM0   imm_const [1] r EXPLICIT z int
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1883*/ xed3_capture_chain_ntluf_REG0_OrAX_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1884*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1885*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1886*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1887*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG1   reg       [XED_REG_XMM0] r SUPPRESSED dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1888*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XED_REG_XMM0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG2   reg       [XED_REG_XMM0] r SUPPRESSED dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1889*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XED_REG_XMM0,
/* MEM0   imm_const [1] rcw EXPLICIT q i64
 REG0   reg       [XED_REG_EDX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] rcw SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EBX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1890*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_ECX_REG3_XED_REG_EBX_REG4_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT q i64
 REG0   reg       [XED_REG_EDX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_EAX] rcw SUPPRESSED INVALID
 REG2   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EBX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1891*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_EDX_REG1_XED_REG_EAX_REG2_XED_REG_ECX_REG3_XED_REG_EBX_REG4_rFLAGS,
/* REG0   reg       [XED_REG_EAX] w SUPPRESSED INVALID
 REG1   reg       [XED_REG_AX] r SUPPRESSED INVALID inum=1892*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_AX,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1893*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1894*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1895*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 MEM0   imm_const [1] r EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1896*/ xed3_capture_chain_ntluf_REG0_GPRv_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn cw EXPLICIT GPRv_R INVALID
 REG1   nt_lookup_fn r EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1897*/ xed3_capture_chain_ntluf_REG0_GPRv_R_REG1_GPRv_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1898*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i8
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1899*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1900*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1901*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPRv_R INVALID
 AGEN   imm_const [1] r EXPLICIT INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1902*/ xed3_capture_chain_ntluf_REG0_GPRv_R_AGEN_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRy_B INVALID
 REG1   reg       [XED_REG_GSBASE] r SUPPRESSED y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1903*/ xed3_capture_chain_ntluf_REG0_GPRy_B_REG1_XED_REG_GSBASE,
/* REG0   nt_lookup_fn r EXPLICIT MMX_R q u8
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i8
 MEM0   imm_const [1] w SUPPRESSED q i64
 BASE0  nt_lookup_fn r SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1904*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B_MEM0_const1_BASE0_ArDI_SEG0_FINAL_DSEG,
/* REG0   reg       [XED_REG_ST0] w SUPPRESSED f80 f80
 REG1   reg       [XED_REG_X87PUSH] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1905*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_X87PUSH_REG2_XED_REG_X87STATUS,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       110 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1906*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1907*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1908*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRz_R INVALID
 MEM0   imm_const [1] r EXPLICIT p struct
 REG1   reg       [XED_REG_ES] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1909*/ xed3_capture_chain_ntluf_REG0_GPRz_R_MEM0_const1_REG1_XED_REG_ES,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1910*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1911*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1912*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1913*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1914*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1915*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1916*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1917*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1918*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1919*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1920*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1921*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1922*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG2   reg       [XED_REG_XMM0] r SUPPRESSED dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1923*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XED_REG_XMM0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG1   reg       [XED_REG_XMM0] r SUPPRESSED dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32 inum=1924*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XED_REG_XMM0,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1925*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i64
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1926*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1927*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1928*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1929*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_B q i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1930*/ xed3_capture_chain_ntluf_REG0_MMX_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1931*/ xed3_capture_chain_ntluf_REG0_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1932*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1933*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1934*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1935*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1936*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q i16
 REG1   nt_lookup_fn r EXPLICIT MMX_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1937*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1938*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1939*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   reg       [XED_REG_ST0] rw SUPPRESSED f80 f80
 REG1   reg       [XED_REG_ST1] w SUPPRESSED f80 f80
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1940*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_XED_REG_ST1_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1941*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1942*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT w i16
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1943*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1944*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 MEM0   imm_const [1] r EXPLICIT ps f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1945*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R ps f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ps f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1946*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1947*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1948*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1949*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1950*/ xed3_capture_chain_ntluf_REG0_GPRv_B_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_SB INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  5, 6, 7
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1951*/ xed3_capture_chain_ntluf_REG0_GPRv_SB_REG1_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1952*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1953*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR8_B INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG1   nt_lookup_fn r SUPPRESSED rFLAGS INVALID inum=1954*/ xed3_capture_chain_ntluf_REG0_GPR8_B_REG1_rFLAGS,
/* MEM0   imm_const [1] rcw EXPLICIT dq i32
 REG0   reg       [XED_REG_RDX] rcw SUPPRESSED INVALID
 REG1   reg       [XED_REG_RAX] rcw SUPPRESSED INVALID
 REG2   reg       [XED_REG_RCX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RBX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1955*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_RDX_REG1_XED_REG_RAX_REG2_XED_REG_RCX_REG3_XED_REG_RBX_REG4_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1956*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* MEM0   imm_const [1] rw EXPLICIT v int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG0   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1957*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rFLAGS,
/* REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   nt_lookup_fn r EXPLICIT X87 f80 f80
 REG2   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1958*/ xed3_capture_chain_ntluf_REG0_XED_REG_ST0_REG1_X87_REG2_XED_REG_X87POP_REG3_XED_REG_X87STATUS_REG4_rFLAGS,
/* REG0   reg       [XED_REG_AL] rw SUPPRESSED INVALID
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1959*/ xed3_capture_chain_ntluf_REG0_XED_REG_AL_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1960*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1961*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT GPRv_SB INVALID
 SRM    imm       rrr (L) r SUPPRESSED i3  bitpos:  13, 14, 15 inum=1962*/ xed3_capture_chain_ntluf_REG0_GPRv_SB,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u8
 MEM0   imm_const [1] r EXPLICIT d u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1963*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT MMX_R q u8
 REG1   nt_lookup_fn r EXPLICIT MMX_B d u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1964*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_MMX_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1965*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1966*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* SRM    imm       000 (L) r SUPPRESSED i3  bitpos:  5, 6, 7 inum=1967*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1968*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1969*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn r IMPLICIT OrAX INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       000 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1970*/ xed3_capture_chain_ntluf_REG0_OrAX,
/* REG0   reg       [XED_REG_EAX] rw SUPPRESSED d u32
 REG1   reg       [XED_REG_EBX] crw SUPPRESSED d u32
 REG2   reg       [XED_REG_ECX] crw SUPPRESSED d u32
 REG3   reg       [XED_REG_EDX] crw SUPPRESSED d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       101 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1971*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_EBX_REG2_XED_REG_ECX_REG3_XED_REG_EDX_REG4_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mem16 struct
 REG0   reg       [XED_REG_X87CONTROL] r SUPPRESSED INVALID
 REG1   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1972*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_X87CONTROL_REG1_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1973*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1974*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  29, 30
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  35, 36, 37 inum=1975*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  29, 30
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  32, 33, 34
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  35, 36, 37 inum=1976*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1977*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1978*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG2   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1979*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_GPR64_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  24, 25
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  27, 28, 29
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 REG1   nt_lookup_fn rw SUPPRESSED rFLAGS INVALID inum=1980*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1_REG1_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT mem32int i32
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1981*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT mem16int i16
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1982*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* MEM0   imm_const [1] w EXPLICIT m64int i64
 REG0   reg       [XED_REG_ST0] r IMPLICIT f80 f80
 REG1   reg       [XED_REG_X87POP] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_X87STATUS] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1983*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_ST0_REG1_XED_REG_X87POP_REG2_XED_REG_X87STATUS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT d u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1984*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1985*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1986*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=1987*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] r EXPLICIT p2 struct
 REG0   nt_lookup_fn w SUPPRESSED rIP INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  8, 9
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  11, 12, 13
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  14, 15, 16 inum=1988*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_rIP,
/* PTR    imm_const [1] r EXPLICIT p struct
 IMM0   imm_const [1] r EXPLICIT w i16
 REG0   reg       [XED_REG_EIP] w SUPPRESSED INVALID inum=1989*/ xed3_capture_chain_ntluf_PTR_const1_IMM0_const1_REG0_XED_REG_EIP,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       010 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1990*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn r EXPLICIT GPR32_B d u8
 REG1   reg       [XED_REG_SSP] rw SUPPRESSED u64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=1991*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XED_REG_SSP,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG1   reg       [XED_REG_XMM0] r SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1992*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XED_REG_XMM0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG2   reg       [XED_REG_XMM0] r SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1993*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XED_REG_XMM0,
/* MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       011 (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG0   nt_lookup_fn rcw SUPPRESSED rFLAGS INVALID inum=1994*/ xed3_capture_chain_ntluf_REG0_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 MEM0   imm_const [1] r EXPLICIT sd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1995*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R sd f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B sd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=1996*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT q u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1997*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  27, 28
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  30, 31, 32
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  33, 34, 35 inum=1998*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 MEM0   imm_const [1] r EXPLICIT pd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=1999*/ xed3_capture_chain_ntluf_REG0_MMX_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MMX_R q i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B pd f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26 inum=2000*/ xed3_capture_chain_ntluf_REG0_MMX_R_REG1_XMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R ss f32
 MEM0   imm_const [1] r EXPLICIT ss f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2001*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R ss f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B ss f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  18, 19
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  24, 25, 26
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2002*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=2003*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  17, 18
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  23, 24, 25 inum=2004*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   reg       [XED_REG_EAX] rw SUPPRESSED INVALID
 REG1   reg       [XED_REG_ECX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       001 (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2005*/ xed3_capture_chain_ntluf_REG0_XED_REG_EAX_REG1_XED_REG_ECX,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2006*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2007*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2008*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2009*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2010*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2011*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2012*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2013*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2014*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2015*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2016*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2017*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_IMM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2018*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2019*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2020*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2021*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2022*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2023*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2024*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2025*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2026*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2027*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2028*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2029*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2030*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2031*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2032*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2033*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2034*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2035*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2036*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2037*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2038*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2039*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2040*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2041*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2042*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2043*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2044*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2045*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2046*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2047*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2048*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2049*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2050*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2051*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2052*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2053*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2054*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2055*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2056*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2057*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2058*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2059*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2060*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2061*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2062*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2063*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2064*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2065*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2066*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2067*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2068*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2069*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2070*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2071*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2072*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2073*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2074*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2075*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2076*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2077*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2078*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2079*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2080*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2081*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2082*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2083*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2084*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2085*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2086*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2087*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2088*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2089*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2090*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2091*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2092*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2093*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2094*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2095*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2096*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2097*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2098*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2099*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2100*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2101*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2102*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2103*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2104*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2105*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MEM0   imm_const [1] r EXPLICIT dq i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2106*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2107*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2108*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i64
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2109*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MEM0   imm_const [1] r EXPLICIT dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2110*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2111*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2112*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2113*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2114*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2115*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2116*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2117*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2118*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2119*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2120*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2121*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2122*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2123*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2124*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2125*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2126*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2127*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2128*/ xed3_capture_chain_ntluf_REG0_GPRy_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2129*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2130*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2131*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRy_R y int
 MEM0   imm_const [1] r EXPLICIT y int
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2132*/ xed3_capture_chain_ntluf_REG0_GPRy_R_MEM0_const1_IMM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2133*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_GPR32_B_IMM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT GPRy_R y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2134*/ xed3_capture_chain_ntluf_REG0_GPRy_R_REG1_GPRy_B_IMM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2135*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2136*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2137*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2138*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2139*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2140*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2141*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2142*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2143*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2144*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2145*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2146*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2147*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT y int
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2148*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2149*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_GPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2150*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2151*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2152*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2153*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2154*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2155*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2156*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2157*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2158*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2159*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2160*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2161*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2162*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2163*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2164*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2165*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2166*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2167*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2168*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2169*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2170*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2171*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2172*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2173*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2174*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2175*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2176*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2177*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2178*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2179*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2180*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2181*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2182*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2183*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2184*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2185*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2186*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2187*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2188*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2189*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2190*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i1
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i1
 MEM0   imm_const [1] r EXPLICIT dq i1
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2191*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i1
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i1
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i1
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2192*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i1
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i1
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i1
 MEM0   imm_const [1] r EXPLICIT dq i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2193*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i1
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i1
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i1
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2194*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i1
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i1
 MEM0   imm_const [1] r EXPLICIT qq i1
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2195*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i1
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i1
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i1
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2196*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i1
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i1
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq i1
 MEM0   imm_const [1] r EXPLICIT qq i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2197*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i1
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i1
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq i1
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2198*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2199*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPRy_N y int
 REG1   nt_lookup_fn r EXPLICIT GPRy_B y int
 IMM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2200*/ xed3_capture_chain_ntluf_REG0_VGPRy_N_REG1_GPRy_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPRy_B y int
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2201*/ xed3_capture_chain_ntluf_REG0_GPRy_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2202*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2203*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2204*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2205*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2206*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_R q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2207*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_N_REG2_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2208*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2209*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2210*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2211*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2212*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2213*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2214*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2215*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2216*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_R d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2217*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_N_REG2_XMM_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2218*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2219*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2220*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2221*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2222*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2223*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2224*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2225*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2226*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2227*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2228*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2229*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2230*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2231*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2232*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2233*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2234*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2235*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR64_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2236*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2237*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2238*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2239*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2240*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2241*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2242*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2243*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2244*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2245*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2246*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2247*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_GPR32_B,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2248*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=2249*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2250*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 MEM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2251*/ xed3_capture_chain_ntluf_REG0_MASK_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2252*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK_R,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2253*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2254*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2255*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2256*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2257*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2258*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2259*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2260*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2261*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2262*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2263*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2264*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2265*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2266*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2267*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2268*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2269*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2270*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2271*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2272*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2273*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2274*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2275*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2276*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2277*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2278*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2279*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2280*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2281*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2282*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2283*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2284*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2285*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2286*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2287*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2288*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2289*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2290*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2291*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_VGPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2292*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_VGPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2293*/ xed3_capture_chain_ntluf_REG0_VGPR64_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2294*/ xed3_capture_chain_ntluf_REG0_VGPR64_N_REG1_VGPR64_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT q f16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2295*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2296*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT dq f16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2297*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2298*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2299*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2300*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2301*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2302*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2303*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2304*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2305*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2306*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2307*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2308*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2309*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2310*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2311*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2312*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2313*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2314*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2315*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2316*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2317*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT d u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2318*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2319*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT q u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2320*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn crw EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG1   nt_lookup_fn rw EXPLICIT YMM_N qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2321*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_YMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2322*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2323*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2324*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2325*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2326*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2327*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2328*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2329*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R q f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG1   nt_lookup_fn rw EXPLICIT XMM_N q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2330*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2331*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2332*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2333*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2334*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2335*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2336*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2337*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2338*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2339*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2340*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2341*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2342*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2343*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2344*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2345*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2346*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2347*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2348*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2349*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2350*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2351*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2352*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2353*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2354*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2355*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2356*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2357*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2358*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2359*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2360*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2361*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2362*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2363*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2364*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2365*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2366*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2367*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2368*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2369*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2370*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2371*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2372*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2373*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2374*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2375*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2376*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2377*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2378*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2379*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2380*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2381*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2382*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2383*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2384*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2385*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2386*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2387*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2388*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2389*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2390*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2391*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2392*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2393*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2394*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2395*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2396*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2397*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2398*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2399*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2400*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_MEM0_const1_REG1_VGPR64_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2401*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_B_REG2_VGPR64_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2402*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2403*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2404*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2405*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2406*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2407*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2408*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2409*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2410*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2411*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2412*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2413*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2414*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2415*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2416*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2417*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2418*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2419*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2420*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2421*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2422*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2423*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2424*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2425*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2426*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2427*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2428*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2429*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2430*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2431*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2432*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2433*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_MEM0_const1_REG1_VGPR64_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2434*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_B_REG2_VGPR64_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2435*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2436*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2437*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2438*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2439*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2440*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2441*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2442*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2443*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2444*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2445*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2446*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2447*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2448*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2449*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2450*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2451*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2452*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2453*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2454*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2455*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2456*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2457*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2458*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   reg       [XED_REG_MXCSR] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2459*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_MXCSR,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2460*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2461*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2462*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2463*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2464*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2465*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2466*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2467*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2468*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2469*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2470*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2471*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2472*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2473*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2474*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2475*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2476*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2477*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2478*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2479*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2480*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2481*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2482*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2483*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2484*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2485*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2486*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2487*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2488*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2489*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2490*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2491*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2492*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2493*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2494*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2495*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 MEM0   imm_const [1] r EXPLICIT qq u256
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2496*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u256
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2497*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2498*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2499*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B w i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2500*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT w i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2501*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2502*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2503*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2504*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B INVALID
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2505*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2506*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2507*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2508*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2509*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2510*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2511*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2512*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2513*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2514*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2515*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2516*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2517*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2518*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R q f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2519*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2520*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2521*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2522*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2523*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* inum=2524*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2525*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2526*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2527*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2528*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2529*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_MEM0_const1_REG1_VGPR64_N_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2530*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_B_REG2_VGPR64_N_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2531*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R d f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2532*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2533*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2534*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2535*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2536*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2537*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2538*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_REG2_VGPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2539*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2540*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2541*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2542*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2543*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2544*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2545*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2546*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2547*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2548*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2549*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2550*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2551*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2552*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2553*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2554*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2555*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2556*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2557*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2558*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2559*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2560*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2561*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2562*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2563*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2564*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2565*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2566*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2567*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2568*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2569*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2570*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT qq i32
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2571*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2572*/ xed3_capture_chain_ntluf_REG0_YMM_B_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2573*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2574*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2575*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2576*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2577*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2578*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2579*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2580*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2581*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2582*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2583*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2584*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2585*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2586*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq i32
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2587*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2588*/ xed3_capture_chain_ntluf_REG0_YMM_B_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2589*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2590*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2591*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2592*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2593*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2594*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2595*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2596*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2597*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2598*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2599*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2600*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* MEM0   imm_const [1] r EXPLICIT d i32
 REG0   reg       [XED_REG_MXCSR] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2601*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XED_REG_MXCSR,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2602*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2603*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2604*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2605*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2606*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2607*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2608*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2609*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2610*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2611*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2612*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2613*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2614*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2615*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2616*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2617*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2618*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2619*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2620*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2621*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2622*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2623*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2624*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2625*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2626*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2627*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2628*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2629*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2630*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2631*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2632*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2633*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2634*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2635*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2636*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2637*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 MEM0   imm_const [1] r EXPLICIT qq u256
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2638*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u256
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2639*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2640*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2641*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2642*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2643*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2644*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2645*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 MEM0   imm_const [1] r EXPLICIT qq u256
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2646*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u256
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2647*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2648*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2649*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2650*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2651*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2652*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2653*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2654*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2655*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2656*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2657*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2658*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2659*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2660*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2661*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2662*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2663*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2664*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2665*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2666*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2667*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2668*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2669*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2670*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2671*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2672*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2673*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2674*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2675*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2676*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2677*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2678*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2679*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2680*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2681*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2682*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2683*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2684*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2685*/ xed3_capture_chain_ntluf_REG0_MASK_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2686*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK_R,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2687*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2688*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2689*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2690*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2691*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2692*/ xed3_capture_chain_ntluf_REG0_MASK_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2693*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK_R,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2694*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2695*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_MASK_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2696*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2697*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2698*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2699*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2700*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2701*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2702*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2703*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2704*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 MEM0   imm_const [1] r EXPLICIT wrd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2705*/ xed3_capture_chain_ntluf_REG0_MASK_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT wrd u16
 REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2706*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK_R,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2707*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2708*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2709*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2710*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2711*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2712*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2713*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2714*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn crw EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG1   nt_lookup_fn rw EXPLICIT YMM_N qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2715*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_YMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2716*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2717*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R q u32
 MEM0   imm_const [1] r EXPLICIT d u32
 REG1   nt_lookup_fn rw EXPLICIT XMM_N q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2718*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2719*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2720*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2721*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2722*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2723*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2724*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2725*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn crw EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG1   nt_lookup_fn rw EXPLICIT YMM_N qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2726*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_YMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2727*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2728*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2729*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2730*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2731*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2732*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2733*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2734*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2735*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2736*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2737*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2738*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2739*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2740*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2741*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2742*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn crw EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 REG1   nt_lookup_fn rw EXPLICIT YMM_N qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2743*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_YMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2744*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2745*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2746*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2747*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2748*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2749*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2750*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2751*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2752*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2753*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2754*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2755*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2756*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2757*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2758*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2759*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2760*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2761*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2762*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2763*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT d u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2764*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2765*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 MEM0   imm_const [1] r EXPLICIT q u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2766*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2767*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT q u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2768*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2769*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2770*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B w u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2771*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT w u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2772*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2773*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT d u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2774*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2775*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2776*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2777*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2778*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2779*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2780*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2781*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_N_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2782*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_N_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2783*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2784*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2785*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2786*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2787*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2788*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2789*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2790*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2791*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_N_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2792*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_N_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2793*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2794*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2795*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2796*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2797*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2798*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2799*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2800*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2801*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2802*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2803*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2804*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2805*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2806*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2807*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2808*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2809*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2810*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2811*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2812*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2813*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2814*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2815*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2816*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2817*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2818*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2819*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2820*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2821*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2822*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2823*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2824*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2825*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2826*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2827*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2828*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2829*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2830*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2831*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2832*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2833*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2834*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2835*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2836*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2837*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2838*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2839*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2840*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2841*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2842*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2843*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2844*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2845*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2846*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2847*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2848*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2849*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2850*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2851*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2852*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2853*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2854*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2855*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2856*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2857*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2858*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2859*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2860*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2861*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2862*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2863*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2864*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2865*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2866*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2867*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2868*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2869*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2870*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2871*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2872*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2873*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2874*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2875*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d u32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2876*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B_BCAST_const0x3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2877*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2878*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2879*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2880*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x11] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2881*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_BCAST_const0x11,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B b u8
 BCAST  imm_const [0x11] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2882*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_BCAST_const0x11,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 MEM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x12] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2883*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0x12,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B b u8
 BCAST  imm_const [0x12] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2884*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B_BCAST_const0x12,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2885*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2886*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2887*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2888*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2889*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2890*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2891*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2892*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2893*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2894*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT w u16
 BCAST  imm_const [0xe] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2895*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_BCAST_const0xe,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B w u16
 BCAST  imm_const [0xe] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2896*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_BCAST_const0xe,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 MEM0   imm_const [1] r EXPLICIT w u16
 BCAST  imm_const [0xf] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2897*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0xf,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B w u16
 BCAST  imm_const [0xf] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=2898*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B_BCAST_const0xf,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2899*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2900*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2901*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2902*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2903*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2904*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2905*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2906*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2907*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2908*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2909*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2910*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2911*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2912*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2913*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x14] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2914*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1_BCAST_const0x14,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x14] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2915*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B_IMM0_const1_BCAST_const0x14,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2916*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2917*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2918*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2919*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2920*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2921*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2922*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2923*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2924*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2925*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2926*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2927*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2928*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2929*/ xed3_capture_chain_ntluf_REG0_YMM_B_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2930*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2931*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2932*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2933*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2934*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2935*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2936*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2937*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2938*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2939*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2940*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2941*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2942*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2943*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2944*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2945*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2946*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2947*/ xed3_capture_chain_ntluf_REG0_YMM_B_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2948*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2949*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2950*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2951*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2952*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2953*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2954*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2955*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2956*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2957*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2958*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2959*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2960*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2961*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2962*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2963*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2964*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2965*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2966*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2967*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2968*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2969*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2970*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2971*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2972*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2973*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2974*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2975*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2976*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2977*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=2978*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2979*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2980*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2981*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=2982*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2983*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq i32
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=2984*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2985*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2986*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2987*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2988*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2989*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2990*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2991*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2992*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2993*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=2994*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2995*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2996*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2997*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2998*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=2999*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3000*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3001*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3002*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3003*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3004*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3005*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3006*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3007*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3008*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3009*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3010*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3011*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3012*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3013*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3014*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3015*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3016*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3017*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3018*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3019*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3020*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3021*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3022*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3023*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3024*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3025*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3026*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3027*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3028*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3029*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3030*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3031*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3032*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3033*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3034*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3035*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3036*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3037*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3038*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3039*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3040*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3041*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3042*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3043*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3044*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3045*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3046*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3047*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3048*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3049*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3050*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3051*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3052*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3053*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3054*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3055*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3056*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3057*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3058*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3059*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3060*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3061*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3062*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3063*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3064*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3065*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3066*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3067*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3068*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3069*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3070*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3071*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3072*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3073*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3074*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3075*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3076*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3077*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3078*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3079*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3080*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3081*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3082*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3083*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3084*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3085*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3086*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3087*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_EAX_REG2_XED_REG_EDX_REG3_XED_REG_ECX_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3088*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_EAX_REG3_XED_REG_EDX_REG4_XED_REG_ECX_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3089*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_EAX_REG2_XED_REG_EDX_REG3_XED_REG_ECX_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3090*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_EAX_REG3_XED_REG_EDX_REG4_XED_REG_ECX_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3091*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_RAX_REG2_XED_REG_RDX_REG3_XED_REG_RCX_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3092*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_RAX_REG3_XED_REG_RDX_REG4_XED_REG_RCX_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3093*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_EAX_REG2_XED_REG_EDX_REG3_XED_REG_XMM0_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3094*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_EAX_REG3_XED_REG_EDX_REG4_XED_REG_XMM0_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3095*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_EAX_REG2_XED_REG_EDX_REG3_XED_REG_XMM0_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_EAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3096*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_EAX_REG3_XED_REG_EDX_REG4_XED_REG_XMM0_REG5_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG2   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG4   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3097*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_RAX_REG2_XED_REG_RDX_REG3_XED_REG_XMM0_REG4_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_RAX] r SUPPRESSED INVALID
 REG3   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 REG4   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG5   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3098*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_RAX_REG3_XED_REG_RDX_REG4_XED_REG_XMM0_REG5_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3099*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3100*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3101*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3102*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3103*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3104*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* inum=3105*/ xed3_capture_nt_nop_ntluf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3106*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3107*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3108*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3109*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MEM0   imm_const [1] r EXPLICIT dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3110*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3111*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i64
 MEM0   imm_const [1] r EXPLICIT qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3112*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3113*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3114*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3115*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3116*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3117*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3118*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3119*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3120*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3121*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3122*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3123*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3124*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3125*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3126*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3127*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3128*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3129*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3130*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3131*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3132*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3133*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3134*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3135*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3136*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3137*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3138*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3139*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3140*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3141*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3142*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3143*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3144*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3145*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3146*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3147*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3148*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3149*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3150*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3151*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3152*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3153*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3154*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3155*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3156*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3157*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3158*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3159*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3160*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3161*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3162*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3163*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3164*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3165*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3166*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d i32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3167*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3168*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3169*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3170*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3171*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3172*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT q i64
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3173*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24 inum=3174*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XMM_R_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT w i16
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3175*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3176*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3177*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3178*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3179*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3180*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3181*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3182*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3183*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3184*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3185*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3186*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_MEM0_const1_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3187*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_REG2_VGPR64_B_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3188*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3189*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3190*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3191*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3192*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3193*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3194*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3195*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3196*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3197*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3198*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3199*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3200*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3201*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 MEM0   imm_const [1] r EXPLICIT qq u256
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3202*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u256
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u256
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u256
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3203*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3204*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3205*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3206*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3207*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3208*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3209*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3210*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3211*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3212*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3213*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3214*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3215*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3216*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3217*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3218*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_XMM0_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_XMM0] w SUPPRESSED dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3219*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_XMM0_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3220*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_ECX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3221*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_ECX_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3222*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_ECX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_ECX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3223*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_ECX_REG3_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG1   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3224*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1_REG1_XED_REG_RCX_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 REG2   reg       [XED_REG_RCX] w SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  16, 17
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  22, 23, 24
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3225*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1_REG2_XED_REG_RCX_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3226*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3227*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3228*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3229*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3230*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3231*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3232*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3233*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3234*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3235*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3236*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B_REG3_XED_REG_EDX,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG3   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3237*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B_REG3_XED_REG_EDX,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3238*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1_REG2_XED_REG_EDX,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG2   reg       [XED_REG_EDX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3239*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1_REG2_XED_REG_EDX,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 REG3   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3240*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_REG2_VGPR64_B_REG3_XED_REG_RDX,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 REG2   reg       [XED_REG_RDX] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3241*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_MEM0_const1_REG2_XED_REG_RDX,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3242*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3243*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3244*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3245*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT YMM_R dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3246*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_R dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3247*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_YMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3248*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3249*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3250*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3251*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3252*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3253*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3254*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3255*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3256*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3257*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3258*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3259*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3260*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3261*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3262*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3263*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3264*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3265*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3266*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3267*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR64_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT w u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3268*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3269*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3270*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3271*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3272*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3273*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3274*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3275*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3276*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3277*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3278*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3279*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3280*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3281*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3282*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3283*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3284*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3285*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3286*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3287*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3288*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3289*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3290*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3291*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3292*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3293*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3294*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3295*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3296*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3297*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3298*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3299*/ xed3_capture_chain_ntluf_REG0_YMM_B_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3300*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3301*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3302*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3303*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3304*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3305*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3306*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3307*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3308*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3309*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3310*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3311*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3312*/ xed3_capture_chain_ntluf_REG0_XMM_N_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3313*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3314*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3315*/ xed3_capture_chain_ntluf_REG0_YMM_N_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3316*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3317*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3318*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3319*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3320*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3321*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3322*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3323*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3324*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3325*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3326*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3327*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3328*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3329*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3330*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3331*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3332*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3333*/ xed3_capture_chain_ntluf_REG0_YMM_B_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3334*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3335*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3336*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3337*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3338*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_MEM0_const1_REG1_VGPR64_N,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3339*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_B_REG2_VGPR64_N,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3340*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3341*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3342*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3343*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3344*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3345*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3346*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3347*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3348*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3349*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3350*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3351*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3352*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3353*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3354*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3355*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3356*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3357*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3358*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3359*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3360*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3361*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3362*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3363*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3364*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3365*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3366*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3367*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3368*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3369*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3370*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 BCAST  imm_const [0xb] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3371*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_BCAST_const0xb,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u64
 BCAST  imm_const [0xb] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3372*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_BCAST_const0xb,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3373*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3374*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B_BCAST_const0xd,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3375*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3376*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3377*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3378*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3379*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3380*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3381*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3382*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3383*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3384*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3385*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3386*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3387*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3388*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3389*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3390*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3391*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3392*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3393*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3394*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3395*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3396*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3397*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_N_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq u64
 REG0   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3398*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_N_REG1_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 BCAST  imm_const [0x14] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3399*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0x14,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MEM0   imm_const [1] r EXPLICIT dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3400*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3401*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i64
 MEM0   imm_const [1] r EXPLICIT qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3402*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3403*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3404*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3405*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3406*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3407*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3408*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3409*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3410*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_N_REG1_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3411*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_N_REG1_YMM_R,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3412*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3413*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3414*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3415*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3416*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3417*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3418*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3419*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3420*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3421*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3422*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3423*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3424*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3425*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3426*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3427*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3428*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3429*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3430*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3431*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3432*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3433*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3434*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3435*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3436*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3437*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_XMM_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u128
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3438*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq u128
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3439*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_YMM_R_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3440*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3441*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3442*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3443*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 BCAST  imm_const [0x14] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3444*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_BCAST_const0x14,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3445*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3446*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3447*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3448*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3449*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT q u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3450*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3451*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3452*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3453*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3454*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3455*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3456*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3457*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3458*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3459*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3460*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3461*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3462*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3463*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3464*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3465*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3466*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3467*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3468*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3469*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3470*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3471*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3472*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3473*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3474*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3475*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3476*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3477*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3478*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3479*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3480*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3481*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3482*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3483*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3484*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3485*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3486*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3487*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3488*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3489*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3490*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3491*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3492*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3493*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3494*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3495*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3496*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3497*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3498*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3499*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3500*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3501*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3502*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3503*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3504*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3505*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3506*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3507*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3508*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3509*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3510*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3511*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3512*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3513*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3514*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3515*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3516*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3517*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3518*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B d i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3519*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i64
 MEM0   imm_const [1] r EXPLICIT d i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3520*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3521*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3522*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3523*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3524*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3525*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3526*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3527*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3528*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3529*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3530*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3531*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3532*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3533*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3534*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3535*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3536*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3537*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3538*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3539*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3540*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_MEM0_const1_REG1_VGPR32_N_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3541*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3542*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_B_REG2_VGPR32_N_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3543*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_MEM0_const1_REG1_VGPR64_N_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG3   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3544*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_B_REG2_VGPR64_N_REG3_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3545*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3546*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3547*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3548*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3549*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3550*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3551*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3552*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3553*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn r EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3554*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3555*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3556*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3557*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3558*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3559*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3560*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3561*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3562*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3563*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N d f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3564*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3565*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N q f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3566*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3567*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3568*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3569*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_N d i32
 REG2   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3570*/ xed3_capture_chain_ntluf_REG0_VGPR32_R_REG1_VGPR32_N_REG2_VGPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3571*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_N q i64
 REG2   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3572*/ xed3_capture_chain_ntluf_REG0_VGPR64_R_REG1_VGPR64_N_REG2_VGPR64_B,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MEM0   imm_const [1] w SUPPRESSED dq u8
 BASE0  nt_lookup_fn r SUPPRESSED ArDI INVALID
 SEG0   nt_lookup_fn r SUPPRESSED FINAL_DSEG INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3573*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_MEM0_const1_BASE0_ArDI_SEG0_FINAL_DSEG,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3574*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3575*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3576*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3577*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3578*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3579*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3580*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3581*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3582*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3583*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3584*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3585*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3586*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3587*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3588*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3589*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3590*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3591*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3592*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3593*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3594*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3595*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3596*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3597*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3598*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3599*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3600*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3601*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3602*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3603*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3604*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3605*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3606*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3607*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3608*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3609*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3610*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3611*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3612*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3613*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3614*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3615*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3616*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3617*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3618*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3619*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3620*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3621*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3622*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3623*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3624*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3625*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3626*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1_REG2_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3627*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B_REG3_XMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3628*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_SE dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3629*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_SE_REG3_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3630*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1_REG2_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3631*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B_REG3_YMM_SE,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3632*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_SE qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3633*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_SE_REG3_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3634*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3635*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3636*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3637*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3638*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3639*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3640*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3641*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3642*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3643*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3644*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3645*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3646*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3647*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3648*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3649*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3650*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3651*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3652*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3653*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3654*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 MEM0   imm_const [1] r EXPLICIT dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3655*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3656*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i64
 MEM0   imm_const [1] r EXPLICIT qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3657*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3658*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3659*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_B_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3660*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3661*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3662*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3663*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3664*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3665*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3666*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3667*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3668*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3669*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3670*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3671*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3672*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3673*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3674*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3675*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3676*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3677*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3678*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT q u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3679*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3680*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u32
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3681*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3682*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3683*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3684*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3685*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3686*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3687*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3688*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3689*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK_N mskw i1
 REG2   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3690*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK_N_REG2_MASK_B,
/* REG0   nt_lookup_fn crw EXPLICIT YMM_R qq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 REG1   nt_lookup_fn rw EXPLICIT YMM_N qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3691*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_YMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3692*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3693*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq u16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3694*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3695*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq u16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3696*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn crw EXPLICIT YMM_R qq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 REG1   nt_lookup_fn rw EXPLICIT YMM_N qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3697*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1_REG1_YMM_N,
/* REG0   nt_lookup_fn crw EXPLICIT XMM_R dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 REG1   nt_lookup_fn rw EXPLICIT XMM_N dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3698*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1_REG1_XMM_N,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3699*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3700*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3701*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3702*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3703*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i16
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3704*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3705*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i16
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3706*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3707*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3708*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3709*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3710*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3711*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  15, 16
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  21, 22, 23 inum=3712*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3713*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3714*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3715*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq f64
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3716*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3717*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3718*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3719*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT YMM_B qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3720*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3721*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3722*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3723*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3724*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3725*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3726*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3727*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_VGPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3728*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_VGPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3729*/ xed3_capture_chain_ntluf_REG0_VGPR64_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3730*/ xed3_capture_chain_ntluf_REG0_VGPR64_N_REG1_VGPR64_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3731*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f64
 REG2   nt_lookup_fn r EXPLICIT XMM_B q f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3732*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3733*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3734*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3735*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_VGPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR32_N d i32
 REG1   nt_lookup_fn r EXPLICIT VGPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3736*/ xed3_capture_chain_ntluf_REG0_VGPR32_N_REG1_VGPR32_B_REG2_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3737*/ xed3_capture_chain_ntluf_REG0_VGPR64_N_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT VGPR64_N q i64
 REG1   nt_lookup_fn r EXPLICIT VGPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=3738*/ xed3_capture_chain_ntluf_REG0_VGPR64_N_REG1_VGPR64_B_REG2_rFLAGS,
/* MEM0   imm_const [1] w EXPLICIT q f16
 REG0   nt_lookup_fn r EXPLICIT XMM_R dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3739*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B q f16
 REG1   nt_lookup_fn r EXPLICIT XMM_R dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3740*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_XMM_R_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f16
 REG0   nt_lookup_fn r EXPLICIT YMM_R qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3741*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B dq f16
 REG1   nt_lookup_fn r EXPLICIT YMM_R qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3742*/ xed3_capture_chain_ntluf_REG0_XMM_B_REG1_YMM_R_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3743*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i8
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i16
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3744*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3745*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i8
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i16
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  12, 13
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3746*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3747*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B d f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3748*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3749*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq i32
 REG1   nt_lookup_fn r EXPLICIT XMM_N dq i32
 REG2   nt_lookup_fn r EXPLICIT XMM_B dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3750*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_N_REG2_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3751*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq i32
 REG1   nt_lookup_fn r EXPLICIT YMM_N qq i32
 REG2   nt_lookup_fn r EXPLICIT YMM_B qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  13, 14
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  16, 17, 18
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  19, 20, 21 inum=3752*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_YMM_N_REG2_YMM_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3753*/ xed3_capture_chain_ntluf_REG0_XMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3754*/ xed3_capture_chain_ntluf_REG0_XMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3755*/ xed3_capture_chain_ntluf_REG0_YMM_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R qq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  14, 15
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  20, 21, 22 inum=3756*/ xed3_capture_chain_ntluf_REG0_YMM_R_REG1_XMM_B,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3757*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3758*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3759*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3760*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3761*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3762*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3763*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3764*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3765*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3766*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3767*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3768*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3769*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3770*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3771*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3772*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3773*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3774*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3775*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3776*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3777*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3778*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3779*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3780*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3781*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3782*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3783*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3784*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3785*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3786*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3787*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3788*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3789*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3790*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3791*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3792*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3793*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3794*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3795*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3796*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3797*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3798*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3799*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3800*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3801*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3802*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3803*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3804*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3805*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3806*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3807*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3808*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3809*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3810*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3811*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3812*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3813*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3814*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3815*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3816*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3817*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3818*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3819*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3820*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3821*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3822*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3823*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3824*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3825*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3826*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3827*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3828*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3829*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3830*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3831*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3832*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3833*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3834*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3835*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3836*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3837*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3838*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3839*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3840*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3841*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32 MULTIREG4
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3842*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3843*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3844*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3845*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3846*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3847*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3848*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3849*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3850*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3851*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3852*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3853*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3854*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3855*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3856*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3857*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3858*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3859*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3860*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3861*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3862*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3863*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3864*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3865*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3866*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3867*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3868*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3869*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3870*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3871*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3872*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3873*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3874*/ xed3_capture_chain_ntluf_REG0_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3875*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3876*/ xed3_capture_chain_ntluf_REG0_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3877*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       111 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3878*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3879*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3880*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3881*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3882*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3883*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3884*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3885*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3886*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3887*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3888*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3889*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3890*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3891*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3892*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3893*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3894*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3895*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3896*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3897*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3898*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3899*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3900*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3901*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3902*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3903*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT GPR64_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3904*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3905*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3906*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3907*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3908*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3909*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3910*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3911*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3912*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3913*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3914*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3915*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3916*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3917*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3918*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3919*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3920*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3921*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3922*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3923*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3924*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3925*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3926*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3927*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3928*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3929*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3930*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3931*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3932*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3933*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3934*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3935*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3936*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3937*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3938*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3939*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3940*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3941*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3942*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3943*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3944*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3945*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3946*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3947*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3948*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3949*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3950*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3951*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3952*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3953*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3954*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3955*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3956*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3957*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3958*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3959*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3960*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3961*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3962*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3963*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3964*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3965*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3966*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3967*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3968*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3969*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3970*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3971*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3972*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3973*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3974*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3975*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3976*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3977*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3978*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3979*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3980*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3981*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3982*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3983*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3984*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3985*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3986*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3987*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3988*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3989*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3990*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3991*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3992*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zi32 i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3993*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3994*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3995*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3996*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3997*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=3998*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=3999*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4000*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4001*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4002*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4003*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4004*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4005*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4006*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4007*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4008*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4009*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4010*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4011*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4012*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4013*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4014*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4015*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4016*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4017*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4018*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4019*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4020*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4021*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4022*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4023*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4024*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4025*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4026*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4027*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4028*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4029*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4030*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4031*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4032*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4033*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4034*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4035*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4036*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16 MULTIREG4
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4037*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4038*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq i16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zi32 i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4039*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4040*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q i16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4041*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4042*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq i16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4043*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4044*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4045*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4046*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4047*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4048*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4049*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4050*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4051*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4052*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4053*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4054*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4055*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4056*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4057*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4058*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4059*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4060*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4061*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4062*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4063*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4064*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4065*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4066*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4067*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4068*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4069*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4070*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4071*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4072*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4073*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4074*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4075*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4076*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4077*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4078*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4079*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4080*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4081*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4082*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4083*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4084*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4085*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4086*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4087*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4088*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4089*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu128 u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4090*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 MEM0   imm_const [1] r EXPLICIT zd u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4091*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4092*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4093*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4094*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4095*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4096*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4097*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4098*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4099*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4100*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4101*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4102*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4103*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4104*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4105*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4106*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4107*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4108*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4109*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4110*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4111*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4112*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4113*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4114*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4115*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4116*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4117*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4118*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4119*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4120*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4121*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4122*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4123*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4124*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4125*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4126*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4127*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4128*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4129*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4130*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4131*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4132*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4133*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4134*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4135*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4136*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4137*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4138*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4139*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4140*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4141*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4142*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4143*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4144*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4145*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u16
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4146*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4147*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4148*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4149*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT wrd u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4150*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4151*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4152*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4153*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4154*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4155*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4156*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4157*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4158*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4159*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4160*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4161*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4162*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4163*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4164*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4165*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4166*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4167*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4168*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4169*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4170*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4171*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4172*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4173*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4174*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4175*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4176*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4177*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4178*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4179*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4180*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4181*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4182*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4183*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4184*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4185*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4186*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4187*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4188*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4189*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4190*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4191*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4192*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi8 i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4193*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 MEM0   imm_const [1] r EXPLICIT zd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4194*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4195*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4196*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4197*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4198*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4199*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4200*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4201*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4202*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4203*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4204*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4205*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4206*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u64
 BCAST  imm_const [0x14] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4207*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x14,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u64
 BCAST  imm_const [0x8] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4208*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x8,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4209*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4210*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4211*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4212*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4213*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4214*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4215*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4216*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4217*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4218*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4219*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4220*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4221*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4222*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4223*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4224*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4225*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4226*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4227*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4228*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4229*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4230*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4231*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4232*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4233*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4234*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4235*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4236*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4237*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4238*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4239*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4240*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4241*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4242*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4243*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4244*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4245*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4246*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4247*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4248*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4249*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4250*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4251*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4252*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4253*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4254*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4255*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4256*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4257*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4258*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4259*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4260*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4261*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4262*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4263*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4264*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4265*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4266*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4267*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4268*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4269*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4270*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4271*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4272*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4273*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4274*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4275*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4276*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4277*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT d u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4278*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4279*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4280*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4281*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4282*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4283*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4284*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4285*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4286*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4287*/ xed3_capture_chain_ntluf_REG0_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u8
 REG1   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4288*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4289*/ xed3_capture_chain_ntluf_REG0_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4290*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       011 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4291*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT zd u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4292*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4293*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4294*/ xed3_capture_chain_ntluf_REG0_YMM_R3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4295*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4296*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4297*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4298*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4299*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4300*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4301*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4302*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4303*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4304*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4305*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4306*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4307*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4308*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4309*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4310*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4311*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4312*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4313*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4314*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4315*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4316*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4317*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4318*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4319*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4320*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4321*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4322*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32 MULTIREG4
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4323*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4324*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4325*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4326*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4327*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4328*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4329*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4330*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4331*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4332*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4333*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4334*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4335*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4336*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4337*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4338*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4339*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4340*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4341*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4342*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4343*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4344*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4345*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4346*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4347*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4348*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4349*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4350*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4351*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4352*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4353*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4354*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4355*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4356*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4357*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4358*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4359*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4360*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4361*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4362*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4363*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4364*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4365*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4366*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4367*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4368*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4369*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4370*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4371*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4372*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4373*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4374*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4375*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi8 i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4376*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 MEM0   imm_const [1] r EXPLICIT zd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4377*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4378*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4379*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4380*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4381*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4382*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4383*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4384*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4385*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4386*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4387*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4388*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4389*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4390*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4391*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4392*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4393*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4394*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4395*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4396*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4397*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4398*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4399*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4400*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4401*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4402*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4403*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4404*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4405*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4406*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4407*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4408*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4409*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 BCAST  imm_const [0xc] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4410*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xc,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q u32
 BCAST  imm_const [0xc] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4411*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xc,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 BCAST  imm_const [0x15] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4412*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x15,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q u32
 BCAST  imm_const [0x15] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4413*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x15,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 BCAST  imm_const [0x7] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4414*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x7,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q u32
 BCAST  imm_const [0x7] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4415*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x7,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4416*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4417*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4418*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4419*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4420*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4421*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4422*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4423*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4424*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4425*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4426*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4427*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4428*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4429*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4430*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4431*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4432*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4433*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4434*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4435*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4436*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4437*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4438*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4439*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4440*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4441*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4442*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4443*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4444*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4445*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4446*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4447*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4448*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4449*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4450*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4451*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4452*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4453*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4454*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4455*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4456*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4457*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4458*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4459*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4460*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4461*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4462*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT wrd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4463*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4464*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4465*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d f32
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4466*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4467*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4468*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4469*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4470*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4471*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4472*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4473*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4474*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4475*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4476*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4477*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4478*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4479*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4480*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4481*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4482*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4483*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4484*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4485*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4486*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4487*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4488*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4489*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4490*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4491*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4492*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4493*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4494*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4495*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=4496*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=4497*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=4498*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=4499*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=4500*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=4501*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4502*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4503*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4504*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4505*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4506*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4507*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4508*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4509*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4510*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4511*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4512*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4513*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4514*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4515*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4516*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4517*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4518*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4519*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4520*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4521*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4522*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4523*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4524*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4525*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4526*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT q u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4527*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4528*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4529*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4530*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4531*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4532*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4533*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4534*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4535*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4536*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4537*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4538*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4539*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4540*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4541*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4542*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4543*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4544*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4545*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4546*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4547*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4548*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4549*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4550*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4551*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4552*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4553*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4554*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4555*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4556*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4557*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4558*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 BCAST  imm_const [0x2] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4559*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x2,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 BCAST  imm_const [0x4] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4560*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x4,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4561*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4562*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4563*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4564*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4565*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4566*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4567*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4568*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4569*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4570*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4571*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4572*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4573*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4574*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4575*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4576*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4577*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4578*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4579*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4580*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4581*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4582*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4583*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4584*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4585*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4586*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4587*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4588*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4589*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4590*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4591*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4592*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4593*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4594*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4595*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4596*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4597*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4598*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4599*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4600*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4601*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4602*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4603*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4604*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4605*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4606*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4607*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4608*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4609*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4610*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4611*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4612*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4613*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4614*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4615*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4616*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4617*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4618*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4619*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4620*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4621*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4622*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4623*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4624*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4625*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4626*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4627*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4628*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4629*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4630*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4631*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4632*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4633*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4634*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4635*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4636*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4637*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4638*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4639*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4640*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4641*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4642*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4643*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4644*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4645*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4646*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT wrd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4647*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4648*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4649*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4650*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4651*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4652*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4653*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4654*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4655*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4656*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4657*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4658*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4659*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4660*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4661*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4662*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4663*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4664*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4665*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4666*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4667*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4668*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4669*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4670*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4671*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4672*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4673*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4674*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4675*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4676*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4677*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4678*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4679*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4680*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4681*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4682*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4683*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4684*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4685*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4686*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4687*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4688*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4689*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4690*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4691*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4692*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4693*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4694*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4695*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4696*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4697*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4698*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4699*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4700*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4701*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4702*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4703*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4704*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4705*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4706*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4707*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4708*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4709*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4710*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4711*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4712*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4713*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4714*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4715*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4716*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4717*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4718*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4719*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4720*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4721*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4722*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4723*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4724*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4725*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4726*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4727*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4728*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4729*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4730*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4731*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4732*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4733*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4734*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4735*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4736*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4737*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4738*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4739*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4740*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4741*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4742*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4743*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4744*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4745*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4746*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4747*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4748*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4749*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4750*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4751*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4752*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4753*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4754*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4755*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4756*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4757*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4758*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4759*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4760*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4761*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4762*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4763*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4764*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4765*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4766*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4767*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4768*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4769*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4770*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4771*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4772*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4773*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4774*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4775*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4776*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4777*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4778*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4779*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4780*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4781*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4782*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4783*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4784*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4785*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4786*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4787*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4788*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4789*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4790*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4791*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4792*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4793*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4794*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4795*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4796*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4797*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4798*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4799*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4800*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4801*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4802*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4803*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4804*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4805*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4806*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4807*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4808*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4809*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4810*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4811*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4812*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4813*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4814*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4815*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4816*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4817*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4818*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4819*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4820*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4821*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4822*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4823*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4824*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu128 u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4825*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 MEM0   imm_const [1] r EXPLICIT zd u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4826*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4827*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4828*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4829*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4830*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4831*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4832*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 q f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 q f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4833*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4834*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4835*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4836*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4837*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4838*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4839*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4840*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4841*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4842*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4843*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4844*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4845*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4846*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4847*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4848*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4849*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4850*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4851*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4852*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4853*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4854*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4855*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4856*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4857*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4858*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4859*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4860*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4861*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4862*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4863*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4864*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4865*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4866*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4867*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4868*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4869*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4870*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4871*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4872*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4873*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4874*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f64
 BCAST  imm_const [0x6] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4875*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x6,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4876*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4877*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4878*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4879*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4880*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4881*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4882*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f64
 BCAST  imm_const [0x14] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4883*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x14,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f64
 BCAST  imm_const [0x8] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4884*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x8,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4885*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4886*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4887*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4888*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4889*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4890*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4891*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4892*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4893*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4894*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4895*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4896*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4897*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4898*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4899*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4900*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4901*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* MEM0   imm_const [1] w EXPLICIT zd u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4902*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4903*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4904*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4905*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4906*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4907*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4908*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4909*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4910*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4911*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu8 u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4912*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4913*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4914*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4915*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4916*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4917*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4918*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4919*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4920*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4921*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4922*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4923*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4924*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4925*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4926*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT zd u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4927*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4928*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4929*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4930*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4931*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4932*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4933*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4934*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4935*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4936*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4937*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4938*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4939*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq i16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zi64 i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4940*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4941*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d i16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4942*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4943*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q i16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4944*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4945*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4946*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4947*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4948*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4949*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4950*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4951*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4952*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4953*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4954*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4955*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4956*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4957*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4958*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4959*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4960*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4961*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4962*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4963*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4964*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4965*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4966*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq i32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zi64 i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4967*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4968*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q i32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4969*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4970*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq i32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4971*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4972*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zi64 i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4973*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4974*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT wrd i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4975*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4976*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4977*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4978*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4979*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4980*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4981*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi8 i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4982*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 MEM0   imm_const [1] r EXPLICIT zd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4983*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4984*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4985*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4986*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4987*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4988*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4989*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4990*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4991*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4992*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4993*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4994*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4995*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4996*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4997*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=4998*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=4999*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5000*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5001*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5002*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5003*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5004*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5005*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5006*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5007*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5008*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5009*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5010*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5011*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5012*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5013*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5014*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5015*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5016*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5017*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5018*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5019*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5020*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5021*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5022*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5023*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5024*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5025*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5026*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5027*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5028*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5029*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5030*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5031*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5032*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5033*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5034*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5035*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5036*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5037*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5038*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5039*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5040*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5041*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5042*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5043*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5044*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5045*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5046*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5047*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5048*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5049*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5050*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zi8 i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5051*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5052*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5053*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5054*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5055*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5056*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5057*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5058*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5059*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5060*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5061*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5062*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5063*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5064*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5065*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5066*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu128 u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5067*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 MEM0   imm_const [1] r EXPLICIT zd u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5068*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5069*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5070*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5071*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5072*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5073*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5074*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5075*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5076*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5077*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5078*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5079*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5080*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5081*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5082*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5083*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5084*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5085*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5086*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5087*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       001 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5088*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5089*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5090*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5091*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5092*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5093*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5094*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5095*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5096*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5097*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5098*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5099*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5100*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5101*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5102*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5103*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d u32
 BCAST  imm_const [0x1] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5104*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 BCAST  imm_const [0x1] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5105*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 BCAST  imm_const [0x1] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5106*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 BCAST  imm_const [0x1] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5107*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d u32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5108*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5109*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5110*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5111*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d u32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5112*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5113*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5114*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5115*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5116*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5117*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5118*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5119*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5120*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5121*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5122*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5123*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5124*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5125*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5126*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5127*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5128*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5129*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5130*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5131*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5132*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5133*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu8 u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5134*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5135*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5136*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5137*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5138*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5139*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5140*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5141*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5142*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5143*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5144*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5145*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5146*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5147*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5148*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5149*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5150*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5151*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5152*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5153*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5154*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5155*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5156*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5157*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5158*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5159*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5160*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5161*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5162*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5163*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5164*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5165*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5166*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5167*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5168*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5169*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5170*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5171*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5172*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5173*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5174*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q u64
 BCAST  imm_const [0x5] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5175*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x5,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 BCAST  imm_const [0x5] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5176*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x5,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 BCAST  imm_const [0x5] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5177*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_GPR64_B_BCAST_const0x5,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q u64
 BCAST  imm_const [0xb] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5178*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xb,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 BCAST  imm_const [0xb] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5179*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xb,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 BCAST  imm_const [0xb] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5180*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_GPR64_B_BCAST_const0xb,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q u64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5181*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5182*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q u64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5183*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_GPR64_B_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5184*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5185*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5186*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5187*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5188*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5189*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5190*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5191*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5192*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5193*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5194*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5195*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5196*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5197*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5198*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5199*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5200*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5201*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5202*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5203*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5204*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5205*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5206*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5207*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5208*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5209*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5210*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5211*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5212*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5213*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5214*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5215*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5216*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5217*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5218*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5219*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5220*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5221*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5222*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5223*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5224*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5225*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5226*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5227*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5228*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5229*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5230*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5231*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5232*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5233*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5234*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5235*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5236*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5237*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5238*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5239*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5240*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5241*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5242*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5243*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5244*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5245*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5246*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5247*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5248*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5249*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5250*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5251*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5252*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5253*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5254*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5255*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5256*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5257*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5258*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5259*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5260*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5261*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5262*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5263*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5264*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5265*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5266*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5267*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5268*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5269*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5270*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5271*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5272*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5273*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5274*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5275*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5276*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5277*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5278*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5279*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5280*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT zd u32
 REG0   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5281*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5282*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5283*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5284*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5285*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5286*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5287*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5288*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5289*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5290*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5291*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5292*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5293*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5294*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5295*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5296*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5297*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5298*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5299*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5300*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5301*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5302*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5303*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5304*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5305*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5306*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5307*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5308*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5309*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5310*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5311*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u128
 MEM0   imm_const [1] r EXPLICIT dq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5312*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5313*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u128
 MEM0   imm_const [1] r EXPLICIT qq u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5314*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu128 u128
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5315*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu128 u128
 MEM0   imm_const [1] r EXPLICIT zd u128
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5316*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u32
 BCAST  imm_const [0x9] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5317*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x9,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5318*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5319*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5320*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5321*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5322*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5323*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5324*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5325*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5326*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5327*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5328*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5329*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5330*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5331*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5332*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5333*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5334*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5335*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5336*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5337*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5338*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5339*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5340*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5341*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5342*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5343*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5344*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5345*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5346*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5347*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5348*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5349*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u32
 BCAST  imm_const [0x2] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5350*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x2,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u32
 BCAST  imm_const [0x4] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5351*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x4,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5352*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5353*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5354*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5355*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5356*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5357*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5358*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5359*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5360*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5361*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5362*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5363*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5364*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f32
 BCAST  imm_const [0x9] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5365*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x9,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5366*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5367*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5368*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5369*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5370*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5371*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5372*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5373*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5374*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5375*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5376*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5377*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5378*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5379*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 BCAST  imm_const [0x15] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5380*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x15,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f32
 BCAST  imm_const [0x15] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5381*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x15,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 BCAST  imm_const [0x7] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5382*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x7,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f32
 BCAST  imm_const [0x7] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5383*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x7,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5384*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5385*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5386*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5387*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5388*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5389*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5390*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5391*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5392*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5393*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi64 i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5394*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5395*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5396*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5397*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5398*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5399*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5400*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5401*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5402*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5403*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5404*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5405*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5406*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5407*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5408*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5409*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5410*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5411*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5412*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5413*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5414*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5415*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5416*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5417*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5418*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5419*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5420*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5421*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi8 i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5422*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 MEM0   imm_const [1] r EXPLICIT zd i8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5423*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5424*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5425*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5426*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5427*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5428*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5429*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5430*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5431*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5432*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5433*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5434*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5435*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5436*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5437*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5438*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5439*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5440*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5441*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5442*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5443*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5444*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5445*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5446*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5447*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5448*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5449*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5450*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5451*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5452*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5453*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5454*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5455*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5456*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5457*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5458*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5459*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5460*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5461*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5462*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5463*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 q f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5464*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5465*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5466*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5467*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5468*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5469*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5470*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5471*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5472*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5473*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5474*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5475*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5476*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5477*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5478*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5479*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 q f32
 MEM0   imm_const [1] r EXPLICIT q f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5480*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5481*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5482*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5483*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5484*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5485*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5486*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5487*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5488*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5489*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5490*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5491*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5492*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5493*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5494*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5495*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5496*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5497*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5498*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5499*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5500*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5501*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5502*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5503*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5504*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5505*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5506*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5507*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5508*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5509*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5510*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5511*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5512*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5513*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5514*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5515*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5516*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5517*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5518*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5519*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5520*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5521*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5522*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5523*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5524*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5525*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5526*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5527*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5528*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5529*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5530*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5531*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5532*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5533*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5534*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5535*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5536*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5537*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5538*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5539*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5540*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5541*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5542*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5543*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5544*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5545*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5546*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5547*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5548*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5549*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5550*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5551*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5552*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5553*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5554*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5555*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5556*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5557*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5558*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5559*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5560*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5561*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5562*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5563*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5564*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5565*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5566*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5567*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5568*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5569*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5570*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5571*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5572*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5573*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16 MULTIREG4
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5574*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5575*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5576*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5577*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5578*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5579*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5580*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5581*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5582*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5583*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5584*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5585*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5586*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5587*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5588*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5589*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5590*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5591*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5592*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5593*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5594*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5595*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5596*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5597*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5598*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5599*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5600*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5601*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5602*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5603*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5604*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5605*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5606*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5607*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5608*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5609*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5610*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5611*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5612*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5613*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5614*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5615*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5616*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5617*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5618*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5619*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5620*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       000 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5621*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u8
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5622*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT b u8
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5623*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5624*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5625*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5626*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5627*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_B q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5628*/ xed3_capture_chain_ntluf_REG0_GPR64_B_REG1_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5629*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_B d u16
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5630*/ xed3_capture_chain_ntluf_REG0_GPR32_B_REG1_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT wrd u16
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5631*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5632*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5633*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5634*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5635*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5636*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5637*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5638*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5639*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5640*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5641*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5642*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5643*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5644*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5645*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5646*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5647*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5648*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5649*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5650*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5651*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5652*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5653*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5654*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5655*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5656*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5657*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5658*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5659*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5660*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5661*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5662*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5663*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5664*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5665*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5666*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5667*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5668*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5669*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5670*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5671*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5672*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5673*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5674*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5675*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5676*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5677*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5678*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5679*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5680*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5681*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       100 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5682*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5683*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5684*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5685*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5686*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5687*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5688*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5689*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5690*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5691*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5692*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5693*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5694*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5695*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5696*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5697*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5698*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5699*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5700*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5701*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5702*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5703*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5704*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=5705*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=5706*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=5707*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5708*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5709*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5710*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5711*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5712*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5713*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5714*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5715*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5716*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5717*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5718*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5719*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5720*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5721*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5722*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5723*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5724*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5725*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5726*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5727*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5728*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5729*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5730*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5731*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5732*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5733*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5734*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5735*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5736*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5737*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5738*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5739*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5740*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5741*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5742*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5743*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5744*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5745*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5746*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5747*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5748*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5749*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5750*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=5751*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20
 REG2   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=5752*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_B3_REG2_rFLAGS,
/* REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19
 REG1   nt_lookup_fn w SUPPRESSED rFLAGS INVALID inum=5753*/ xed3_capture_chain_ntluf_REG0_XMM_R3_MEM0_const1_REG1_rFLAGS,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5754*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5755*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5756*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5757*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5758*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5759*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5760*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT zd f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5761*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5762*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5763*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5764*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5765*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5766*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5767*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5768*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5769*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5770*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5771*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5772*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5773*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5774*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5775*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT zd f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5776*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5777*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5778*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5779*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5780*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5781*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5782*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5783*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5784*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5785*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5786*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5787*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5788*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5789*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5790*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5791*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5792*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5793*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5794*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5795*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5796*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5797*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5798*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5799*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5800*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5801*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5802*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5803*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5804*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5805*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5806*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5807*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5808*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5809*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5810*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5811*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5812*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT b u8
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5813*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5814*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5815*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5816*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5817*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5818*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5819*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5820*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5821*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5822*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5823*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5824*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5825*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5826*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5827*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5828*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5829*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5830*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5831*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5832*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5833*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5834*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5835*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5836*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5837*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5838*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5839*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5840*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5841*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5842*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5843*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5844*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5845*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5846*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5847*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5848*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5849*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5850*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5851*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5852*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5853*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5854*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5855*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5856*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5857*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5858*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5859*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5860*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5861*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5862*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5863*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5864*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5865*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5866*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5867*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5868*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT wrd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5869*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5870*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5871*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5872*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5873*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5874*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5875*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5876*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5877*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5878*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       101 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5879*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5880*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5881*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5882*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5883*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5884*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5885*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5886*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5887*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5888*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5889*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5890*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5891*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5892*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5893*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5894*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5895*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5896*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5897*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5898*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5899*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5900*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5901*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5902*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5903*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5904*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5905*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u16
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5906*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5907*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5908*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5909*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5910*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5911*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5912*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5913*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5914*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5915*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5916*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5917*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5918*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5919*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5920*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5921*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5922*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5923*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5924*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5925*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5926*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5927*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5928*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5929*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5930*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 BCAST  imm_const [0x11] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5931*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x11,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x11] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5932*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x11,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u8
 BCAST  imm_const [0x11] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5933*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x11,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 BCAST  imm_const [0x12] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5934*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x12,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x12] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5935*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x12,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u8
 BCAST  imm_const [0x12] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5936*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x12,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 BCAST  imm_const [0x13] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5937*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x13,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT b u8
 BCAST  imm_const [0x13] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5938*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x13,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u8
 BCAST  imm_const [0x13] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5939*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x13,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5940*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5941*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5942*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5943*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5944*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5945*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5946*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5947*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5948*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5949*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5950*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5951*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5952*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5953*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5954*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5955*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5956*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5957*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5958*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5959*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       010 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5960*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5961*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5962*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5963*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5964*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5965*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5966*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5967*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5968*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5969*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5970*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5971*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5972*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5973*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5974*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5975*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5976*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5977*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5978*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5979*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5980*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5981*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5982*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5983*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5984*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5985*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5986*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5987*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5988*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5989*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5990*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5991*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5992*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5993*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5994*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f64
 BCAST  imm_const [0x5] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5995*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x5,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 BCAST  imm_const [0x5] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5996*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x5,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q f64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=5997*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 BCAST  imm_const [0xd] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5998*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xd,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=5999*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6000*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6001*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6002*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6003*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6004*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6005*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6006*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6007*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6008*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6009*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6010*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6011*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6012*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6013*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6014*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6015*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6016*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6017*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6018*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6019*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6020*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6021*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6022*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6023*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6024*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6025*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6026*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d f32
 BCAST  imm_const [0x1] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6027*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 BCAST  imm_const [0x1] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6028*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d f32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6029*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 BCAST  imm_const [0xa] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6030*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xa,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d f32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6031*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 BCAST  imm_const [0x3] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6032*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6033*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6034*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6035*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6036*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6037*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6038*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6039*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6040*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6041*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6042*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6043*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6044*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6045*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6046*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6047*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6048*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6049*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6050*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6051*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6052*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6053*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6054*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6055*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6056*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6057*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6058*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6059*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6060*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6061*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6062*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6063*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6064*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6065*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6066*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6067*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6068*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6069*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6070*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6071*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 BCAST  imm_const [0xe] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6072*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xe,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT wrd u16
 BCAST  imm_const [0xe] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6073*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xe,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u16
 BCAST  imm_const [0xe] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6074*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0xe,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 BCAST  imm_const [0xf] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6075*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0xf,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT wrd u16
 BCAST  imm_const [0xf] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6076*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0xf,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u16
 BCAST  imm_const [0xf] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6077*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0xf,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 BCAST  imm_const [0x10] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6078*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3_BCAST_const0x10,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT wrd u16
 BCAST  imm_const [0x10] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6079*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x10,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d u16
 BCAST  imm_const [0x10] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6080*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_GPR32_B_BCAST_const0x10,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6081*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6082*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6083*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6084*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6085*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6086*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6087*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6088*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6089*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6090*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6091*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6092*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6093*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6094*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6095*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6096*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6097*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6098*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6099*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6100*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6101*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6102*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6103*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6104*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6105*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6106*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6107*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6108*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6109*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6110*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6111*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6112*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6113*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6114*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6115*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6116*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6117*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6118*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6119*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6120*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6121*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6122*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6123*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6124*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6125*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6126*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6127*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6128*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6129*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6130*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6131*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u32
 BCAST  imm_const [0xf] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6132*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK_B_BCAST_const0xf,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u32
 BCAST  imm_const [0x1b] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6133*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK_B_BCAST_const0x1b,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u32
 BCAST  imm_const [0xe] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6134*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK_B_BCAST_const0xe,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6135*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6136*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6137*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6138*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6139*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6140*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6141*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6142*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6143*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6144*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6145*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6146*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6147*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6148*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6149*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6150*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6151*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6152*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6153*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6154*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6155*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6156*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6157*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6158*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6159*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6160*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6161*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6162*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6163*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6164*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6165*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6166*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6167*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6168*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6169*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6170*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6171*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6172*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6173*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6174*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6175*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6176*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6177*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6178*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6179*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6180*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6181*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6182*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6183*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6184*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6185*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6186*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6187*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u64
 BCAST  imm_const [0x19] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6188*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK_B_BCAST_const0x19,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u64
 BCAST  imm_const [0x17] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6189*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK_B_BCAST_const0x17,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw u64
 BCAST  imm_const [0x18] r SUPPRESSED INVALID
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6190*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK_B_BCAST_const0x18,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6191*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6192*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6193*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6194*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6195*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6196*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6197*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT qq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6198*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6199*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6200*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32 MULTIREG4
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6201*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6202*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6203*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6204*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u64
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6205*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6206*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6207*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6208*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6209*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6210*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6211*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6212*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_N3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6213*/ xed3_capture_chain_ntluf_REG0_ZMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6214*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6215*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6216*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_N3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6217*/ xed3_capture_chain_ntluf_REG0_XMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6218*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6219*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6220*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_N3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6221*/ xed3_capture_chain_ntluf_REG0_YMM_N3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6222*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6223*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6224*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6225*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6226*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6227*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6228*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6229*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6230*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6231*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6232*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6233*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6234*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6235*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6236*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6237*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6238*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6239*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6240*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6241*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6242*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6243*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6244*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6245*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6246*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6247*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6248*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6249*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6250*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6251*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6252*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6253*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6254*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6255*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6256*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6257*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6258*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6259*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6260*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6261*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6262*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6263*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6264*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6265*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6266*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6267*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6268*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6269*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6270*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6271*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6272*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6273*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6274*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6275*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6276*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu16 u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6277*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6278*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6279*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6280*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6281*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6282*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6283*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6284*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u128
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT dq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6285*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6286*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u128
 REG1   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT qq u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6287*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6288*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu128 u128
 REG1   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT zd u64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6289*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6290*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6291*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6292*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6293*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6294*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6295*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6296*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6297*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6298*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6299*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6300*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6301*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6302*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6303*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR32_B d i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6304*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR32_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6305*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT d i32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6306*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6307*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG2   nt_lookup_fn r EXPLICIT GPR64_B q i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6308*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_GPR64_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q i64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6309*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32 MULTIREG4
 MEM0   imm_const [1] r EXPLICIT dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6310*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6311*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6312*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6313*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6314*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6315*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq i8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zi16 i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6316*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6317*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6318*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6319*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6320*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6321*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6322*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6323*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6324*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6325*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6326*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6327*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6328*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u64
 BCAST  imm_const [0x6] r SUPPRESSED INVALID
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6329*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_BCAST_const0x6,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6330*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6331*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6332*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6333*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6334*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6335*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6336*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6337*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6338*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6339*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6340*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6341*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d u32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6342*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6343*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6344*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q u64
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6345*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6346*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6347*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6348*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6349*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6350*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6351*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6352*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_XMM_N3_REG2_XMM_B3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6353*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6354*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6355*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6356*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6357*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6358*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6359*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6360*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6361*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6362*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6363*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6364*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6365*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT d i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6366*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6367*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT q i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6368*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6369*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6370*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6371*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6372*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6373*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6374*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6375*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6376*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6377*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6378*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6379*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6380*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6381*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6382*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6383*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6384*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6385*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6386*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6387*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6388*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6389*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6390*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6391*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6392*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6393*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6394*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6395*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i8
 MEM0   imm_const [1] r EXPLICIT dq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6396*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6397*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i8
 MEM0   imm_const [1] r EXPLICIT qq i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6398*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi8 i8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6399*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi8 i8
 MEM0   imm_const [1] r EXPLICIT zd i8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6400*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6401*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6402*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6403*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6404*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6405*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6406*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6407*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6408*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6409*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6410*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6411*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6412*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6413*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6414*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6415*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6416*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6417*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6418*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6419*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6420*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6421*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6422*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6423*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6424*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6425*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6426*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6427*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6428*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6429*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6430*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6431*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6432*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6433*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6434*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6435*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6436*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6437*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6438*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6439*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6440*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6441*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6442*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6443*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6444*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6445*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6446*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6447*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6448*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6449*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT zd f64
 REG0   nt_lookup_fn r EXPLICIT ZMM_R3 zf64 f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6450*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f64
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6451*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f64
 REG0   nt_lookup_fn r EXPLICIT YMM_R3 qq f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6452*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6453*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6454*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6455*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6456*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6457*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6458*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6459*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6460*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6461*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6462*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6463*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6464*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6465*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6466*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6467*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6468*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6469*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6470*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6471*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6472*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6473*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6474*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6475*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6476*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6477*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6478*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6479*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6480*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT zd f32
 REG0   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6481*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq f32
 REG0   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6482*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq f32
 REG0   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6483*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6484*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6485*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6486*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6487*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6488*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6489*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6490*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6491*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6492*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6493*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6494*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6495*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6496*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6497*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6498*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6499*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6500*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6501*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6502*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6503*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6504*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6505*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6506*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6507*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6508*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6509*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6510*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6511*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6512*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6513*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6514*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6515*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6516*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6517*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6518*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6519*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6520*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6521*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6522*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6523*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6524*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6525*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6526*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6527*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6528*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6529*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6530*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6531*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6532*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6533*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT zd u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6534*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_B3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6535*/ xed3_capture_chain_ntluf_REG0_ZMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT zd u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6536*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6537*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6538*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6539*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6540*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6541*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6542*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6543*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6544*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6545*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6546*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6547*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6548*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6549*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6550*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6551*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6552*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6553*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6554*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6555*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6556*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6557*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6558*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6559*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6560*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6561*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6562*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6563*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6564*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6565*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6566*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6567*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6568*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi64 i64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6569*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6570*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6571*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6572*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6573*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6574*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6575*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6576*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6577*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6578*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6579*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6580*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6581*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6582*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6583*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi32 i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6584*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi32 i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6585*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6586*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6587*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6588*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i32
 MEM0   imm_const [1] r EXPLICIT vv i32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6589*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu32 u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6590*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6591*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6592*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6593*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6594*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6595*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6596*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6597*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6598*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6599*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6600*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6601*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6602*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6603*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zi32 i32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6604*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi64 i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6605*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi64 i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6606*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6607*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6608*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6609*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i64
 MEM0   imm_const [1] r EXPLICIT vv i64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6610*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6611*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6612*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6613*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0_REG1_YMM_R3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6614*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6615*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6616*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6617*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6618*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6619*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6620*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6621*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6622*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6623*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6624*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6625*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT MASK_R mskw i1
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6626*/ xed3_capture_chain_ntluf_REG0_MASK_R_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6627*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6628*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6629*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6630*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6631*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi16 i16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6632*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6633*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u8
 MEM0   imm_const [1] r EXPLICIT dq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6634*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6635*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u8
 MEM0   imm_const [1] r EXPLICIT qq u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6636*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu8 u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6637*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu8 u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu8 u8
 MEM0   imm_const [1] r EXPLICIT zd u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6638*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f32
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6639*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6640*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6641*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6642*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6643*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6644*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6645*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6646*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* MEM0   imm_const [1] r EXPLICIT b f64
 REG0   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       110 (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6647*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASKNOT0,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6648*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6649*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6650*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6651*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6652*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6653*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6654*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6655*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6656*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf64 f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6657*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6658*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6659*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6660*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f64
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6661*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6662*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6663*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT d u32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6664*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6665*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6666*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6667*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6668*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6669*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6670*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6671*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6672*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6673*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6674*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6675*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6676*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6677*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6678*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6679*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6680*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6681*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6682*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6683*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6684*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn rw EXPLICIT MASKNOT0 mskw i1
 MEM0   imm_const [1] r EXPLICIT q u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       100 (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6685*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASKNOT0_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6686*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6687*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6688*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6689*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6690*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6691*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6692*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zf32 f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6693*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT ZMM_R3 zf32 f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zf32 f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6694*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6695*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6696*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6697*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn rw EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq f32
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6698*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6699*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6700*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6701*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT wrd u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6702*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6703*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT d u8
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6704*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6705*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3,
/* MEM0   imm_const [1] w EXPLICIT qq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zu64 u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6706*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6707*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3,
/* MEM0   imm_const [1] w EXPLICIT q u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6708*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6709*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3,
/* MEM0   imm_const [1] w EXPLICIT dq u32
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq u64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6710*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6711*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6712*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6713*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6714*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6715*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6716*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6717*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6718*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6719*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6720*/ xed3_capture_chain_ntluf_REG0_GPR32_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6721*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR32_R d i32
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6722*/ xed3_capture_chain_ntluf_REG0_GPR32_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6723*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6724*/ xed3_capture_chain_ntluf_REG0_GPR64_R_REG1_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT GPR64_R q i64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6725*/ xed3_capture_chain_ntluf_REG0_GPR64_R_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6726*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6727*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK_B mskw i1
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6728*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK_B,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6729*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u16
 MEM0   imm_const [1] r EXPLICIT dq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6730*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6731*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u16
 MEM0   imm_const [1] r EXPLICIT qq u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6732*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu16 u16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6733*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu16 u16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu16 u16
 MEM0   imm_const [1] r EXPLICIT zd u16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6734*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6735*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_B3 zf64 f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6736*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6737*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6738*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6739*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6740*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6741*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu32 u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6742*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu32 u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu32 u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6743*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6744*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6745*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6746*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u32
 MEM0   imm_const [1] r EXPLICIT vv u32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6747*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6748*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6749*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f64
 MEM0   imm_const [1] r EXPLICIT q f64
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6750*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6751*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_B3 qq f16 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6752*/ xed3_capture_chain_ntluf_REG0_YMM_B3_REG1_MASK1_REG2_ZMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT qq f16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT ZMM_R3 zf32 f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6753*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_ZMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6754*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_XMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT q f16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT XMM_R3 dq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6755*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_XMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_B3 dq f16
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6756*/ xed3_capture_chain_ntluf_REG0_XMM_B3_REG1_MASK1_REG2_YMM_R3_IMM0_const1,
/* MEM0   imm_const [1] w EXPLICIT dq f16
 REG0   nt_lookup_fn r EXPLICIT MASK1 mskw i1
 REG1   nt_lookup_fn r EXPLICIT YMM_R3 qq f32
 IMM0   imm_const [1] r EXPLICIT b u8
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6757*/ xed3_capture_chain_ntluf_MEM0_const1_REG0_MASK1_REG1_YMM_R3_IMM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6758*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq i16
 MEM0   imm_const [1] r EXPLICIT dq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6759*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6760*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq i16
 MEM0   imm_const [1] r EXPLICIT qq i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6761*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zi16 i16
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6762*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zi8 i8
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zi16 i16
 MEM0   imm_const [1] r EXPLICIT zd i16
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6763*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6764*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32 TXT=ROUNDC
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6765*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f32
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq f32
 MEM0   imm_const [1] r EXPLICIT d f32
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6766*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 REG3   nt_lookup_fn r EXPLICIT ZMM_B3 zu64 u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6767*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_REG3_ZMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zu64 u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT ZMM_N3 zu64 u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6768*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_ZMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 REG3   nt_lookup_fn r EXPLICIT XMM_B3 dq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6769*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_REG3_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_N3 dq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6770*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 REG3   nt_lookup_fn r EXPLICIT YMM_B3 qq u64
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6771*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_REG3_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq u64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_N3 qq u64
 MEM0   imm_const [1] r EXPLICIT vv u64 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6772*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_YMM_N3_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6773*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64 TXT=SAESTR
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT YMM_B3 qq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6774*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_REG2_YMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT ZMM_R3 zf64 f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6775*/ xed3_capture_chain_ntluf_REG0_ZMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6776*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT XMM_R3 dq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6777*/ xed3_capture_chain_ntluf_REG0_XMM_R3_REG1_MASK1_MEM0_const1,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 REG2   nt_lookup_fn r EXPLICIT XMM_B3 dq f32
 MOD    imm       11 (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  15, 16, 17
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  18, 19, 20 inum=6778*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_REG2_XMM_B3,
/* REG0   nt_lookup_fn w EXPLICIT YMM_R3 qq f64
 REG1   nt_lookup_fn r EXPLICIT MASK1 mskw i1 TXT=ZEROSTR
 MEM0   imm_const [1] r EXPLICIT vv f32 TXT=BCASTSTR
 MOD    imm       mm (L) r SUPPRESSED i2  bitpos:  11, 12
 REG    imm       rrr (L) r SUPPRESSED i3  bitpos:  14, 15, 16
 RM     imm       nnn (L) r SUPPRESSED i3  bitpos:  17, 18, 19 inum=6779*/ xed3_capture_chain_ntluf_REG0_YMM_R3_REG1_MASK1_MEM0_const1,
};
#endif
